lan9250_driver.h
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1 /**
2  * @file lan9250_driver.h
3  * @brief LAN9250 Ethernet controller
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.4.0
29  **/
30 
31 #ifndef _LAN9250_DRIVER_H
32 #define _LAN9250_DRIVER_H
33 
34 //Dependencies
35 #include "core/nic.h"
36 
37 //TX buffer size
38 #ifndef LAN9250_ETH_TX_BUFFER_SIZE
39  #define LAN9250_ETH_TX_BUFFER_SIZE 1536
40 #elif (LAN9250_ETH_TX_BUFFER_SIZE != 1536)
41  #error LAN9250_ETH_TX_BUFFER_SIZE parameter is not valid
42 #endif
43 
44 //RX buffer size
45 #ifndef LAN9250_ETH_RX_BUFFER_SIZE
46  #define LAN9250_ETH_RX_BUFFER_SIZE 1536
47 #elif (LAN9250_ETH_RX_BUFFER_SIZE != 1536)
48  #error LAN9250_ETH_RX_BUFFER_SIZE parameter is not valid
49 #endif
50 
51 //TX command size
52 #define LAN9250_TX_CMD_SIZE 8
53 
54 //SPI instructions
55 #define LAN9250_SPI_INSTR_EQIO 0x38
56 #define LAN9250_SPI_INSTR_RSTQIO 0xFF
57 #define LAN9250_SPI_INSTR_READ 0x03
58 #define LAN9250_SPI_INSTR_FASTREAD 0x0B
59 #define LAN9250_SPI_INSTR_SDOR 0x3B
60 #define LAN9250_SPI_INSTR_SDIOR 0xBB
61 #define LAN9250_SPI_INSTR_SQOR 0x6B
62 #define LAN9250_SPI_INSTR_SQIOR 0xEB
63 #define LAN9250_SPI_INSTR_WRITE 0x02
64 #define LAN9250_SPI_INSTR_SDDW 0x32
65 #define LAN9250_SPI_INSTR_SDADW 0xB2
66 #define LAN9250_SPI_INSTR_SQDW 0x62
67 #define LAN9250_SPI_INSTR_SQADW 0xE2
68 
69 //TX command 'A' format
70 #define LAN9250_TX_CMD_A_INT_ON_COMP 0x80000000
71 #define LAN9250_TX_CMD_A_BUFFER_ALIGN 0x03000000
72 #define LAN9250_TX_CMD_A_BUFFER_ALIGN_4B 0x00000000
73 #define LAN9250_TX_CMD_A_BUFFER_ALIGN_16B 0x01000000
74 #define LAN9250_TX_CMD_A_BUFFER_ALIGN_32B 0x02000000
75 #define LAN9250_TX_CMD_A_START_OFFSET 0x001F0000
76 #define LAN9250_TX_CMD_A_START_OFFSET_0B 0x00000000
77 #define LAN9250_TX_CMD_A_FIRST_SEG 0x00002000
78 #define LAN9250_TX_CMD_A_LAST_SEG 0x00001000
79 #define LAN9250_TX_CMD_A_BUFFER_SIZE 0x000007FF
80 
81 //TX command 'B' format
82 #define LAN9250_TX_CMD_B_PACKET_TAG 0xFFFF0000
83 #define LAN9250_TX_CMD_B_TX_CHECKSUM_EN 0x00004000
84 #define LAN9250_TX_CMD_B_ADD_CRC_DIS 0x00002000
85 #define LAN9250_TX_CMD_B_PADDING_DIS 0x00001000
86 #define LAN9250_TX_CMD_B_PACKET_LEN 0x000007FF
87 
88 //TX status format
89 #define LAN9250_TX_STS_PACKET_TAG 0xFFFF0000
90 #define LAN9250_TX_STS_ERROR_STATUS 0x00008000
91 #define LAN9250_TX_STS_LOSS_OF_CARRIER 0x00000800
92 #define LAN9250_TX_STS_NO_CARRIER 0x00000400
93 #define LAN9250_TX_STS_LATE_COLLISION 0x00000200
94 #define LAN9250_TX_STS_EXCESS_COLLISIONS 0x00000100
95 #define LAN9250_TX_STS_COLLISION_COUNT 0x00000078
96 #define LAN9250_TX_STS_EXCESS_DEFERRAL 0x00000004
97 #define LAN9250_TX_STS_DEFERRED 0x00000001
98 
99 //RX status format
100 #define LAN9250_RX_STS_PACKET_FILTER 0x80000000
101 #define LAN9250_RX_STS_FILTERING_FAIL 0x40000000
102 #define LAN9250_RX_STS_PACKET_LEN 0x3FFF0000
103 #define LAN9250_RX_STS_ERROR_STATUS 0x00008000
104 #define LAN9250_RX_STS_BROADCAST_FRAME 0x00002000
105 #define LAN9250_RX_STS_LENGTH_ERROR 0x00001000
106 #define LAN9250_RX_STS_RUNT_FRAME 0x00000800
107 #define LAN9250_RX_STS_MULTICAST_FRAME 0x00000400
108 #define LAN9250_RX_STS_FRAME_TOO_LONG 0x00000080
109 #define LAN9250_RX_STS_COLLISION_SEEN 0x00000040
110 #define LAN9250_RX_STS_FRAME_TYPE 0x00000020
111 #define LAN9250_RX_STS_RECEIVE_WDT 0x00000010
112 #define LAN9250_RX_STS_MII_ERROR 0x00000008
113 #define LAN9250_RX_STS_DRIBBLING_BIT 0x00000004
114 #define LAN9250_RX_STS_CRC_ERROR 0x00000002
115 
116 //LAN9250 System registers
117 #define LAN9250_RX_DATA_FIFO 0x0000
118 #define LAN9250_TX_DATA_FIFO 0x0020
119 #define LAN9250_RX_STATUS_FIFO 0x0040
120 #define LAN9250_RX_STATUS_FIFO_PEEK 0x0044
121 #define LAN9250_TX_STATUS_FIFO 0x0048
122 #define LAN9250_TX_STATUS_FIFO_PEEK 0x004C
123 #define LAN9250_ID_REV 0x0050
124 #define LAN9250_IRQ_CFG 0x0054
125 #define LAN9250_INT_STS 0x0058
126 #define LAN9250_INT_EN 0x005C
127 #define LAN9250_BYTE_TEST 0x0064
128 #define LAN9250_FIFO_INT 0x0068
129 #define LAN9250_RX_CFG 0x006C
130 #define LAN9250_TX_CFG 0x0070
131 #define LAN9250_HW_CFG 0x0074
132 #define LAN9250_RX_DP_CTRL 0x0078
133 #define LAN9250_RX_FIFO_INF 0x007C
134 #define LAN9250_TX_FIFO_INF 0x0080
135 #define LAN9250_PMT_CTRL 0x0084
136 #define LAN9250_GPT_CFG 0x008C
137 #define LAN9250_GPT_CNT 0x0090
138 #define LAN9250_FREE_RUN 0x009C
139 #define LAN9250_RX_DROP 0x00A0
140 #define LAN9250_MAC_CSR_CMD 0x00A4
141 #define LAN9250_MAC_CSR_DATA 0x00A8
142 #define LAN9250_AFC_CFG 0x00AC
143 #define LAN9250_HMAC_RX_LPI_TRANSITION 0x00B0
144 #define LAN9250_HMAC_RX_LPI_TIME 0x00B4
145 #define LAN9250_HMAC_TX_LPI_TRANSITION 0x00B8
146 #define LAN9250_HMAC_TX_LPI_TIME 0x00BC
147 #define LAN9250_1588_CMD_CTL 0x0100
148 #define LAN9250_1588_GENERAL_CONFIG 0x0104
149 #define LAN9250_1588_INT_STS 0x0108
150 #define LAN9250_1588_INT_EN 0x010C
151 #define LAN9250_1588_CLOCK_SEC 0x0110
152 #define LAN9250_1588_CLOCK_NS 0x0114
153 #define LAN9250_1588_CLOCK_SUBNS 0x0118
154 #define LAN9250_1588_CLOCK_RATE_ADJ 0x011C
155 #define LAN9250_1588_CLOCK_TEMP_RATE_ADJ 0x0120
156 #define LAN9250_1588_CLOCK_TEMP_RATE_DURATION 0x0124
157 #define LAN9250_1588_CLOCK_STEP_ADJ 0x0128
158 #define LAN9250_1588_CLOCK_TARGET_SEC_A 0x012C
159 #define LAN9250_1588_CLOCK_TARGET_NS_A 0x0130
160 #define LAN9250_1588_CLOCK_TARGET_RELOAD_SEC_A 0x0134
161 #define LAN9250_1588_CLOCK_TARGET_RELOAD_NS_A 0x0138
162 #define LAN9250_1588_CLOCK_TARGET_SEC_B 0x013C
163 #define LAN9250_1588_CLOCK_TARGET_NS_B 0x0140
164 #define LAN9250_1588_CLOCK_TARGET_RELOAD_SEC_B 0x0144
165 #define LAN9250_1588_CLOCK_TARGET_RELOAD_NS_B 0x0148
166 #define LAN9250_1588_USER_MAC_HI 0x014C
167 #define LAN9250_1588_USER_MAC_LO 0x0150
168 #define LAN9250_1588_BANK_PORT_GPIO_SEL 0x0154
169 #define LAN9250_1588_LATENCY 0x0158
170 #define LAN9250_1588_RX_PARSE_CONFIG 0x0158
171 #define LAN9250_1588_TX_PARSE_CONFIG 0x0158
172 #define LAN9250_1588_ASYM_PEERDLY 0x015C
173 #define LAN9250_1588_RX_TIMESTAMP_CONFIG 0x015C
174 #define LAN9250_1588_TX_TIMESTAMP_CONFIG 0x015C
175 #define LAN9250_1588_GPIO_CAP_CONFIG 0x015C
176 #define LAN9250_1588_CAP_INFO 0x0160
177 #define LAN9250_1588_RX_TS_INSERT_CONFIG 0x0160
178 #define LAN9250_1588_TX_MOD 0x0164
179 #define LAN9250_1588_RX_FILTER_CONFIG 0x0168
180 #define LAN9250_1588_TX_MOD2 0x0168
181 #define LAN9250_1588_RX_INGRESS_SEC 0x016C
182 #define LAN9250_1588_TX_EGRESS_SEC 0x016C
183 #define LAN9250_1588_GPIO_RE_CLOCK_SEC_CAP 0x016C
184 #define LAN9250_1588_RX_INGRESS_NS 0x0170
185 #define LAN9250_1588_TX_EGRESS_NS 0x0170
186 #define LAN9250_1588_GPIO_RE_CLOCK_NS_CAP 0x0170
187 #define LAN9250_1588_RX_MSG_HEADER 0x0174
188 #define LAN9250_1588_TX_MSG_HEADER 0x0174
189 #define LAN9250_1588_RX_PDREQ_SEC 0x0178
190 #define LAN9250_1588_TX_DREQ_SEC 0x0178
191 #define LAN9250_1588_GPIO_FE_CLOCK_SEC_CAP 0x0178
192 #define LAN9250_1588_RX_PDREQ_NS 0x017C
193 #define LAN9250_1588_TX_DREQ_NS 0x017C
194 #define LAN9250_1588_GPIO_FE_CLOCK_NS_CAP 0x017C
195 #define LAN9250_1588_RX_PDREQ_CF_HI 0x0180
196 #define LAN9250_1588_TX_ONE_STEP_SYNC_SEC 0x0180
197 #define LAN9250_1588_RX_PDREQ_CF_LOW 0x0184
198 #define LAN9250_1588_RX_CHKSUM_DROPPED_CNT 0x0188
199 #define LAN9250_1588_RX_FILTERED_CNT 0x018C
200 #define LAN9250_E2P_CMD 0x01B4
201 #define LAN9250_E2P_DATA 0x01B8
202 #define LAN9250_LED_CFG 0x01BC
203 #define LAN9250_GPIO_CFG 0x01E0
204 #define LAN9250_GPIO_DATA_DIR 0x01E4
205 #define LAN9250_GPIO_INT_STS_EN 0x01E8
206 #define LAN9250_RESET_CTL 0x01F8
207 
208 //LAN9250 Host MAC registers
209 #define LAN9250_HMAC_CR 0x01
210 #define LAN9250_HMAC_ADDRH 0x02
211 #define LAN9250_HMAC_ADDRL 0x03
212 #define LAN9250_HMAC_HASHH 0x04
213 #define LAN9250_HMAC_HASHL 0x05
214 #define LAN9250_HMAC_MII_ACC 0x06
215 #define LAN9250_HMAC_MII_DATA 0x07
216 #define LAN9250_HMAC_FLOW 0x08
217 #define LAN9250_HMAC_VLAN1 0x09
218 #define LAN9250_HMAC_VLAN2 0x0A
219 #define LAN9250_HMAC_WUFF 0x0B
220 #define LAN9250_HMAC_WUCSR 0x0C
221 #define LAN9250_HMAC_COE_CR 0x0D
222 #define LAN9250_HMAC_EEE_TW_TX_SYS 0x0E
223 #define LAN9250_HMAC_EEE_TX_LPI_REQ_DELAY 0x0F
224 
225 //LAN9250 PHY registers
226 #define LAN9250_PHY_BASIC_CONTROL 0x00
227 #define LAN9250_PHY_BASIC_STATUS 0x01
228 #define LAN9250_PHY_ID_MSB 0x02
229 #define LAN9250_PHY_ID_LSB 0x03
230 #define LAN9250_PHY_AN_ADV 0x04
231 #define LAN9250_PHY_AN_LP_BASE_ABILITY 0x05
232 #define LAN9250_PHY_AN_EXP 0x06
233 #define LAN9250_PHY_AN_NP_TX 0x07
234 #define LAN9250_PHY_AN_NP_RX 0x08
235 #define LAN9250_PHY_MMD_ACCESS 0x0D
236 #define LAN9250_PHY_MMD_ADDR_DATA 0x0E
237 #define LAN9250_PHY_EDPD_CFG 0x10
238 #define LAN9250_PHY_MODE_CONTROL_STATUS 0x11
239 #define LAN9250_PHY_SPECIAL_MODES 0x12
240 #define LAN9250_PHY_TDR_PAT_DELAY 0x18
241 #define LAN9250_PHY_TDR_CONTROL_STAT 0x19
242 #define LAN9250_PHY_SYMBOL_ERR_COUNTER 0x1A
243 #define LAN9250_PHY_SPECIAL_CONTROL_STAT_IND 0x1B
244 #define LAN9250_PHY_CABLE_LEN 0x1C
245 #define LAN9250_PHY_INTERRUPT_SOURCE 0x1D
246 #define LAN9250_PHY_INTERRUPT_MASK 0x1E
247 #define LAN9250_PHY_SPECIAL_CONTROL_STATUS 0x1F
248 
249 //LAN9250 MMD registers
250 #define LAN9250_PHY_PCS_CTL1 0x03, 0x00
251 #define LAN9250_PHY_PCS_STAT1 0x03, 0x01
252 #define LAN9250_PHY_PCS_MMD_PRESENT1 0x03, 0x05
253 #define LAN9250_PHY_PCS_MMD_PRESENT2 0x03, 0x06
254 #define LAN9250_PHY_EEE_CAP 0x03, 0x14
255 #define LAN9250_PHY_EEE_WAKE_ERR 0x03, 0x16
256 #define LAN9250_PHY_AN_MMD_PRESENT1 0x07, 0x05
257 #define LAN9250_PHY_AN_MMD_PRESENT2 0x07, 0x06
258 #define LAN9250_PHY_EEE_ADV 0x07, 0x3C
259 #define LAN9250_PHY_EEE_LP_ADV 0x07, 0x3D
260 #define LAN9250_PHY_VEND_SPEC_MMD1_DEVID1 0x1E, 0x02
261 #define LAN9250_PHY_VEND_SPEC_MMD1_DEVID2 0x1E, 0x03
262 #define LAN9250_PHY_VEND_SPEC_MMD1_PRESENT1 0x1E, 0x05
263 #define LAN9250_PHY_VEND_SPEC_MMD1_PRESENT2 0x1E, 0x06
264 #define LAN9250_PHY_VEND_SPEC_MMD1_STAT 0x1E, 0x08
265 #define LAN9250_PHY_VEND_SPEC_MMD1_PKG_ID1 0x1E, 0x0E
266 #define LAN9250_PHY_VEND_SPEC_MMD1_PKG_ID2 0x1E, 0x0F
267 
268 //Chip ID and Revision register
269 #define LAN9250_ID_REV_CHIP_ID 0xFFFF0000
270 #define LAN9250_ID_REV_CHIP_ID_DEFAULT 0x92500000
271 #define LAN9250_ID_REV_CHIP_REV 0x0000FFFF
272 
273 //Interrupt Configuration register
274 #define LAN9250_IRQ_CFG_INT_DEAS 0xFF000000
275 #define LAN9250_IRQ_CFG_INT_DEAS_10US 0x01000000
276 #define LAN9250_IRQ_CFG_INT_DEAS_100US 0x0A000000
277 #define LAN9250_IRQ_CFG_INT_DEAS_1MS 0x64000000
278 #define LAN9250_IRQ_CFG_INT_DEAS_CLR 0x00004000
279 #define LAN9250_IRQ_CFG_INT_DEAS_STS 0x00002000
280 #define LAN9250_IRQ_CFG_IRQ_INT 0x00001000
281 #define LAN9250_IRQ_CFG_IRQ_EN 0x00000100
282 #define LAN9250_IRQ_CFG_IRQ_POL 0x00000010
283 #define LAN9250_IRQ_CFG_IRQ_POL_LOW 0x00000000
284 #define LAN9250_IRQ_CFG_IRQ_POL_HIGH 0x00000010
285 #define LAN9250_IRQ_CFG_IRQ_CLK_SELECT 0x00000002
286 #define LAN9250_IRQ_CFG_IRQ_TYPE 0x00000001
287 #define LAN9250_IRQ_CFG_IRQ_TYPE_OD 0x00000000
288 #define LAN9250_IRQ_CFG_IRQ_TYPE_PP 0x00000001
289 
290 //Interrupt Status register
291 #define LAN9250_INT_STS_SW_INT 0x80000000
292 #define LAN9250_INT_STS_READY 0x40000000
293 #define LAN9250_INT_STS_1588_EVNT 0x20000000
294 #define LAN9250_INT_STS_PHY_INT 0x04000000
295 #define LAN9250_INT_STS_TXSTOP_INT 0x02000000
296 #define LAN9250_INT_STS_RXSTOP_INT 0x01000000
297 #define LAN9250_INT_STS_RXDFH_INT 0x00800000
298 #define LAN9250_INT_STS_TX_IOC 0x00200000
299 #define LAN9250_INT_STS_RXD_INT 0x00100000
300 #define LAN9250_INT_STS_GPT_INT 0x00080000
301 #define LAN9250_INT_STS_PME_INT 0x00020000
302 #define LAN9250_INT_STS_TXSO 0x00010000
303 #define LAN9250_INT_STS_RWT 0x00008000
304 #define LAN9250_INT_STS_RXE 0x00004000
305 #define LAN9250_INT_STS_TXE 0x00002000
306 #define LAN9250_INT_STS_GPIO 0x00001000
307 #define LAN9250_INT_STS_TDFO 0x00000400
308 #define LAN9250_INT_STS_TDFA 0x00000200
309 #define LAN9250_INT_STS_TSFF 0x00000100
310 #define LAN9250_INT_STS_TSFL 0x00000080
311 #define LAN9250_INT_STS_RXDF_INT 0x00000040
312 #define LAN9250_INT_STS_RSFF 0x00000010
313 #define LAN9250_INT_STS_RSFL 0x00000008
314 
315 //Interrupt Enable register
316 #define LAN9250_INT_EN_SW_INT_EN 0x80000000
317 #define LAN9250_INT_EN_READY_EN 0x40000000
318 #define LAN9250_INT_EN_1588_EVNT_EN 0x20000000
319 #define LAN9250_INT_EN_PHY_INT_EN 0x04000000
320 #define LAN9250_INT_EN_TXSTOP_INT_EN 0x02000000
321 #define LAN9250_INT_EN_RXSTOP_INT_EN 0x01000000
322 #define LAN9250_INT_EN_RXDFH_INT_EN 0x00800000
323 #define LAN9250_INT_EN_TIOC_INT_EN 0x00200000
324 #define LAN9250_INT_EN_RXD_INT_EN 0x00100000
325 #define LAN9250_INT_EN_GPT_INT_EN 0x00080000
326 #define LAN9250_INT_EN_PME_INT_EN 0x00020000
327 #define LAN9250_INT_EN_TXSO_EN 0x00010000
328 #define LAN9250_INT_EN_RWT_INT_EN 0x00008000
329 #define LAN9250_INT_EN_RXE_INT_EN 0x00004000
330 #define LAN9250_INT_EN_TXE_INT_EN 0x00002000
331 #define LAN9250_INT_EN_GPIO_EN 0x00001000
332 #define LAN9250_INT_EN_TDFO_EN 0x00000400
333 #define LAN9250_INT_EN_TDFA_EN 0x00000200
334 #define LAN9250_INT_EN_TSFF_EN 0x00000100
335 #define LAN9250_INT_EN_TSFL_EN 0x00000080
336 #define LAN9250_INT_EN_RXDF_INT_EN 0x00000040
337 #define LAN9250_INT_EN_RSFF_EN 0x00000010
338 #define LAN9250_INT_EN_RSFL_EN 0x00000008
339 
340 //Byte Order Test register
341 #define LAN9250_BYTE_TEST_DEFAULT 0x87654321
342 
343 //FIFO Level Interrupt register
344 #define LAN9250_FIFO_INT_TX_DATA_AVAILABLE_LEVEL 0xFF000000
345 #define LAN9250_FIFO_INT_TX_STATUS_LEVEL 0x00FF0000
346 #define LAN9250_FIFO_INT_RX_STATUS_LEVEL 0x000000FF
347 
348 //Receive Configuration register
349 #define LAN9250_RX_CFG_RX_EA 0xC0000000
350 #define LAN9250_RX_CFG_RX_EA_4_BYTES 0x00000000
351 #define LAN9250_RX_CFG_RX_EA_16_BYTES 0x40000000
352 #define LAN9250_RX_CFG_RX_EA_32_BYTES 0x80000000
353 #define LAN9250_RX_CFG_RX_DMA_CNT 0x0FFF0000
354 #define LAN9250_RX_CFG_RX_DUMP 0x00008000
355 #define LAN9250_RX_CFG_RXDOFF 0x00001F00
356 
357 //Transmit Configuration register
358 #define LAN9250_TX_CFG_TXS_DUMP 0x00008000
359 #define LAN9250_TX_CFG_TXD_DUMP 0x00004000
360 #define LAN9250_TX_CFG_TXSAO 0x00000004
361 #define LAN9250_TX_CFG_TX_ON 0x00000002
362 #define LAN9250_TX_CFG_STOP_TX 0x00000001
363 
364 //Hardware Configuration register
365 #define LAN9250_HW_CFG_DEVICE_READY 0x08000000
366 #define LAN9250_HW_CFG_AMDIX_EN_STRAP_STATE 0x02000000
367 #define LAN9250_HW_CFG_MBO 0x00100000
368 #define LAN9250_HW_CFG_TX_FIF_SZ 0x000F0000
369 #define LAN9250_HW_CFG_TX_FIF_SZ_2KB 0x00020000
370 #define LAN9250_HW_CFG_TX_FIF_SZ_3KB 0x00030000
371 #define LAN9250_HW_CFG_TX_FIF_SZ_4KB 0x00040000
372 #define LAN9250_HW_CFG_TX_FIF_SZ_5KB 0x00050000
373 #define LAN9250_HW_CFG_TX_FIF_SZ_6KB 0x00060000
374 #define LAN9250_HW_CFG_TX_FIF_SZ_7KB 0x00070000
375 #define LAN9250_HW_CFG_TX_FIF_SZ_8KB 0x00080000
376 #define LAN9250_HW_CFG_TX_FIF_SZ_9KB 0x00090000
377 #define LAN9250_HW_CFG_TX_FIF_SZ_10KB 0x000A0000
378 #define LAN9250_HW_CFG_TX_FIF_SZ_11KB 0x000B0000
379 #define LAN9250_HW_CFG_TX_FIF_SZ_12KB 0x000C0000
380 #define LAN9250_HW_CFG_TX_FIF_SZ_13KB 0x000D0000
381 #define LAN9250_HW_CFG_TX_FIF_SZ_14KB 0x000E0000
382 
383 //Receive Datapath Control register
384 #define LAN9250_RX_DP_CTRL_RX_FFWD 0x80000000
385 
386 //RX FIFO Information register
387 #define LAN9250_RX_FIFO_INF_RXSUSED 0x00FF0000
388 #define LAN9250_RX_FIFO_INF_RXDUSED 0x0000FFFF
389 
390 //TX FIFO Information register
391 #define LAN9250_TX_FIFO_INF_TXSUSED 0x00FF0000
392 #define LAN9250_TX_FIFO_INF_TXFREE 0x0000FFFF
393 
394 //Power Management Control register
395 #define LAN9250_PMT_CTRL_PM_MODE 0xE0000000
396 #define LAN9250_PMT_CTRL_PM_SLEEP_EN 0x10000000
397 #define LAN9250_PMT_CTRL_PM_WAKE 0x08000000
398 #define LAN9250_PMT_CTRL_LED_DIS 0x04000000
399 #define LAN9250_PMT_CTRL_1588_DIS 0x02000000
400 #define LAN9250_PMT_CTRL_1588_TSU_DIS 0x00400000
401 #define LAN9250_PMT_CTRL_HMAC_DIS 0x00080000
402 #define LAN9250_PMT_CTRL_HMAC_SYS_ONLY_DIS 0x00040000
403 #define LAN9250_PMT_CTRL_ED_STS 0x00010000
404 #define LAN9250_PMT_CTRL_ED_EN 0x00004000
405 #define LAN9250_PMT_CTRL_WOL_EN 0x00000200
406 #define LAN9250_PMT_CTRL_PME_TYPE 0x00000040
407 #define LAN9250_PMT_CTRL_WOL_STS 0x00000020
408 #define LAN9250_PMT_CTRL_PME_IND 0x00000008
409 #define LAN9250_PMT_CTRL_PME_POL 0x00000004
410 #define LAN9250_PMT_CTRL_PME_EN 0x00000002
411 #define LAN9250_PMT_CTRL_READY 0x00000001
412 
413 //General Purpose Timer Configuration register
414 #define LAN9250_GPT_CFG_TIMER_EN 0x20000000
415 #define LAN9250_GPT_CFG_GPT_LOAD 0x0000FFFF
416 
417 //General Purpose Timer Count register
418 #define LAN9250_GPT_CNT_GPT_CNT 0x0000FFFF
419 
420 //Free Running 25MHz Counter register
421 #define LAN9250_FREE_RUN_FR_CNT 0xFFFFFFFF
422 
423 //Host MAC RX Dropped Frames Counter register
424 #define LAN9250_RX_DROP_RX_DFC 0xFFFFFFFF
425 
426 //Host MAC CSR Interface Command register
427 #define LAN9250_MAC_CSR_CMD_BUSY 0x80000000
428 #define LAN9250_MAC_CSR_CMD_WRITE 0x00000000
429 #define LAN9250_MAC_CSR_CMD_READ 0x40000000
430 #define LAN9250_MAC_CSR_CMD_ADDR 0x000000FF
431 
432 //Host MAC Automatic Flow Control Configuration register
433 #define LAN9250_AFC_CFG_AFC_HI 0x00FF0000
434 #define LAN9250_AFC_CFG_AFC_LO 0x0000FF00
435 #define LAN9250_AFC_CFG_BACK_DUR 0x000000F0
436 #define LAN9250_AFC_CFG_FCMULT 0x00000008
437 #define LAN9250_AFC_CFG_FCBRD 0x00000004
438 #define LAN9250_AFC_CFG_FCADD 0x00000002
439 #define LAN9250_AFC_CFG_FCANY 0x00000001
440 
441 //EEPROM Command register
442 #define LAN9250_E2P_CMD_EPC_BUSY 0x80000000
443 #define LAN9250_E2P_CMD_EPC_COMMAND 0x70000000
444 #define LAN9250_E2P_CMD_EPC_COMMAND_READ 0x00000000
445 #define LAN9250_E2P_CMD_EPC_COMMAND_WRITE 0x30000000
446 #define LAN9250_E2P_CMD_EPC_COMMAND_RELOAD 0x70000000
447 #define LAN9250_E2P_CMD_LOADER_OVERFLOW 0x00040000
448 #define LAN9250_E2P_CMD_EPC_TIMEOUT 0x00020000
449 #define LAN9250_E2P_CMD_CFG_LOADED 0x00010000
450 #define LAN9250_E2P_CMD_EPC_ADDR 0x0000FFFF
451 
452 //EEPROM Data register
453 #define LAN9250_E2P_DATA_EEPROM_DATA 0x000000FF
454 
455 //LED Configuration register
456 #define LAN9250_LED_CFG_LED_FUN 0x00000700
457 #define LAN9250_LED_CFG_LED_FUN_0 0x00000000
458 #define LAN9250_LED_CFG_LED_FUN_1 0x00000100
459 #define LAN9250_LED_CFG_LED_FUN_2 0x00000200
460 #define LAN9250_LED_CFG_LED_FUN_3 0x00000300
461 #define LAN9250_LED_CFG_LED_FUN_4 0x00000400
462 #define LAN9250_LED_CFG_LED_EN 0x00000007
463 #define LAN9250_LED_CFG_LED_EN_0 0x00000001
464 #define LAN9250_LED_CFG_LED_EN_1 0x00000002
465 #define LAN9250_LED_CFG_LED_EN_2 0x00000004
466 
467 //General Purpose I/O Configuration register
468 #define LAN9250_GPIO_CFG_GPIO_CH_SEL 0x07000000
469 #define LAN9250_GPIO_CFG_GPIO_CH_SEL_0 0x01000000
470 #define LAN9250_GPIO_CFG_GPIO_CH_SEL_1 0x02000000
471 #define LAN9250_GPIO_CFG_GPIO_CH_SEL_2 0x04000000
472 #define LAN9250_GPIO_CFG_GPIO_POL 0x00070000
473 #define LAN9250_GPIO_CFG_GPIO_POL_0 0x00010000
474 #define LAN9250_GPIO_CFG_GPIO_POL_1 0x00020000
475 #define LAN9250_GPIO_CFG_GPIO_POL_2 0x00040000
476 #define LAN9250_GPIO_CFG_1588_GPIO_OE 0x00000700
477 #define LAN9250_GPIO_CFG_1588_GPIO_OE_0 0x00000100
478 #define LAN9250_GPIO_CFG_1588_GPIO_OE_1 0x00000200
479 #define LAN9250_GPIO_CFG_1588_GPIO_OE_2 0x00000400
480 #define LAN9250_GPIO_CFG_GPIOBUF 0x00000007
481 #define LAN9250_GPIO_CFG_GPIOBUF_0 0x00000001
482 #define LAN9250_GPIO_CFG_GPIOBUF_1 0x00000002
483 #define LAN9250_GPIO_CFG_GPIOBUF_2 0x00000004
484 
485 //General Purpose I/O Data & Direction register
486 #define LAN9250_GPIO_DATA_DIR_GPIODIR 0x00070000
487 #define LAN9250_GPIO_DATA_DIR_GPIODIR_0 0x00010000
488 #define LAN9250_GPIO_DATA_DIR_GPIODIR_1 0x00020000
489 #define LAN9250_GPIO_DATA_DIR_GPIODIR_2 0x00040000
490 #define LAN9250_GPIO_DATA_DIR_GPIOD 0x00000007
491 #define LAN9250_GPIO_DATA_DIR_GPIOD_0 0x00000001
492 #define LAN9250_GPIO_DATA_DIR_GPIOD_1 0x00000002
493 #define LAN9250_GPIO_DATA_DIR_GPIOD_2 0x00000004
494 
495 //General Purpose I/O Interrupt Status and Enable register
496 #define LAN9250_GPIO_INT_STS_EN_GPIO_INT_EN 0x00070000
497 #define LAN9250_GPIO_INT_STS_EN_GPIO_INT_EN_0 0x00010000
498 #define LAN9250_GPIO_INT_STS_EN_GPIO_INT_EN_1 0x00020000
499 #define LAN9250_GPIO_INT_STS_EN_GPIO_INT_EN_2 0x00040000
500 #define LAN9250_GPIO_INT_STS_EN_GPIO_INT 0x00000007
501 #define LAN9250_GPIO_INT_STS_EN_GPIO_INT_0 0x00000001
502 #define LAN9250_GPIO_INT_STS_EN_GPIO_INT_1 0x00000002
503 #define LAN9250_GPIO_INT_STS_EN_GPIO_INT_2 0x00000004
504 
505 //Reset Control register
506 #define LAN9250_RESET_CTL_HMAC_RST 0x00000020
507 #define LAN9250_RESET_CTL_PHY_RST 0x00000002
508 #define LAN9250_RESET_CTL_DIGITAL_RST 0x00000001
509 
510 //Host MAC Control register
511 #define LAN9250_HMAC_CR_RXALL 0x80000000
512 #define LAN9250_HMAC_CR_HMAC_EEE_ENABLE 0x02000000
513 #define LAN9250_HMAC_CR_RCVOWN 0x00800000
514 #define LAN9250_HMAC_CR_LOOPBK 0x00200000
515 #define LAN9250_HMAC_CR_FDPX 0x00100000
516 #define LAN9250_HMAC_CR_MCPAS 0x00080000
517 #define LAN9250_HMAC_CR_PRMS 0x00040000
518 #define LAN9250_HMAC_CR_INVFILT 0x00020000
519 #define LAN9250_HMAC_CR_PASSBAD 0x00010000
520 #define LAN9250_HMAC_CR_HO 0x00008000
521 #define LAN9250_HMAC_CR_HPFILT 0x00002000
522 #define LAN9250_HMAC_CR_BCAST 0x00000800
523 #define LAN9250_HMAC_CR_DISRTY 0x00000400
524 #define LAN9250_HMAC_CR_PADSTR 0x00000100
525 #define LAN9250_HMAC_CR_BOLMT 0x000000C0
526 #define LAN9250_HMAC_CR_BOLMT_10_BITS 0x00000000
527 #define LAN9250_HMAC_CR_BOLMT_8_BITS 0x00000040
528 #define LAN9250_HMAC_CR_BOLMT_4_BITS 0x00000080
529 #define LAN9250_HMAC_CR_BOLMT_1_BIT 0x000000C0
530 #define LAN9250_HMAC_CR_DFCHK 0x00000020
531 #define LAN9250_HMAC_CR_TXEN 0x00000008
532 #define LAN9250_HMAC_CR_RXEN 0x00000004
533 
534 //Host MAC Address High register
535 #define LAN9250_HMAC_ADDRH_PHY_ADR_47_32 0x0000FFFF
536 
537 //Host MAC Address Low register
538 #define LAN9250_HMAC_ADDRL_PHY_ADR_31_0 0xFFFFFFFF
539 
540 //Host MAC MII Access register
541 #define LAN9250_HMAC_MII_ACC_PHY_ADDR 0x0000F800
542 #define LAN9250_HMAC_MII_ACC_PHY_ADDR_DEFAULT 0x00000800
543 #define LAN9250_HMAC_MII_ACC_MIIRINDA 0x000007C0
544 #define LAN9250_HMAC_MII_ACC_MIIW_R 0x00000002
545 #define LAN9250_HMAC_MII_ACC_MIIBZY 0x00000001
546 
547 //Host MAC MII Data register
548 #define LAN9250_HMAC_MII_DATA_MII_DATA 0x0000FFFF
549 
550 //Host MAC Flow Control register
551 #define LAN9250_HMAC_FLOW_FCPT 0xFFFF0000
552 #define LAN9250_HMAC_FLOW_FCPASS 0x00000004
553 #define LAN9250_HMAC_FLOW_FCEN 0x00000002
554 #define LAN9250_HMAC_FLOW_FCBSY 0x00000001
555 
556 //Host MAC VLAN1 Tag register
557 #define LAN9250_HMAC_VLAN1_VTI1 0x0000FFFF
558 
559 //Host MAC VLAN2 Tag register
560 #define LAN9250_HMAC_VLAN2_VTI2 0x0000FFFF
561 
562 //Host MAC Wake-up Frame Filter register
563 #define LAN9250_HMAC_WUFF_WFF 0xFFFFFFFF
564 
565 //Host MAC Wake-up Control and Status register
566 #define LAN9250_HMAC_WUCSR_WFF_PTR_RST 0x80000000
567 #define LAN9250_HMAC_WUCSR_GUE 0x00000200
568 #define LAN9250_HMAC_WUCSR_WOL_WAIT_SLEEP 0x00000100
569 #define LAN9250_HMAC_WUCSR_PFDA_FR 0x00000080
570 #define LAN9250_HMAC_WUCSR_WUFR 0x00000040
571 #define LAN9250_HMAC_WUCSR_MPR 0x00000020
572 #define LAN9250_HMAC_WUCSR_BCAST_FR 0x00000010
573 #define LAN9250_HMAC_WUCSR_PFDA_EN 0x00000008
574 #define LAN9250_HMAC_WUCSR_WUEN 0x00000004
575 #define LAN9250_HMAC_WUCSR_MPEN 0x00000002
576 #define LAN9250_HMAC_WUCSR_BCST_EN 0x00000001
577 
578 //Host MAC Checksum Offload Engine Control register
579 #define LAN9250_HMAC_COE_CR_TX_COE_EN 0x00010000
580 #define LAN9250_HMAC_COE_CR_RX_COE_MODE 0x00000002
581 #define LAN9250_HMAC_COE_CR_RX_COE_EN 0x00000001
582 
583 //Host MAC EEE Time Wait TX System register
584 #define LAN9250_HMAC_EEE_TW_TX_SYS_TX_DELAY 0x00FFFFFF
585 
586 //PHY Basic Control register
587 #define LAN9250_PHY_BASIC_CONTROL_PHY_SRST 0x8000
588 #define LAN9250_PHY_BASIC_CONTROL_PHY_LOOPBACK 0x4000
589 #define LAN9250_PHY_BASIC_CONTROL_PHY_SPEED_SEL_LSB 0x2000
590 #define LAN9250_PHY_BASIC_CONTROL_PHY_AN 0x1000
591 #define LAN9250_PHY_BASIC_CONTROL_PHY_PWR_DWN 0x0800
592 #define LAN9250_PHY_BASIC_CONTROL_PHY_RST_AN 0x0200
593 #define LAN9250_PHY_BASIC_CONTROL_PHY_DUPLEX 0x0100
594 #define LAN9250_PHY_BASIC_CONTROL_PHY_COL_TEST 0x0080
595 
596 //PHY Basic Status register
597 #define LAN9250_PHY_BASIC_STATUS_100BT4 0x8000
598 #define LAN9250_PHY_BASIC_STATUS_100BTX_FD 0x4000
599 #define LAN9250_PHY_BASIC_STATUS_100BTX_HD 0x2000
600 #define LAN9250_PHY_BASIC_STATUS_10BT_FD 0x1000
601 #define LAN9250_PHY_BASIC_STATUS_10BT_HD 0x0800
602 #define LAN9250_PHY_BASIC_STATUS_100BT2_FD 0x0400
603 #define LAN9250_PHY_BASIC_STATUS_100BT2_HD 0x0200
604 #define LAN9250_PHY_BASIC_STATUS_EXTENDED_STATUS 0x0100
605 #define LAN9250_PHY_BASIC_STATUS_UNIDIRECTIONAL_ABLE 0x0080
606 #define LAN9250_PHY_BASIC_STATUS_MF_PREAMBLE_SUPPR 0x0040
607 #define LAN9250_PHY_BASIC_STATUS_AN_COMPLETE 0x0020
608 #define LAN9250_PHY_BASIC_STATUS_REMOTE_FAULT 0x0010
609 #define LAN9250_PHY_BASIC_STATUS_AN_CAPABLE 0x0008
610 #define LAN9250_PHY_BASIC_STATUS_LINK_STATUS 0x0004
611 #define LAN9250_PHY_BASIC_STATUS_JABBER_DETECT 0x0002
612 #define LAN9250_PHY_BASIC_STATUS_EXTENDED_CAPABLE 0x0001
613 
614 //PHY Identification MSB register
615 #define LAN9250_PHY_ID_MSB_PHY_ID_MSB 0xFFFF
616 #define LAN9250_PHY_ID_MSB_PHY_ID_MSB_DEFAULT 0x0007
617 
618 //PHY Identification LSB register
619 #define LAN9250_PHY_ID_LSB_PHY_ID_LSB 0xFC00
620 #define LAN9250_PHY_ID_LSB_PHY_ID_LSB_DEFAULT 0xC000
621 #define LAN9250_PHY_ID_LSB_MODEL_NUM 0x03F0
622 #define LAN9250_PHY_ID_LSB_MODEL_NUM_DEFAULT 0x0140
623 #define LAN9250_PHY_ID_LSB_REVISION_NUM 0x000F
624 
625 //PHY Auto-Negotiation Advertisement register
626 #define LAN9250_PHY_AN_ADV_NEXT_PAGE 0x8000
627 #define LAN9250_PHY_AN_ADV_REMOTE_FAULT 0x2000
628 #define LAN9250_PHY_AN_ADV_EXTENDED_NEXT_PAGE 0x1000
629 #define LAN9250_PHY_AN_ADV_ASYM_PAUSE 0x0800
630 #define LAN9250_PHY_AN_ADV_SYM_PAUSE 0x0400
631 #define LAN9250_PHY_AN_ADV_100BTX_FD 0x0100
632 #define LAN9250_PHY_AN_ADV_100BTX_HD 0x0080
633 #define LAN9250_PHY_AN_ADV_10BT_FD 0x0040
634 #define LAN9250_PHY_AN_ADV_10BT_HD 0x0020
635 #define LAN9250_PHY_AN_ADV_SELECTOR 0x001F
636 #define LAN9250_PHY_AN_ADV_SELECTOR_DEFAULT 0x0001
637 
638 //PHY Auto-Negotiation Link Partner Base Page Ability register
639 #define LAN9250_PHY_AN_LP_BASE_ABILITY_NEXT_PAGE 0x8000
640 #define LAN9250_PHY_AN_LP_BASE_ABILITY_ACK 0x4000
641 #define LAN9250_PHY_AN_LP_BASE_ABILITY_REMOTE_FAULT 0x2000
642 #define LAN9250_PHY_AN_LP_BASE_ABILITY_EXTENDED_NEXT_PAGE 0x1000
643 #define LAN9250_PHY_AN_LP_BASE_ABILITY_ASYM_PAUSE 0x0800
644 #define LAN9250_PHY_AN_LP_BASE_ABILITY_SYM_PAUSE 0x0400
645 #define LAN9250_PHY_AN_LP_BASE_ABILITY_100BT4 0x0200
646 #define LAN9250_PHY_AN_LP_BASE_ABILITY_100BTX_FD 0x0100
647 #define LAN9250_PHY_AN_LP_BASE_ABILITY_100BTX_HD 0x0080
648 #define LAN9250_PHY_AN_LP_BASE_ABILITY_10BT_FD 0x0040
649 #define LAN9250_PHY_AN_LP_BASE_ABILITY_10BT_HD 0x0020
650 #define LAN9250_PHY_AN_LP_BASE_ABILITY_SELECTOR 0x001F
651 #define LAN9250_PHY_AN_LP_BASE_ABILITY_SELECTOR_DEFAULT 0x0001
652 
653 //PHY Auto-Negotiation Expansion register
654 #define LAN9250_PHY_AN_EXP_RX_NEXT_PAGE_LOC_ABLE 0x0040
655 #define LAN9250_PHY_AN_EXP_RX_NEXT_PAGE_STOR_LOC 0x0020
656 #define LAN9250_PHY_AN_EXP_PAR_DETECT_FAULT 0x0010
657 #define LAN9250_PHY_AN_EXP_LP_NEXT_PAGE_ABLE 0x0008
658 #define LAN9250_PHY_AN_EXP_NEXT_PAGE_ABLE 0x0004
659 #define LAN9250_PHY_AN_EXP_PAGE_RECEIVED 0x0002
660 #define LAN9250_PHY_AN_EXP_LP_AN_ABLE 0x0001
661 
662 //PHY Auto Negotiation Next Page TX register
663 #define LAN9250_PHY_AN_NP_TX_NEXT_PAGE 0x8000
664 #define LAN9250_PHY_AN_NP_TX_MSG_PAGE 0x2000
665 #define LAN9250_PHY_AN_NP_TX_ACK2 0x1000
666 #define LAN9250_PHY_AN_NP_TX_TOGGLE 0x0800
667 #define LAN9250_PHY_AN_NP_TX_MESSAGE 0x07FF
668 
669 //PHY Auto Negotiation Next Page RX register
670 #define LAN9250_PHY_AN_NP_RX_NEXT_PAGE 0x8000
671 #define LAN9250_PHY_AN_NP_RX_ACK 0x4000
672 #define LAN9250_PHY_AN_NP_RX_MSG_PAGE 0x2000
673 #define LAN9250_PHY_AN_NP_RX_ACK2 0x1000
674 #define LAN9250_PHY_AN_NP_RX_TOGGLE 0x0800
675 #define LAN9250_PHY_AN_NP_RX_MESSAGE 0x07FF
676 
677 //PHY MMD Access Control register
678 #define LAN9250_PHY_MMD_ACCESS_FUNC 0xC000
679 #define LAN9250_PHY_MMD_ACCESS_FUNC_ADDR 0x0000
680 #define LAN9250_PHY_MMD_ACCESS_FUNC_DATA_NO_POST_INC 0x4000
681 #define LAN9250_PHY_MMD_ACCESS_DEVAD 0x001F
682 
683 //PHY Mode Control/Status register
684 #define LAN9250_PHY_MODE_CONTROL_STATUS_EDPWRDOWN 0x2000
685 #define LAN9250_PHY_MODE_CONTROL_STATUS_ALTINT 0x0040
686 #define LAN9250_PHY_MODE_CONTROL_STATUS_ENERGYON 0x0002
687 
688 //PHY Special Modes register
689 #define LAN9250_PHY_SPECIAL_MODES_FX_MODE 0x0400
690 #define LAN9250_PHY_SPECIAL_MODES_MODE 0x00E0
691 #define LAN9250_PHY_SPECIAL_MODES_MODE_10BT_HD 0x0000
692 #define LAN9250_PHY_SPECIAL_MODES_MODE_10BT_FD 0x0020
693 #define LAN9250_PHY_SPECIAL_MODES_MODE_100BTX_HD 0x0040
694 #define LAN9250_PHY_SPECIAL_MODES_MODE_100BTX_FD 0x0060
695 #define LAN9250_PHY_SPECIAL_MODES_MODE_POWER_DOWN 0x00C0
696 #define LAN9250_PHY_SPECIAL_MODES_MODE_AN 0x00E0
697 #define LAN9250_PHY_SPECIAL_MODES_PHYADD 0x001F
698 
699 //PHY TDR Patterns/Delay Control register
700 #define LAN9250_PHY_TDR_PAT_DELAY_TDR_DELAY_IN 0x8000
701 #define LAN9250_PHY_TDR_PAT_DELAY_TDR_LINE_BREAK_COUNTER 0x7000
702 #define LAN9250_PHY_TDR_PAT_DELAY_TDR_PATTERN_HIGH 0x0FC0
703 #define LAN9250_PHY_TDR_PAT_DELAY_TDR_PATTERN_LOW 0x003F
704 
705 //PHY TDR Control/Status register
706 #define LAN9250_PHY_TDR_CONTROL_STAT_TDR_EN 0x8000
707 #define LAN9250_PHY_TDR_CONTROL_STAT_TDR_AD_FILTER_EN 0x4000
708 #define LAN9250_PHY_TDR_CONTROL_STAT_TDR_CH_CABLE_TYPE 0x0600
709 #define LAN9250_PHY_TDR_CONTROL_STAT_TDR_CH_CABLE_TYPE_DEFAULT 0x0000
710 #define LAN9250_PHY_TDR_CONTROL_STAT_TDR_CH_CABLE_TYPE_SHORTED 0x0200
711 #define LAN9250_PHY_TDR_CONTROL_STAT_TDR_CH_CABLE_TYPE_OPEN 0x0400
712 #define LAN9250_PHY_TDR_CONTROL_STAT_TDR_CH_CABLE_TYPE_MATCH 0x0600
713 #define LAN9250_PHY_TDR_CONTROL_STAT_TDR_CH_STATUS 0x0100
714 #define LAN9250_PHY_TDR_CONTROL_STAT_TDR_CH_LENGTH 0x00FF
715 
716 //PHY Symbol Error Counter register
717 #define LAN9250_PHY_SYMBOL_ERR_COUNTER_SYM_ERR_CNT 0xFFFF
718 
719 //PHY Special Control/Status Indication register
720 #define LAN9250_PHY_SPECIAL_CONTROL_STAT_IND_AMDIXCTRL 0x8000
721 #define LAN9250_PHY_SPECIAL_CONTROL_STAT_IND_AMDIXEN 0x4000
722 #define LAN9250_PHY_SPECIAL_CONTROL_STAT_IND_AMDIXSTATE 0x2000
723 #define LAN9250_PHY_SPECIAL_CONTROL_STAT_IND_SQEOFF 0x0800
724 #define LAN9250_PHY_SPECIAL_CONTROL_STAT_IND_FEFI_EN 0x0020
725 #define LAN9250_PHY_SPECIAL_CONTROL_STAT_IND_XPOL 0x0010
726 
727 //PHY Cable Length register
728 #define LAN9250_PHY_CABLE_LEN_CBLN 0xF000
729 
730 //PHY Interrupt Source Flags register
731 #define LAN9250_PHY_INTERRUPT_SOURCE_LINK_UP 0x0200
732 #define LAN9250_PHY_INTERRUPT_SOURCE_ENERGYON 0x0080
733 #define LAN9250_PHY_INTERRUPT_SOURCE_AN_COMPLETE 0x0040
734 #define LAN9250_PHY_INTERRUPT_SOURCE_REMOTE_FAULT 0x0020
735 #define LAN9250_PHY_INTERRUPT_SOURCE_LINK_DOWN 0x0010
736 #define LAN9250_PHY_INTERRUPT_SOURCE_AN_LP_ACK 0x0008
737 #define LAN9250_PHY_INTERRUPT_SOURCE_PARALLEL_DETECT_FAULT 0x0004
738 #define LAN9250_PHY_INTERRUPT_SOURCE_AN_PAGE_RECEIVED 0x0002
739 
740 //PHY Interrupt Mask register
741 #define LAN9250_PHY_INTERRUPT_MASK_LINK_UP 0x0200
742 #define LAN9250_PHY_INTERRUPT_MASK_ENERGYON 0x0080
743 #define LAN9250_PHY_INTERRUPT_MASK_AN_COMPLETE 0x0040
744 #define LAN9250_PHY_INTERRUPT_MASK_REMOTE_FAULT 0x0020
745 #define LAN9250_PHY_INTERRUPT_MASK_LINK_DOWN 0x0010
746 #define LAN9250_PHY_INTERRUPT_MASK_AN_LP_ACK 0x0008
747 #define LAN9250_PHY_INTERRUPT_MASK_PARALLEL_DETECT_FAULT 0x0004
748 #define LAN9250_PHY_INTERRUPT_MASK_AN_PAGE_RECEIVED 0x0002
749 
750 //PHY Special Control/Status register
751 #define LAN9250_PHY_SPECIAL_CONTROL_STATUS_AUTODONE 0x1000
752 #define LAN9250_PHY_SPECIAL_CONTROL_STATUS_SPEED 0x001C
753 #define LAN9250_PHY_SPECIAL_CONTROL_STATUS_SPEED_10BT_HD 0x0004
754 #define LAN9250_PHY_SPECIAL_CONTROL_STATUS_SPEED_100BTX_HD 0x0008
755 #define LAN9250_PHY_SPECIAL_CONTROL_STATUS_SPEED_10BT_FD 0x0014
756 #define LAN9250_PHY_SPECIAL_CONTROL_STATUS_SPEED_100BTX_FD 0x0018
757 
758 //C++ guard
759 #ifdef __cplusplus
760 extern "C" {
761 #endif
762 
763 //LAN9250 driver
764 extern const NicDriver lan9250Driver;
765 
766 //LAN9250 related functions
767 error_t lan9250Init(NetInterface *interface);
768 void lan9250InitHook(NetInterface *interface);
769 
770 void lan9250Tick(NetInterface *interface);
771 
772 void lan9250EnableIrq(NetInterface *interface);
773 void lan9250DisableIrq(NetInterface *interface);
775 void lan9250EventHandler(NetInterface *interface);
776 
778  const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary);
779 
781 void lan9250DropPacket(NetInterface *interface, size_t length);
782 
784 
785 void lan9250WriteSysReg(NetInterface *interface, uint16_t address,
786  uint32_t data);
787 
788 uint32_t lan9250ReadSysReg(NetInterface *interface, uint16_t address);
789 void lan9250DumpSysReg(NetInterface *interface);
790 
791 void lan9250WriteMacReg(NetInterface *interface, uint8_t address,
792  uint32_t data);
793 
794 uint32_t lan9250ReadMacReg(NetInterface *interface, uint8_t address);
795 void lan9250DumpMacReg(NetInterface *interface);
796 
797 void lan9250WritePhyReg(NetInterface *interface, uint8_t address,
798  uint16_t data);
799 
800 uint16_t lan9250ReadPhyReg(NetInterface *interface, uint8_t address);
801 void lan9250DumpPhyReg(NetInterface *interface);
802 
803 void lan9250WriteMmdReg(NetInterface *interface, uint8_t devAddr,
804  uint16_t regAddr, uint16_t data);
805 
806 uint16_t lan9250ReadMmdReg(NetInterface *interface, uint8_t devAddr,
807  uint16_t regAddr);
808 
809 void lan9250WriteFifo(NetInterface *interface, const uint8_t *data,
810  size_t length);
811 
812 void lan9250ReadFifo(NetInterface *interface, uint8_t *data, size_t length);
813 
814 uint32_t lan9250CalcCrc(const void *data, size_t length);
815 
816 //C++ guard
817 #ifdef __cplusplus
818 }
819 #endif
820 
821 #endif
int bool_t
Definition: compiler_port.h:53
error_t
Error codes.
Definition: error.h:43
uint8_t data[]
Definition: ethernet.h:222
Ipv6Addr address[]
Definition: ipv6.h:316
const NicDriver lan9250Driver
LAN9250 driver.
void lan9250WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
void lan9250WriteSysReg(NetInterface *interface, uint16_t address, uint32_t data)
Write system CSR register.
void lan9250DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
void lan9250EventHandler(NetInterface *interface)
LAN9250 event handler.
error_t lan9250SendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary)
Send a packet.
error_t lan9250ReceivePacket(NetInterface *interface)
Receive a packet.
void lan9250WriteMacReg(NetInterface *interface, uint8_t address, uint32_t data)
Write host MAC CSR register.
uint32_t lan9250ReadSysReg(NetInterface *interface, uint16_t address)
Read system CSR register.
void lan9250InitHook(NetInterface *interface)
LAN9250 custom configuration.
void lan9250WriteFifo(NetInterface *interface, const uint8_t *data, size_t length)
Write TX FIFO.
error_t lan9250UpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
void lan9250DropPacket(NetInterface *interface, size_t length)
Drop the received packet.
bool_t lan9250IrqHandler(NetInterface *interface)
LAN9250 interrupt service routine.
uint16_t lan9250ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
uint16_t lan9250ReadMmdReg(NetInterface *interface, uint8_t devAddr, uint16_t regAddr)
Read MMD register.
uint32_t lan9250ReadMacReg(NetInterface *interface, uint8_t address)
Read host MAC CSR register.
void lan9250WriteMmdReg(NetInterface *interface, uint8_t devAddr, uint16_t regAddr, uint16_t data)
Write MMD register.
void lan9250ReadFifo(NetInterface *interface, uint8_t *data, size_t length)
Read RX FIFO.
void lan9250DumpMacReg(NetInterface *interface)
Dump host MAC CSR registers for debugging purpose.
void lan9250EnableIrq(NetInterface *interface)
Enable interrupts.
uint32_t lan9250CalcCrc(const void *data, size_t length)
CRC calculation.
void lan9250DumpSysReg(NetInterface *interface)
Dump system CSR registers for debugging purpose.
void lan9250Tick(NetInterface *interface)
LAN9250 timer handler.
error_t lan9250Init(NetInterface *interface)
LAN9250 controller initialization.
void lan9250DisableIrq(NetInterface *interface)
Disable interrupts.
uint16_t regAddr
#define NetInterface
Definition: net.h:36
#define NetTxAncillary
Definition: net_misc.h:36
Network interface controller abstraction layer.
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:89
NIC driver.
Definition: nic.h:283
uint8_t length
Definition: tcp.h:368