ncv7410_driver.h
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1 /**
2  * @file ncv7410_driver.h
3  * @brief Onsemi NCV7410 10Base-T1S Ethernet controller
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2025 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.5.2
29  **/
30 
31 #ifndef _NCV7410_DRIVER_H
32 #define _NCV7410_DRIVER_H
33 
34 //Dependencies
35 #include "core/nic.h"
36 
37 //PLCA support
38 #ifndef NCV7410_PLCA_SUPPORT
39  #define NCV7410_PLCA_SUPPORT ENABLED
40 #elif (NCV7410_PLCA_SUPPORT != ENABLED && NCV7410_PLCA_SUPPORT != DISABLED)
41  #error NCV7410_PLCA_SUPPORT parameter is not valid
42 #endif
43 
44 //Node count
45 #ifndef NCV7410_NODE_COUNT
46  #define NCV7410_NODE_COUNT 8
47 #elif (NCV7410_NODE_COUNT < 0 || NCV7410_NODE_COUNT > 255)
48  #error NCV7410_NODE_COUNT parameter is not valid
49 #endif
50 
51 //Local ID
52 #ifndef NCV7410_LOCAL_ID
53  #define NCV7410_LOCAL_ID 1
54 #elif (NCV7410_LOCAL_ID < 0 || NCV7410_LOCAL_ID > 255)
55  #error NCV7410_LOCAL_ID parameter is not valid
56 #endif
57 
58 //RX buffer size
59 #ifndef NCV7410_ETH_RX_BUFFER_SIZE
60  #define NCV7410_ETH_RX_BUFFER_SIZE 1536
61 #elif (NCV7410_ETH_RX_BUFFER_SIZE != 1536)
62  #error NCV7410_ETH_RX_BUFFER_SIZE parameter is not valid
63 #endif
64 
65 //Chunk payload size
66 #define NCV7410_CHUNK_PAYLOAD_SIZE 64
67 
68 //Transmit data header
69 #define NCV7410_TX_HEADER_DNC 0x80000000
70 #define NCV7410_TX_HEADER_SEQ 0x40000000
71 #define NCV7410_TX_HEADER_NORX 0x20000000
72 #define NCV7410_TX_HEADER_VS 0x00C00000
73 #define NCV7410_TX_HEADER_DV 0x00200000
74 #define NCV7410_TX_HEADER_SV 0x00100000
75 #define NCV7410_TX_HEADER_SWO 0x000F0000
76 #define NCV7410_TX_HEADER_EV 0x00004000
77 #define NCV7410_TX_HEADER_EBO 0x00003F00
78 #define NCV7410_TX_HEADER_TSC 0x000000C0
79 #define NCV7410_TX_HEADER_P 0x00000001
80 
81 //Receive data footer
82 #define NCV7410_RX_FOOTER_EXST 0x80000000
83 #define NCV7410_RX_FOOTER_HDRB 0x40000000
84 #define NCV7410_RX_FOOTER_SYNC 0x20000000
85 #define NCV7410_RX_FOOTER_RCA 0x1F000000
86 #define NCV7410_RX_FOOTER_VS 0x00C00000
87 #define NCV7410_RX_FOOTER_DV 0x00200000
88 #define NCV7410_RX_FOOTER_SV 0x00100000
89 #define NCV7410_RX_FOOTER_SWO 0x000F0000
90 #define NCV7410_RX_FOOTER_FD 0x00008000
91 #define NCV7410_RX_FOOTER_EV 0x00004000
92 #define NCV7410_RX_FOOTER_EBO 0x00003F00
93 #define NCV7410_RX_FOOTER_RTSA 0x00000080
94 #define NCV7410_RX_FOOTER_RTSP 0x00000040
95 #define NCV7410_RX_FOOTER_TXC 0x0000003E
96 #define NCV7410_RX_FOOTER_P 0x00000001
97 
98 //Control command header
99 #define NCV7410_CTRL_HEADER_DNC 0x80000000
100 #define NCV7410_CTRL_HEADER_HDRB 0x40000000
101 #define NCV7410_CTRL_HEADER_WNR 0x20000000
102 #define NCV7410_CTRL_HEADER_AID 0x10000000
103 #define NCV7410_CTRL_HEADER_MMS 0x0F000000
104 #define NCV7410_CTRL_HEADER_ADDR 0x00FFFF00
105 #define NCV7410_CTRL_HEADER_LEN 0x000000FE
106 #define NCV7410_CTRL_HEADER_P 0x00000001
107 
108 //Memory map selectors
109 #define NCV7410_MMS_STD 0x00
110 #define NCV7410_MMS_MAC 0x01
111 #define NCV7410_MMS_PHY_PCS 0x02
112 #define NCV7410_MMS_PHY_PMA_PMD 0x03
113 #define NCV7410_MMS_PHY_PLCA 0x04
114 #define NCV7410_MMS_PHY_VS 0x0C
115 
116 //NCV7410 Standard Control and Status registers (MMS 0)
117 #define NCV7410_IDVER 0x00, 0x0000
118 #define NCV7410_PHYID 0x00, 0x0001
119 #define NCV7410_SPICAP 0x00, 0x0002
120 #define NCV7410_RESET 0x00, 0x0003
121 #define NCV7410_CONFIG0 0x00, 0x0004
122 #define NCV7410_STATUS0 0x00, 0x0008
123 #define NCV7410_BUFSTS 0x00, 0x000B
124 #define NCV7410_IMASK 0x00, 0x000C
125 #define NCV7410_PHYCTRL 0x00, 0xFF00
126 #define NCV7410_PHYSTATUS 0x00, 0xFF01
127 #define NCV7410_PHYID0 0x00, 0xFF02
128 #define NCV7410_PHYID1 0x00, 0xFF03
129 
130 //NCV7410 MAC registers (MMS 1)
131 #define NCV7410_MACCTRL0 0x01, 0x0000
132 #define NCV7410_ADDRFILT0L 0x01, 0x0010
133 #define NCV7410_ADDRFILT0H 0x01, 0x0011
134 #define NCV7410_ADDRFILT1L 0x01, 0x0012
135 #define NCV7410_ADDRFILT1H 0x01, 0x0013
136 #define NCV7410_ADDRFILT2L 0x01, 0x0014
137 #define NCV7410_ADDRFILT2H 0x01, 0x0015
138 #define NCV7410_ADDRFILT3L 0x01, 0x0016
139 #define NCV7410_ADDRFILT3H 0x01, 0x0017
140 #define NCV7410_ADDRMASK0L 0x01, 0x0020
141 #define NCV7410_ADDRMASK0H 0x01, 0x0021
142 #define NCV7410_ADDRMASK1L 0x01, 0x0022
143 #define NCV7410_ADDRMASK1H 0x01, 0x0023
144 #define NCV7410_ADDRMASK2L 0x01, 0x0024
145 #define NCV7410_ADDRMASK2H 0x01, 0x0025
146 #define NCV7410_ADDRMASK3L 0x01, 0x0026
147 #define NCV7410_ADDRMASK3H 0x01, 0x0027
148 #define NCV7410_STOCTETSTXL 0x01, 0x0030
149 #define NCV7410_STOCTETSTXH 0x01, 0x0031
150 #define NCV7410_STFRAMESTXOK 0x01, 0x0032
151 #define NCV7410_STBCASTTXOK 0x01, 0x0033
152 #define NCV7410_STMCASTTXOK 0x01, 0x0034
153 #define NCV7410_STFRAMESTX64 0x01, 0x0035
154 #define NCV7410_STFRAMESTX65 0x01, 0x0036
155 #define NCV7410_STFRAMESTX128 0x01, 0x0037
156 #define NCV7410_STFRAMESTX256 0x01, 0x0038
157 #define NCV7410_STFRAMESTX512 0x01, 0x0039
158 #define NCV7410_STFRAMESTX1024 0x01, 0x003A
159 #define NCV7410_STUNDERFLOW 0x01, 0x003B
160 #define NCV7410_STSINGLECOL 0x01, 0x003C
161 #define NCV7410_STMULTICOL 0x01, 0x003D
162 #define NCV7410_STEXCESSCOL 0x01, 0x003E
163 #define NCV7410_STDEFERREDTX 0x01, 0x003F
164 #define NCV7410_STCRSERR 0x01, 0x0040
165 #define NCV7410_STOCTETSRXL 0x01, 0x0041
166 #define NCV7410_STOCTETSRXH 0x01, 0x0042
167 #define NCV7410_STFRAMESRXOK 0x01, 0x0043
168 #define NCV7410_STBCASTRXOK 0x01, 0x0044
169 #define NCV7410_STMCASTRXOK 0x01, 0x0045
170 #define NCV7410_STFRAMESRX64 0x01, 0x0046
171 #define NCV7410_STFRAMESRX65 0x01, 0x0047
172 #define NCV7410_STFRAMESRX128 0x01, 0x0048
173 #define NCV7410_STFRAMESRX256 0x01, 0x0049
174 #define NCV7410_STFRAMESRX512 0x01, 0x004A
175 #define NCV7410_STFRAMESRX1024 0x01, 0x004B
176 #define NCV7410_STRUNTERR 0x01, 0x004C
177 #define NCV7410_STRXTOOLONG 0x01, 0x004D
178 #define NCV7410_STFCSERRS 0x01, 0x004E
179 #define NCV7410_STSYMBOLERRS 0x01, 0x004F
180 #define NCV7410_STALIGNERRS 0x01, 0x0050
181 #define NCV7410_STRXOVERFLOW 0x01, 0x0051
182 #define NCV7410_STRXDROPPED 0x01, 0x0052
183 
184 //NCV7410 PHY PCS registers (MMS 2)
185 #define NCV7410_PCS_DEVINPKG1 0x02, 0x0005
186 #define NCV7410_PCS_DEVINPKG2 0x02, 0x0006
187 #define NCV7410_T1SPCSCTRL 0x02, 0x08F3
188 #define NCV7410_T1SPCSSTATUS 0x02, 0x08F4
189 #define NCV7410_T1SPCSDIAG1 0x02, 0x08F5
190 #define NCV7410_T1SPCSDIAG2 0x02, 0x08F6
191 
192 //NCV7410 PHY PMA/PMD registers (MMS 3)
193 #define NCV7410_PMA_DEVINPKG1 0x03, 0x0005
194 #define NCV7410_PMA_DEVINPKG2 0x03, 0x0006
195 #define NCV7410_BASET1EXTABLTY 0x03, 0x0012
196 #define NCV7410_T1SPMACTRL 0x03, 0x08F9
197 #define NCV7410_T1SPMASTS 0x03, 0x08FA
198 #define NCV7410_T1STMCTL 0x03, 0x08FB
199 
200 //NCV7410 PHY PLCA registers (MMS 4)
201 #define NCV7410_CHIPREV 0x04, 0x8000
202 #define NCV7410_PHYCFG1 0x04, 0x8001
203 #define NCV7410_PLCAEXT 0x04, 0x8002
204 #define NCV7410_PMATUNE0 0x04, 0x8003
205 #define NCV7410_PMATUNE1 0x04, 0x8004
206 #define NCV7410_PLCIDVER 0x04, 0xCA00
207 #define NCV7410_PLCACTRL0 0x04, 0xCA01
208 #define NCV7410_PLCACTRL1 0x04, 0xCA02
209 #define NCV7410_PLCASTATUS 0x04, 0xCA03
210 #define NCV7410_PLCATOTMR 0x04, 0xCA04
211 #define NCV7410_PLCABURST 0x04, 0xCA05
212 
213 //NCV7410 Vendor Specific registers (MMS 12)
214 #define NCV7410_MIIMIRQCTRL 0x0C, 0x0010
215 #define NCV7410_MIIMIRQSTS 0x0C, 0x0011
216 #define NCV7410_DIOCFG 0x0C, 0x0012
217 #define NCV7410_TDCTRL 0x0C, 0x0016
218 #define NCV7410_TDSTATUS 0x0C, 0x0017
219 #define NCV7410_TDRES 0x0C, 0x0018
220 #define NCV7410_TDPRES 0x0C, 0x0019
221 #define NCV7410_TRCT 0x0C, 0x001A
222 #define NCV7410_PHYCFG0 0x0C, 0x1001
223 #define NCV7410_MACID0 0x0C, 0x1002
224 #define NCV7410_MACID1 0x0C, 0x1003
225 #define NCV7410_CHIPINFO 0x0C, 0x1004
226 #define NCV7410_NVMHEALTH 0x0C, 0x1005
227 
228 //SPI Identification register
229 #define NCV7410_IDVER_MAJVER 0x000000F0
230 #define NCV7410_IDVER_MAJVER_DEFAULT 0x00000010
231 #define NCV7410_IDVER_MINVER 0x0000000F
232 #define NCV7410_IDVER_MINVER_DEFAULT 0x00000001
233 
234 //SPI Identification register
235 #define NCV7410_PHYID_OUI 0xFFFFFC00
236 #define NCV7410_PHYID_OUI_DEFAULT 0x180FF400
237 #define NCV7410_PHYID_MODEL 0x000003F0
238 #define NCV7410_PHYID_MODEL_DEFAULT 0x000001A0
239 #define NCV7410_PHYID_REV 0x0000000F
240 #define NCV7410_PHYID_REV_DEFAULT 0x00000001
241 
242 //SPI Capabilities register
243 #define NCV7410_SPICAP_TXFCSVC 0x00000400
244 #define NCV7410_SPICAP_IPRAC 0x00000200
245 #define NCV7410_SPICAP_DPRAC 0x00000100
246 #define NCV7410_SPICAP_CTC 0x00000080
247 #define NCV7410_SPICAP_FTC 0x00000040
248 #define NCV7410_SPICAP_AIDC 0x00000020
249 #define NCV7410_SPICAP_SEQ 0x00000010
250 #define NCV7410_SPICAP_MINCPS 0x00000007
251 
252 //Reset Control And Status register
253 #define NCV7410_RESET_RESET 0x00000001
254 
255 //SPI Protocol Configuration 0 register
256 #define NCV7410_CONFIG0_SYNC 0x00008000
257 #define NCV7410_CONFIG0_TXFCSVE 0x00004000
258 #define NCV7410_CONFIG0_CSARFE 0x00002000
259 #define NCV7410_CONFIG0_ZARFE 0x00001000
260 #define NCV7410_CONFIG0_TXCTHRESH 0x00000C00
261 #define NCV7410_CONFIG0_TXCTHRESH_1_CREDIT 0x00000000
262 #define NCV7410_CONFIG0_TXCTHRESH_4_CREDITS 0x00000400
263 #define NCV7410_CONFIG0_TXCTHRESH_8_CREDITS 0x00000800
264 #define NCV7410_CONFIG0_TXCTHRESH_16_CREDITS 0x00000C00
265 #define NCV7410_CONFIG0_TXCTE 0x00000200
266 #define NCV7410_CONFIG0_RXCTE 0x00000100
267 #define NCV7410_CONFIG0_FTSE 0x00000080
268 #define NCV7410_CONFIG0_FTSS 0x00000040
269 #define NCV7410_CONFIG0_PROTE 0x00000020
270 #define NCV7410_CONFIG0_CPS 0x00000007
271 #define NCV7410_CONFIG0_CPS_8_BYTES 0x00000003
272 #define NCV7410_CONFIG0_CPS_16_BYTES 0x00000004
273 #define NCV7410_CONFIG0_CPS_32_BYTES 0x00000005
274 #define NCV7410_CONFIG0_CPS_64_BYTES 0x00000006
275 
276 //SPI Protocol Status 0 register
277 #define NCV7410_STATUS0_CDPE 0x00001000
278 #define NCV7410_STATUS0_TXFCSE 0x00000800
279 #define NCV7410_STATUS0_TTSCAC 0x00000400
280 #define NCV7410_STATUS0_TTSCAB 0x00000200
281 #define NCV7410_STATUS0_TTSCAA 0x00000100
282 #define NCV7410_STATUS0_PHYINT 0x00000080
283 #define NCV7410_STATUS0_RESETC 0x00000040
284 #define NCV7410_STATUS0_HDRE 0x00000020
285 #define NCV7410_STATUS0_LOFE 0x00000010
286 #define NCV7410_STATUS0_RXBOE 0x00000008
287 #define NCV7410_STATUS0_TXBUE 0x00000004
288 #define NCV7410_STATUS0_TXBOE 0x00000002
289 #define NCV7410_STATUS0_TXPE 0x00000001
290 
291 //Buffer Status register
292 #define NCV7410_BUFSTS_TXC 0x0000FF00
293 #define NCV7410_BUFSTS_RCA 0x000000FF
294 
295 //Interrupt Mask register
296 #define NCV7410_IMASK_CDPEM 0x00001000
297 #define NCV7410_IMASK_TXFCSEM 0x00000800
298 #define NCV7410_IMASK_PHYINTM 0x00000080
299 #define NCV7410_IMASK_RESETCM 0x00000040
300 #define NCV7410_IMASK_HDREM 0x00000020
301 #define NCV7410_IMASK_LOFEM 0x00000010
302 #define NCV7410_IMASK_RXDOEM 0x00000008
303 #define NCV7410_IMASK_TXBUEM 0x00000004
304 #define NCV7410_IMASK_TXBOEM 0x00000002
305 #define NCV7410_IMASK_TXPEM 0x00000001
306 
307 //PHY Control register
308 #define NCV7410_PHYCTRL_RESET 0x00008000
309 #define NCV7410_PHYCTRL_LOOP 0x00004000
310 #define NCV7410_PHYCTRL_SPD0 0x00002000
311 #define NCV7410_PHYCTRL_LCTL 0x00001000
312 #define NCV7410_PHYCTRL_ISOM 0x00000400
313 #define NCV7410_PHYCTRL_LRST 0x00000200
314 #define NCV7410_PHYCTRL_DUPL 0x00000100
315 #define NCV7410_PHYCTRL_CTEST 0x00000080
316 #define NCV7410_PHYCTRL_SPD1 0x00000040
317 
318 //PHY Status register
319 #define NCV7410_PHYSTATUS_S10M 0x00000800
320 #define NCV7410_PHYSTATUS_UNIA 0x00000080
321 #define NCV7410_PHYSTATUS_PRSUP 0x00000040
322 #define NCV7410_PHYSTATUS_LNOK 0x00000020
323 #define NCV7410_PHYSTATUS_RJAB 0x00000010
324 #define NCV7410_PHYSTATUS_ANAB 0x00000008
325 #define NCV7410_PHYSTATUS_LKST 0x00000004
326 #define NCV7410_PHYSTATUS_LJAB 0x00000002
327 #define NCV7410_PHYSTATUS_EXTC 0x00000001
328 
329 //PHY Identifier 0 register
330 #define NCV7410_PHYID0_OUI_MSB 0x0000FFFF
331 #define NCV7410_PHYID0_OUI_MSB_DEFAULT 0x0000180F
332 
333 //PHY Identifier 1 register
334 #define NCV7410_PHYID1_OUI_LSB 0x0000FC00
335 #define NCV7410_PHYID1_OUI_LSB_DEFAULT 0x0000D400
336 #define NCV7410_PHYID1_MODEL_NUM 0x000003F0
337 #define NCV7410_PHYID1_MODEL_NUM_DEFAULT 0x000001A0
338 #define NCV7410_PHYID1_REV_NUM 0x0000000F
339 #define NCV7410_PHYID1_REV_NUM_DEFAULT 0x00000001
340 
341 //MAC Control 0 register
342 #define NCV7410_MACCTRL0_IPGNF 0x00200000
343 #define NCV7410_MACCTRL0_BKOD 0x00100000
344 #define NCV7410_MACCTRL0_NFCSF 0x00080000
345 #define NCV7410_MACCTRL0_MCSF 0x00040000
346 #define NCV7410_MACCTRL0_BCSF 0x00020000
347 #define NCV7410_MACCTRL0_ADRF 0x00010000
348 #define NCV7410_MACCTRL0_FCSA 0x00000100
349 #define NCV7410_MACCTRL0_TXEN 0x00000002
350 #define NCV7410_MACCTRL0_RXEN 0x00000001
351 
352 //Address Filter Low register
353 #define NCV7410_ADDRFILTnL_ADDRFILT_31_0 0xFFFFFFFF
354 
355 //Address Filter High register
356 #define NCV7410_ADDRFILTnH_EN 0x80000000
357 #define NCV7410_ADDRFILTnH_ADDRFILT_47_32 0x0000FFFF
358 
359 //Address Mask Low register
360 #define NCV7410_ADDRMASKnL_ADDRMASK_31_0 0xFFFFFFFF
361 
362 //Address Mask High register
363 #define NCV7410_ADDRMASKnH_ADDRMASK_47_32 0x00008000
364 
365 //Statistic Sent Bytes Counter Low register
366 #define NCV7410_STOCTETSTXL_STOCTETSTXL_31_0 0xFFFFFFFF
367 
368 //Statistic Sent Bytes Counter High register
369 #define NCV7410_STOCTETSTXH_STOCTETSTXL_47_32 0x0000FFFF
370 
371 //Statistic Aborted Frames Due To TX-buffer Underflow register
372 #define NCV7410_STUNDERFLOW_STUNDERFLOW 0x000003FF
373 
374 //Statistic Frames Transmitted After Single Collision register
375 #define NCV7410_STSINGLECOL_STSINGLECOL 0x0003FFFF
376 
377 //Statistic Frames Transmitted After Multiple Collisions register
378 #define NCV7410_STMULTICOL_STMULTICOL 0x0003FFFF
379 
380 //Statistic Frames Transmitted After Excessive Collisions register
381 #define NCV7410_STEXCESSCOL_STEXCESSCOL 0x000003FF
382 
383 //Statistic Frames Transmitted After Deferral register
384 #define NCV7410_STDEFERREDTX_STDEFERREDTX 0x0003FFFF
385 
386 //Statistic Counter Of CRS De-assertion During Frame Transmission register
387 #define NCV7410_STCRSERR_STCRSERR 0x000003FF
388 
389 //Statistic Received Bytes Counter Low register
390 #define NCV7410_STOCTETSRXL_STOCTETSRX_31_0 0xFFFFFFFF
391 
392 //Statistic Received Bytes Counter High register
393 #define NCV7410_STOCTETSRXH_STOCTETSRX_47_32 0x0000FFFF
394 
395 //Statistic Dropped Too Short Frames register
396 #define NCV7410_STRUNTERR_STRUNTERR 0x000003FF
397 
398 //Statistic Dropped Too Long Frames register
399 #define NCV7410_STRXTOOLONG_STRXTOOLONG 0x000003FF
400 
401 //Statistic Dropped FCS Error Frames register
402 #define NCV7410_STFCSERRS_STFCSERRS 0x000003FF
403 
404 //Statistic Symbol Errors During Frame Reception register
405 #define NCV7410_STSYMBOLERRS_STSYMBOLERRS 0x000003FF
406 
407 //Statistic Align Errors During Frame Reception register
408 #define NCV7410_STALIGNERRS_STALIGNERRS 0x000003FF
409 
410 //Statistic RX Buffer Overflow Errors register
411 #define NCV7410_STRXOVERFLOW_STRXOVERFLOW 0x000003FF
412 
413 //Devices In Package 1 register
414 #define NCV7410_PCS_DEVINPKG1_PCS 0x0008
415 #define NCV7410_PCS_DEVINPKG1_PMA 0x0002
416 #define NCV7410_PCS_DEVINPKG1_CL22 0x0001
417 
418 //10BASE-T1S PCS Control register
419 #define NCV7410_T1SPCSCTRL_PCSRST 0x8000
420 #define NCV7410_T1SPCSCTRL_LOOP 0x4000
421 
422 //10BASE-T1S PCS Status register
423 #define NCV7410_T1SPCSSTATUS_JAB 0x0080
424 
425 //10BASE-T1S PCS Diagnostics 1 register
426 #define NCV7410_T1SPCSDIAG1_REMJAB 0xFFFF
427 
428 //10BASE-T1S PCS Diagnostics 2 register
429 #define NCV7410_T1SPCSDIAG2_CTX 0xFFFF
430 
431 //Devices In Package 1 register
432 #define NCV7410_PMA_DEVINPKG1_PCS 0x0008
433 #define NCV7410_PMA_DEVINPKG1_PMA 0x0002
434 #define NCV7410_PMA_DEVINPKG1_CL22 0x0001
435 
436 //BASE-T1 Extended Ability register
437 #define NCV7410_BASET1EXTABLTY_10T1S 0x0008
438 
439 //10BASE-T1S PMA Control register
440 #define NCV7410_T1SPMACTRL_PMARST 0x8000
441 #define NCV7410_T1SPMACTRL_TXDIS 0x4000
442 #define NCV7410_T1SPMACTRL_MULT 0x0400
443 #define NCV7410_T1SPMACTRL_LOOP 0x0001
444 
445 //10BASE-T1S PMA Status register
446 #define NCV7410_T1SPMASTS_LOOPA 0x2000
447 #define NCV7410_T1SPMASTS_LPWRA 0x0800
448 #define NCV7410_T1SPMASTS_MULTA 0x0400
449 #define NCV7410_T1SPMASTS_RFLTA 0x0200
450 #define NCV7410_T1SPMASTS_RJAB 0x0002
451 
452 //10BASE-T1S Test Mode Control register
453 #define NCV7410_T1STMCTL_TEST_MODE 0xE000
454 #define NCV7410_T1STMCTL_TEST_MODE_NORMAL 0x0000
455 #define NCV7410_T1STMCTL_TEST_MODE_TX_OUT_VOLTAGE_TEST 0x2000
456 #define NCV7410_T1STMCTL_TEST_MODE_TX_OUT_DROP_TEST 0x4000
457 #define NCV7410_T1STMCTL_TEST_MODE_TX_PSD_MASK 0x6000
458 #define NCV7410_T1STMCTL_TEST_MODE_TX_HIGH_Z_TEST 0x8000
459 
460 //Chip Revision register
461 #define NCV7410_CHIPREV_MAJ 0xF000
462 #define NCV7410_CHIPREV_MAJ_DEFAULT 0x1000
463 #define NCV7410_CHIPREV_MIN 0x0F00
464 #define NCV7410_CHIPREV_MIN_DEFAULT 0x0000
465 #define NCV7410_CHIPREV_STAGE 0x00C0
466 #define NCV7410_CHIPREV_STAGE_DEFAULT 0x00C0
467 #define NCV7410_CHIPREV_BUILD 0x003F
468 #define NCV7410_CHIPREV_BUILD_DEFAULT 0x0006
469 
470 //PHY Configuration 1 register
471 #define NCV7410_PHYCFG1_PKTLOOP 0x8000
472 #define NCV7410_PHYCFG1_ENIE 0x0080
473 #define NCV7410_PHYCFG1_UNJT 0x0040
474 #define NCV7410_PHYCFG1_SCRD 0x0004
475 #define NCV7410_PHYCFG1_NCOLM 0x0002
476 #define NCV7410_PHYCFG1_RXDLY 0x0001
477 
478 //PLCA Extensions register
479 #define NCV7410_PLCAEXT_PREN 0x8000
480 #define NCV7410_PLCAEXT_MIIDIS 0x0800
481 #define NCV7410_PLCAEXT_LDEN 0x0002
482 #define NCV7410_PLCAEXT_LDR 0x0001
483 
484 //PMA Tune 0 register
485 #define NCV7410_PMATUNE0_BDT 0x3F00
486 #define NCV7410_PMATUNE0_DCWS 0x0007
487 
488 //PMA Tune 1 register
489 #define NCV7410_PMATUNE1_PPDT 0x3F00
490 #define NCV7410_PMATUNE1_CDT 0x003F
491 
492 //PLCA Register Map And Identification register
493 #define NCV7410_PLCIDVER_MAPID 0xFF00
494 #define NCV7410_PLCIDVER_MAPVER 0x00FF
495 
496 //PLCA Control 0 register
497 #define NCV7410_PLCACTRL0_EN 0x8000
498 #define NCV7410_PLCACTRL0_RST 0x4000
499 
500 //PLCA Control 1 register
501 #define NCV7410_PLCACTRL1_NCNT 0xFF00
502 #define NCV7410_PLCACTRL1_ID 0x00FF
503 
504 //PLCA Status register
505 #define NCV7410_PLCASTATUS_PST 0x8000
506 
507 //PLCA Transmit Opportunity Timer register
508 #define NCV7410_PLCATOTMR_TOTMR 0x00FF
509 #define NCV7410_PLCATOTMR_TOTMR_DEFAULT 0x0018
510 
511 //PLCA Burst Mode register
512 #define NCV7410_PLCABURST_MAXBC 0xFF00
513 #define NCV7410_PLCABURST_MAXBC_DEFAULT 0x0000
514 #define NCV7410_PLCABURST_BTMR 0x00FF
515 #define NCV7410_PLCABURST_BTMR_DEFAULT 0x0080
516 
517 //MIIM Interrupt Control register
518 #define NCV7410_MIIMIRQCTRL_MIPCE 0x0020
519 #define NCV7410_MIIMIRQCTRL_MIPRE 0x0010
520 #define NCV7410_MIIMIRQCTRL_MIRJE 0x0008
521 #define NCV7410_MIIMIRQCTRL_MILJE 0x0004
522 #define NCV7410_MIIMIRQCTRL_MIPSE 0x0002
523 #define NCV7410_MIIMIRQCTRL_MILSE 0x0001
524 
525 //MIIM Interrupt Status register
526 #define NCV7410_MIIMIRQSTS_RSTS 0x8000
527 #define NCV7410_MIIMIRQSTS_MIPCL 0x0020
528 #define NCV7410_MIIMIRQSTS_MIPRL 0x0010
529 #define NCV7410_MIIMIRQSTS_MIRJL 0x0008
530 #define NCV7410_MIIMIRQSTS_MILJL 0x0004
531 #define NCV7410_MIIMIRQSTS_MIPSL 0x0002
532 #define NCV7410_MIIMIRQSTS_MILSL 0x0001
533 
534 //DIO Configuration register
535 #define NCV7410_DIOCFG_SLR1 0x8000
536 #define NCV7410_DIOCFG_PEN1 0x4000
537 #define NCV7410_DIOCFG_PUD1 0x2000
538 #define NCV7410_DIOCFG_PUD1_PULL_UP 0x0000
539 #define NCV7410_DIOCFG_PUD1_PULL_DOWN 0x2000
540 #define NCV7410_DIOCFG_FN1 0x1E00
541 #define NCV7410_DIOCFG_FN1_DISABLE 0x0000
542 #define NCV7410_DIOCFG_FN1_GPIO 0x0200
543 #define NCV7410_DIOCFG_FN1_SFD_TX 0x0400
544 #define NCV7410_DIOCFG_FN1_SFD_RX 0x0600
545 #define NCV7410_DIOCFG_FN1_LED_LINK_CTRL 0x0800
546 #define NCV7410_DIOCFG_FN1_LED_PLCA_STATUS 0x0A00
547 #define NCV7410_DIOCFG_FN1_LED_TX 0x0C00
548 #define NCV7410_DIOCFG_FN1_LED_RX 0x0E00
549 #define NCV7410_DIOCFG_FN1_CLK25M 0x1000
550 #define NCV7410_DIOCFG_FN1_SFD_RX_TX 0x1600
551 #define NCV7410_DIOCFG_FN1_LED_TX_RX 0x1E00
552 #define NCV7410_DIOCFG_VAL1 0x0100
553 #define NCV7410_DIOCFG_SLR0 0x0080
554 #define NCV7410_DIOCFG_PEN0 0x0040
555 #define NCV7410_DIOCFG_PUD0 0x0020
556 #define NCV7410_DIOCFG_PUD0_PULL_UP 0x0000
557 #define NCV7410_DIOCFG_PUD0_PULL_DOWN 0x0020
558 #define NCV7410_DIOCFG_FN0 0x001E
559 #define NCV7410_DIOCFG_FN0_DISABLE 0x0000
560 #define NCV7410_DIOCFG_FN0_GPIO 0x0002
561 #define NCV7410_DIOCFG_FN0_SFD_TX 0x0004
562 #define NCV7410_DIOCFG_FN0_SFD_RX 0x0006
563 #define NCV7410_DIOCFG_FN0_LED_LINK_CTRL 0x0008
564 #define NCV7410_DIOCFG_FN0_LED_PLCA_STATUS 0x000A
565 #define NCV7410_DIOCFG_FN0_LED_TX 0x000C
566 #define NCV7410_DIOCFG_FN0_LED_RX 0x000E
567 #define NCV7410_DIOCFG_FN0_CLK25M 0x0010
568 #define NCV7410_DIOCFG_FN0_SFD_RX_TX 0x0016
569 #define NCV7410_DIOCFG_FN0_LED_TX_RX 0x001E
570 #define NCV7410_DIOCFG_VAL0 0x0001
571 
572 //Topology Discovery Control register
573 #define NCV7410_TDCTRL_TD_ED 0x8000
574 #define NCV7410_TDCTRL_CALM 0x0400
575 #define NCV7410_TDCTRL_MANM 0x0200
576 #define NCV7410_TDCTRL_STRT 0x0100
577 #define NCV7410_TDCTRL_SCRDIR 0x0010
578 #define NCV7410_TDCTRL_REFN 0x0001
579 
580 //Topology Discovery Status register
581 #define NCV7410_TDSTATUS_DONE 0x8000
582 #define NCV7410_TDSTATUS_HNDE 0x0004
583 #define NCV7410_TDSTATUS_MEAE 0x0002
584 #define NCV7410_TDSTATUS_CALE 0x0001
585 
586 //Topology Discovery Result register
587 #define NCV7410_TDRES_CNTV 0xFFFF
588 
589 //Topology Discovery Precision register
590 #define NCV7410_TDPRES_RTMP 0xFFFF
591 
592 //Topology Reference Counter Timer register
593 #define NCV7410_TRCT_RCNT 0xFFFF
594 
595 //PHY Configuration 0 register
596 #define NCV7410_PHYCFG0_TX_GAIN 0xC000
597 #define NCV7410_PHYCFG0_TX_GAIN_1000_MVPP 0x0000
598 #define NCV7410_PHYCFG0_TX_GAIN_1100_MVPP 0x4000
599 #define NCV7410_PHYCFG0_TX_GAIN_900_MVPP 0x8000
600 #define NCV7410_PHYCFG0_TX_GAIN_800_MVPP 0xC000
601 #define NCV7410_PHYCFG0_RX_CD 0x3C00
602 #define NCV7410_PHYCFG0_RX_CD_150_MVPP 0x0000
603 #define NCV7410_PHYCFG0_RX_CD_200_MVPP 0x0400
604 #define NCV7410_PHYCFG0_RX_CD_250_MVPP 0x0800
605 #define NCV7410_PHYCFG0_RX_CD_300_MVPP 0x0C00
606 #define NCV7410_PHYCFG0_RX_CD_350_MVPP 0x1000
607 #define NCV7410_PHYCFG0_RX_CD_400_MVPP 0x1400
608 #define NCV7410_PHYCFG0_RX_CD_450_MVPP 0x1800
609 #define NCV7410_PHYCFG0_RX_CD_500_MVPP 0x1C00
610 #define NCV7410_PHYCFG0_RX_CD_550_MVPP 0x2000
611 #define NCV7410_PHYCFG0_RX_CD_600_MVPP 0x2400
612 #define NCV7410_PHYCFG0_RX_CD_650_MVPP 0x2800
613 #define NCV7410_PHYCFG0_RX_CD_700_MVPP 0x2C00
614 #define NCV7410_PHYCFG0_RX_CD_750_MVPP 0x3000
615 #define NCV7410_PHYCFG0_RX_CD_800_MVPP 0x3400
616 #define NCV7410_PHYCFG0_RX_CD_850_MVPP 0x3800
617 #define NCV7410_PHYCFG0_RX_CD_900_MVPP 0x3C00
618 #define NCV7410_PHYCFG0_RX_ED 0x03C0
619 #define NCV7410_PHYCFG0_RX_ED_150_MVPP 0x0000
620 #define NCV7410_PHYCFG0_RX_ED_200_MVPP 0x0040
621 #define NCV7410_PHYCFG0_RX_ED_250_MVPP 0x0080
622 #define NCV7410_PHYCFG0_RX_ED_300_MVPP 0x00C0
623 #define NCV7410_PHYCFG0_RX_ED_350_MVPP 0x0100
624 #define NCV7410_PHYCFG0_RX_ED_400_MVPP 0x0140
625 #define NCV7410_PHYCFG0_RX_ED_450_MVPP 0x0180
626 #define NCV7410_PHYCFG0_RX_ED_500_MVPP 0x01C0
627 #define NCV7410_PHYCFG0_RX_ED_550_MVPP 0x0200
628 #define NCV7410_PHYCFG0_RX_ED_600_MVPP 0x0240
629 #define NCV7410_PHYCFG0_RX_ED_650_MVPP 0x0280
630 #define NCV7410_PHYCFG0_RX_ED_700_MVPP 0x02C0
631 #define NCV7410_PHYCFG0_RX_ED_750_MVPP 0x0300
632 #define NCV7410_PHYCFG0_RX_ED_800_MVPP 0x0340
633 #define NCV7410_PHYCFG0_RX_ED_850_MVPP 0x0380
634 #define NCV7410_PHYCFG0_RX_ED_900_MVPP 0x03C0
635 #define NCV7410_PHYCFG0_DSLEW 0x0020
636 #define NCV7410_PHYCFG0_DSLEW_SLOW 0x0000
637 #define NCV7410_PHYCFG0_DSLEW_FAST 0x0020
638 #define NCV7410_PHYCFG0_CMC 0x0018
639 #define NCV7410_PHYCFG0_CMC_0_TO_0_5_R 0x0000
640 #define NCV7410_PHYCFG0_CMC_0_5_TO_2_25_R 0x0008
641 #define NCV7410_PHYCFG0_CMC_2_25_TO_3_75_R 0x0010
642 #define NCV7410_PHYCFG0_CMC_3_75_TO_5_R 0x0018
643 #define NCV7410_PHYCFG0_TXSLEW 0x0004
644 #define NCV7410_PHYCFG0_TXSLEW_SLOW 0x0000
645 #define NCV7410_PHYCFG0_TXSLEW_FAST 0x0004
646 #define NCV7410_PHYCFG0_CLKO_EN 0x0001
647 
648 //MAC Identification 0 register
649 #define NCV7410_MACID0_MACID_15_0 0xFFFF
650 
651 //MAC Identification 1 register
652 #define NCV7410_MACID1_MACID_23_16 0x00FF
653 
654 //Chip Info register
655 #define NCV7410_CHIPINFO_WAFER_Y 0x7F00
656 #define NCV7410_CHIPINFO_WAFER_X 0x007F
657 
658 //NVM Health register
659 #define NCV7410_NVMHEALTH_RED_ZONE_NVM_WARNING 0x8000
660 #define NCV7410_NVMHEALTH_RED_ZONE_NVM_ERROR 0x4000
661 #define NCV7410_NVMHEALTH_YELLOW_ZONE_NVM_WARNING 0x2000
662 #define NCV7410_NVMHEALTH_YELLOW_ZONE_NVM_ERROR 0x1000
663 #define NCV7410_NVMHEALTH_GREEN_ZONE_NVM_WARNING 0x0800
664 #define NCV7410_NVMHEALTH_GREEN_ZONE_NVM_ERROR 0x0400
665 
666 //C++ guard
667 #ifdef __cplusplus
668 extern "C" {
669 #endif
670 
671 //NCV7410 driver
672 extern const NicDriver ncv7410Driver;
673 
674 //NCV7410 related functions
675 error_t ncv7410Init(NetInterface *interface);
676 void ncv7410InitHook(NetInterface *interface);
677 
678 void ncv7410Tick(NetInterface *interface);
679 
680 void ncv7410EnableIrq(NetInterface *interface);
681 void ncv7410DisableIrq(NetInterface *interface);
683 void ncv7410EventHandler(NetInterface *interface);
684 
686  const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary);
687 
689 
691 
692 void ncv7410WriteReg(NetInterface *interface, uint8_t mms, uint16_t address,
693  uint32_t data);
694 
695 uint32_t ncv7410ReadReg(NetInterface *interface, uint8_t mms,
696  uint16_t address);
697 
698 void ncv7410DumpReg(NetInterface *interface, uint8_t mms, uint16_t address,
699  uint_t num);
700 
701 uint32_t ncv7410CalcParity(uint32_t data);
702 
703 //C++ guard
704 #ifdef __cplusplus
705 }
706 #endif
707 
708 #endif
int bool_t
Definition: compiler_port.h:61
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:89
uint32_t ncv7410ReadReg(NetInterface *interface, uint8_t mms, uint16_t address)
Read register.
uint8_t data[]
Definition: ethernet.h:224
void ncv7410DisableIrq(NetInterface *interface)
Disable interrupts.
error_t ncv7410ReceivePacket(NetInterface *interface)
Receive a packet.
void ncv7410InitHook(NetInterface *interface)
NCV7410 custom configuration.
void ncv7410WriteReg(NetInterface *interface, uint8_t mms, uint16_t address, uint32_t data)
Write register.
uint32_t ncv7410CalcParity(uint32_t data)
Calculate parity bit over a 32-bit data.
error_t
Error codes.
Definition: error.h:43
#define NetInterface
Definition: net.h:36
error_t ncv7410Init(NetInterface *interface)
NCV7410 controller initialization.
#define NetTxAncillary
Definition: net_misc.h:36
error_t ncv7410SendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary)
Send a packet.
error_t ncv7410UpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
void ncv7410EventHandler(NetInterface *interface)
NCV7410 event handler.
Ipv6Addr address[]
Definition: ipv6.h:325
Network interface controller abstraction layer.
void ncv7410EnableIrq(NetInterface *interface)
Enable interrupts.
bool_t ncv7410IrqHandler(NetInterface *interface)
NCV7410 interrupt service routine.
void ncv7410DumpReg(NetInterface *interface, uint8_t mms, uint16_t address, uint_t num)
Dump registers for debugging purpose.
unsigned int uint_t
Definition: compiler_port.h:57
NIC driver.
Definition: nic.h:286
const NicDriver ncv7410Driver
NCV7410 driver.
void ncv7410Tick(NetInterface *interface)
NCV7410 timer handler.