tja1101_driver.h
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1 /**
2  * @file tja1101_driver.h
3  * @brief TJA1101 100Base-T1 Ethernet PHY driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.4.0
29  **/
30 
31 #ifndef _TJA1101_DRIVER_H
32 #define _TJA1101_DRIVER_H
33 
34 //Dependencies
35 #include "core/nic.h"
36 
37 //PHY address
38 #ifndef TJA1101_PHY_ADDR
39  #define TJA1101_PHY_ADDR 0
40 #elif (TJA1101_PHY_ADDR < 0 || TJA1101_PHY_ADDR > 31)
41  #error TJA1101_PHY_ADDR parameter is not valid
42 #endif
43 
44 //TJA1101 PHY registers
45 #define TJA1101_BASIC_CTRL 0x00
46 #define TJA1101_BASIC_STAT 0x01
47 #define TJA1101_PHY_ID1 0x02
48 #define TJA1101_PHY_ID2 0x03
49 #define TJA1101_EXTENDED_STAT 0x0F
50 #define TJA1101_PHY_ID3 0x10
51 #define TJA1101_EXTENDED_CTRL 0x11
52 #define TJA1101_CONFIG1 0x12
53 #define TJA1101_CONFIG2 0x13
54 #define TJA1101_SYM_ERR_COUNTER 0x14
55 #define TJA1101_INT_SRC 0x15
56 #define TJA1101_INT_EN 0x16
57 #define TJA1101_COMM_STAT 0x17
58 #define TJA1101_GENERAL_STAT 0x18
59 #define TJA1101_EXTERNAL_STAT 0x19
60 #define TJA1101_LINK_FAIL_COUNTER 0x1A
61 #define TJA1101_COMM_CTRL 0x1B
62 #define TJA1101_CONFIG3 0x1C
63 
64 //Basic control register
65 #define TJA1101_BASIC_CTRL_RESET 0x8000
66 #define TJA1101_BASIC_CTRL_LOOPBACK 0x4000
67 #define TJA1101_BASIC_CTRL_SPEED_SEL_LSB 0x2000
68 #define TJA1101_BASIC_CTRL_AUTONEG_EN 0x1000
69 #define TJA1101_BASIC_CTRL_POWER_DOWN 0x0800
70 #define TJA1101_BASIC_CTRL_ISOLATE 0x0400
71 #define TJA1101_BASIC_CTRL_RE_AUTONEG 0x0200
72 #define TJA1101_BASIC_CTRL_DUPLEX_MODE 0x0100
73 #define TJA1101_BASIC_CTRL_COL_TEST 0x0080
74 #define TJA1101_BASIC_CTRL_SPEED_SEL_MSB 0x0040
75 #define TJA1101_BASIC_CTRL_UNIDIRECT_EN 0x0020
76 
77 //Basic status register
78 #define TJA1101_BASIC_STAT_100BT4 0x8000
79 #define TJA1101_BASIC_STAT_100BTX_FD 0x4000
80 #define TJA1101_BASIC_STAT_100BTX_HD 0x2000
81 #define TJA1101_BASIC_STAT_10BT_FD 0x1000
82 #define TJA1101_BASIC_STAT_10BT_HD 0x0800
83 #define TJA1101_BASIC_STAT_100BT2_FD 0x0400
84 #define TJA1101_BASIC_STAT_100BT2_HD 0x0200
85 #define TJA1101_BASIC_STAT_EXTENDED_STATUS 0x0100
86 #define TJA1101_BASIC_STAT_UNIDIRECT_ABILITY 0x0080
87 #define TJA1101_BASIC_STAT_MF_PREAMBLE_SUPPR 0x0040
88 #define TJA1101_BASIC_STAT_AUTONEG_COMPLETE 0x0020
89 #define TJA1101_BASIC_STAT_REMOTE_FAULT 0x0010
90 #define TJA1101_BASIC_STAT_AUTONEG_ABILITY 0x0008
91 #define TJA1101_BASIC_STAT_LINK_STATUS 0x0004
92 #define TJA1101_BASIC_STAT_JABBER_DETECT 0x0002
93 #define TJA1101_BASIC_STAT_EXTENDED_CAPABILITY 0x0001
94 
95 //PHY identification 1 register
96 #define TJA1101_PHY_ID1_OUI_MSB 0xFFFF
97 #define TJA1101_PHY_ID1_OUI_MSB_DEFAULT 0x0180
98 
99 //PHY identification 2 register
100 #define TJA1101_PHY_ID2_OUI_LSB 0xFC00
101 #define TJA1101_PHY_ID2_OUI_LSB_DEFAULT 0xDC00
102 #define TJA1101_PHY_ID2_TYPE_NO 0x03F0
103 #define TJA1101_PHY_ID2_TYPE_NO_DEFAULT 0x0100
104 #define TJA1101_PHY_ID2_REVISION_NO 0x000F
105 #define TJA1101_PHY_ID2_REVISION_NO_DEFAULT 0x0002
106 
107 //Extended status register
108 #define TJA1101_EXTENDED_STAT_1000BX_FD 0x8000
109 #define TJA1101_EXTENDED_STAT_1000BX_HD 0x4000
110 #define TJA1101_EXTENDED_STAT_1000BT_FD 0x2000
111 #define TJA1101_EXTENDED_STAT_1000BT_HD 0x1000
112 #define TJA1101_EXTENDED_STAT_100BT1 0x0080
113 #define TJA1101_EXTENDED_STAT_RTPGE 0x0040
114 
115 //PHY identification 3 register
116 #define TJA1101_PHY_ID3_VERSION_NO 0x00FF
117 
118 //Extended control register
119 #define TJA1101_EXTENDED_CTRL_LINK_CONTROL 0x8000
120 #define TJA1101_EXTENDED_CTRL_POWER_MODE 0x7800
121 #define TJA1101_EXTENDED_CTRL_POWER_MODE_NO_CHANGE 0x0000
122 #define TJA1101_EXTENDED_CTRL_POWER_MODE_NORMAL 0x1800
123 #define TJA1101_EXTENDED_CTRL_POWER_MODE_SILENT 0x4800
124 #define TJA1101_EXTENDED_CTRL_POWER_MODE_SLEEP 0x5000
125 #define TJA1101_EXTENDED_CTRL_POWER_MODE_SLEEP_REQ 0x5800
126 #define TJA1101_EXTENDED_CTRL_POWER_MODE_STANDBY 0x6000
127 #define TJA1101_EXTENDED_CTRL_SLAVE_JITTER_TEST 0x0400
128 #define TJA1101_EXTENDED_CTRL_TRAINING_RESTART 0x0200
129 #define TJA1101_EXTENDED_CTRL_TEST_MODE 0x01C0
130 #define TJA1101_EXTENDED_CTRL_TEST_MODE_0 0x0000
131 #define TJA1101_EXTENDED_CTRL_TEST_MODE_1 0x0040
132 #define TJA1101_EXTENDED_CTRL_TEST_MODE_2 0x0080
133 #define TJA1101_EXTENDED_CTRL_TEST_MODE_3 0x00C0
134 #define TJA1101_EXTENDED_CTRL_TEST_MODE_4 0x0100
135 #define TJA1101_EXTENDED_CTRL_TEST_MODE_5 0x0140
136 #define TJA1101_EXTENDED_CTRL_TEST_MODE_6 0x0180
137 #define TJA1101_EXTENDED_CTRL_CABLE_TEST 0x0020
138 #define TJA1101_EXTENDED_CTRL_LOOPBACK_MODE 0x0018
139 #define TJA1101_EXTENDED_CTRL_LOOPBACK_MODE_INTERNAL 0x0000
140 #define TJA1101_EXTENDED_CTRL_LOOPBACK_MODE_EXTERNAL 0x0008
141 #define TJA1101_EXTENDED_CTRL_LOOPBACK_MODE_REMOTE 0x0018
142 #define TJA1101_EXTENDED_CTRL_CONFIG_EN 0x0004
143 #define TJA1101_EXTENDED_CTRL_WAKE_REQUEST 0x0001
144 
145 //Configuration 1 register
146 #define TJA1101_CONFIG1_MASTER_SLAVE 0x8000
147 #define TJA1101_CONFIG1_FWDPHYLOC 0x4000
148 #define TJA1101_CONFIG1_REMWUPHY 0x0800
149 #define TJA1101_CONFIG1_LOCWUPHY 0x0400
150 #define TJA1101_CONFIG1_MII_MODE 0x0300
151 #define TJA1101_CONFIG1_MII_MODE_MII 0x0000
152 #define TJA1101_CONFIG1_MII_MODE_RMII_50MHZ_REF_CLK_IN 0x0100
153 #define TJA1101_CONFIG1_MII_MODE_RMII_50MHZ_REF_CLK_OUT 0x0200
154 #define TJA1101_CONFIG1_MII_MODE_REV_MII 0x0300
155 #define TJA1101_CONFIG1_MII_DRIVER 0x0080
156 #define TJA1101_CONFIG1_MII_DRIVER_STANDARD 0x0000
157 #define TJA1101_CONFIG1_MII_DRIVER_REDUCED 0x0080
158 #define TJA1101_CONFIG1_SLEEP_CONFIRM 0x0040
159 #define TJA1101_CONFIG1_LPS_WUR_DIS 0x0020
160 #define TJA1101_CONFIG1_SLEEP_ACK 0x0010
161 #define TJA1101_CONFIG1_FWDPHYREM 0x0004
162 #define TJA1101_CONFIG1_AUTO_PWD 0x0002
163 #define TJA1101_CONFIG1_LPS_ACTIVE 0x0001
164 
165 //Configuration 2 register
166 #define TJA1101_CONFIG2_PHYAD 0xF800
167 #define TJA1101_CONFIG2_SQI_AVERAGING 0x0600
168 #define TJA1101_CONFIG2_SQI_AVERAGING_32_SYMBOLS 0x0000
169 #define TJA1101_CONFIG2_SQI_AVERAGING_64_SYMBOLS 0x0200
170 #define TJA1101_CONFIG2_SQI_AVERAGING_128_SYMBOLS 0x0400
171 #define TJA1101_CONFIG2_SQI_AVERAGING_256_SYMBOLS 0x0600
172 #define TJA1101_CONFIG2_SQI_WLIMIT 0x01C0
173 #define TJA1101_CONFIG2_SQI_WLIMIT_NONE 0x0000
174 #define TJA1101_CONFIG2_SQI_WLIMIT_CLASS_A 0x0040
175 #define TJA1101_CONFIG2_SQI_WLIMIT_CLASS_B 0x0080
176 #define TJA1101_CONFIG2_SQI_WLIMIT_CLASS_C 0x00C0
177 #define TJA1101_CONFIG2_SQI_WLIMIT_CLASS_D 0x0100
178 #define TJA1101_CONFIG2_SQI_WLIMIT_CLASS_E 0x0140
179 #define TJA1101_CONFIG2_SQI_WLIMIT_CLASS_F 0x0180
180 #define TJA1101_CONFIG2_SQI_WLIMIT_CLASS_G 0x01C0
181 #define TJA1101_CONFIG2_SQI_FAILLIMIT 0x0038
182 #define TJA1101_CONFIG2_SQI_FAILLIMIT_NONE 0x0000
183 #define TJA1101_CONFIG2_SQI_FAILLIMIT_CLASS_A 0x0008
184 #define TJA1101_CONFIG2_SQI_FAILLIMIT_CLASS_B 0x0010
185 #define TJA1101_CONFIG2_SQI_FAILLIMIT_CLASS_C 0x0018
186 #define TJA1101_CONFIG2_SQI_FAILLIMIT_CLASS_D 0x0020
187 #define TJA1101_CONFIG2_SQI_FAILLIMIT_CLASS_E 0x0028
188 #define TJA1101_CONFIG2_SQI_FAILLIMIT_CLASS_F 0x0030
189 #define TJA1101_CONFIG2_SQI_FAILLIMIT_CLASS_G 0x0038
190 #define TJA1101_CONFIG2_JUMBO_ENABLE 0x0004
191 #define TJA1101_CONFIG2_SLEEP_REQUEST_TO 0x0003
192 #define TJA1101_CONFIG2_SLEEP_REQUEST_TO_0_4MS 0x0000
193 #define TJA1101_CONFIG2_SLEEP_REQUEST_TO_1MS 0x0001
194 #define TJA1101_CONFIG2_SLEEP_REQUEST_TO_4MS 0x0002
195 #define TJA1101_CONFIG2_SLEEP_REQUEST_TO_16MS 0x0003
196 
197 //Symbol error counter register
198 #define TJA1101_SYM_ERR_COUNTER_SYM_ERR_CNT 0xFFFF
199 
200 //Interrupt source register
201 #define TJA1101_INT_SRC_PWON 0x8000
202 #define TJA1101_INT_SRC_WAKEUP 0x4000
203 #define TJA1101_INT_SRC_WUR_RECEIVED 0x2000
204 #define TJA1101_INT_SRC_LPS_RECEIVED 0x1000
205 #define TJA1101_INT_SRC_PHY_INIT_FAIL 0x0800
206 #define TJA1101_INT_SRC_LINK_STATUS_FAIL 0x0400
207 #define TJA1101_INT_SRC_LINK_STATUS_UP 0x0200
208 #define TJA1101_INT_SRC_SYM_ERR 0x0100
209 #define TJA1101_INT_SRC_TRAINING_FAILED 0x0080
210 #define TJA1101_INT_SRC_SQI_WARNING 0x0040
211 #define TJA1101_INT_SRC_CONTROL_ERR 0x0020
212 #define TJA1101_INT_SRC_UV_ERR 0x0008
213 #define TJA1101_INT_SRC_UV_RECOVERY 0x0004
214 #define TJA1101_INT_SRC_TEMP_ERR 0x0002
215 #define TJA1101_INT_SRC_SLEEP_ABORT 0x0001
216 
217 //Interrupt enable register
218 #define TJA1101_INT_EN_PWON 0x8000
219 #define TJA1101_INT_EN_WAKEUP 0x4000
220 #define TJA1101_INT_EN_WUR_RECEIVED 0x2000
221 #define TJA1101_INT_EN_LPS_RECEIVED 0x1000
222 #define TJA1101_INT_EN_PHY_INIT_FAIL 0x0800
223 #define TJA1101_INT_EN_LINK_STATUS_FAIL 0x0400
224 #define TJA1101_INT_EN_LINK_STATUS_UP 0x0200
225 #define TJA1101_INT_EN_SYM_ERR 0x0100
226 #define TJA1101_INT_EN_TRAINING_FAILED 0x0080
227 #define TJA1101_INT_EN_SQI_WARNING 0x0040
228 #define TJA1101_INT_EN_CONTROL_ERR 0x0020
229 #define TJA1101_INT_EN_UV_ERR 0x0008
230 #define TJA1101_INT_EN_UV_RECOVERY 0x0004
231 #define TJA1101_INT_EN_TEMP_ERR 0x0002
232 #define TJA1101_INT_EN_SLEEP_ABORT 0x0001
233 
234 //Communication status register
235 #define TJA1101_COMM_STAT_LINK_UP 0x8000
236 #define TJA1101_COMM_STAT_TX_MODE 0x6000
237 #define TJA1101_COMM_STAT_TX_MODE_DISABLED 0x0000
238 #define TJA1101_COMM_STAT_TX_MODE_SEND_N 0x2000
239 #define TJA1101_COMM_STAT_TX_MODE_SEND_I 0x4000
240 #define TJA1101_COMM_STAT_TX_MODE_SEND_Z 0x6000
241 #define TJA1101_COMM_STAT_LOC_RCVR_STATUS 0x1000
242 #define TJA1101_COMM_STAT_REM_RCVR_STATUS 0x0800
243 #define TJA1101_COMM_STAT_SCR_LOCKED 0x0400
244 #define TJA1101_COMM_STAT_SSD_ERR 0x0200
245 #define TJA1101_COMM_STAT_ESD_ERR 0x0100
246 #define TJA1101_COMM_STAT_SQI 0x00E0
247 #define TJA1101_COMM_STAT_SQI_WORSE_THAN_CLASS_A 0x0000
248 #define TJA1101_COMM_STAT_SQI_CLASS_A 0x0020
249 #define TJA1101_COMM_STAT_SQI_CLASS_B 0x0040
250 #define TJA1101_COMM_STAT_SQI_CLASS_C 0x0060
251 #define TJA1101_COMM_STAT_SQI_CLASS_D 0x0080
252 #define TJA1101_COMM_STAT_SQI_CLASS_E 0x00A0
253 #define TJA1101_COMM_STAT_SQI_CLASS_F 0x00C0
254 #define TJA1101_COMM_STAT_SQI_CLASS_G 0x00E0
255 #define TJA1101_COMM_STAT_RECEIVE_ERR 0x0010
256 #define TJA1101_COMM_STAT_TRANSMIT_ERR 0x0008
257 #define TJA1101_COMM_STAT_PHY_STATE 0x0007
258 #define TJA1101_COMM_STAT_PHY_STATE_IDLE 0x0000
259 #define TJA1101_COMM_STAT_PHY_STATE_INITIALIZING 0x0001
260 #define TJA1101_COMM_STAT_PHY_STATE_CONFIGURED 0x0002
261 #define TJA1101_COMM_STAT_PHY_STATE_OFFLINE 0x0003
262 #define TJA1101_COMM_STAT_PHY_STATE_ACTIVE 0x0004
263 #define TJA1101_COMM_STAT_PHY_STATE_ISOLATE 0x0005
264 #define TJA1101_COMM_STAT_PHY_STATE_CABLE_TEST 0x0006
265 #define TJA1101_COMM_STAT_PHY_STATE_TEST_MODE 0x0007
266 
267 //General status register
268 #define TJA1101_GENERAL_STAT_INT_STATUS 0x8000
269 #define TJA1101_GENERAL_STAT_PLL_LOCKED 0x4000
270 #define TJA1101_GENERAL_STAT_LOCAL_WU 0x2000
271 #define TJA1101_GENERAL_STAT_REMOTE_WU 0x1000
272 #define TJA1101_GENERAL_STAT_DATA_DET_WU 0x0800
273 #define TJA1101_GENERAL_STAT_EN_STATUS 0x0400
274 #define TJA1101_GENERAL_STAT_RESET_STATUS 0x0200
275 #define TJA1101_GENERAL_STAT_LINKFAIL_CNT 0x00F8
276 
277 //External status register
278 #define TJA1101_EXTERNAL_STAT_UV_VDDA_3V3 0x8000
279 #define TJA1101_EXTERNAL_STAT_UV_VDDD_1V8 0x4000
280 #define TJA1101_EXTERNAL_STAT_UV_VDDA_1V8 0x2000
281 #define TJA1101_EXTERNAL_STAT_UV_VDDIO 0x0800
282 #define TJA1101_EXTERNAL_STAT_TEMP_HIGH 0x0400
283 #define TJA1101_EXTERNAL_STAT_TEMP_WARN 0x0200
284 #define TJA1101_EXTERNAL_STAT_SHORT_DETECT 0x0100
285 #define TJA1101_EXTERNAL_STAT_OPEN_DETECT 0x0080
286 #define TJA1101_EXTERNAL_STAT_POLARITY_DETECT 0x0040
287 #define TJA1101_EXTERNAL_STAT_INTERLEAVE_DETECT 0x0020
288 
289 //Link-fail counter register
290 #define TJA1101_LINK_FAIL_COUNTER_LOC_RCVR_CNT 0xFF00
291 #define TJA1101_LINK_FAIL_COUNTER_REM_RCVR_CNT 0x00FF
292 
293 //Common configuration register
294 #define TJA1101_COMM_CTRL_AUTO_OP 0x8000
295 #define TJA1101_COMM_CTRL_CLK_MODE 0x3000
296 #define TJA1101_COMM_CTRL_CLK_MODE_25MHZ_XTAL_NO_CLK_OUT 0x0000
297 #define TJA1101_COMM_CTRL_CLK_MODE_25MHZ_XTAL_CLK_OUT 0x1000
298 #define TJA1101_COMM_CTRL_CLK_MODE_25MHZ_EXT_CLK_IN 0x2000
299 #define TJA1101_COMM_CTRL_CLK_MODE_50MHZ_REF_CLK_IN 0x3000
300 #define TJA1101_COMM_CTRL_LDO_MODE 0x0800
301 #define TJA1101_COMM_CTRL_CLK_DRIVER 0x0400
302 #define TJA1101_COMM_CTRL_CLK_HOLD 0x0200
303 #define TJA1101_COMM_CTRL_LOC_WU_TIM 0x0180
304 #define TJA1101_COMM_CTRL_LOC_WU_TIM_LONGEST 0x0000
305 #define TJA1101_COMM_CTRL_LOC_WU_TIM_LONG 0x0080
306 #define TJA1101_COMM_CTRL_LOC_WU_TIM_SHORT 0x0100
307 #define TJA1101_COMM_CTRL_LOC_WU_TIM_SHORTEST 0x0180
308 #define TJA1101_COMM_CTRL_CONFIG_WAKE 0x0040
309 #define TJA1101_COMM_CTRL_CONFIG_INH 0x0020
310 
311 //Configuration 3 register
312 #define TJA1101_CONFIG3_MDI_POL 0x0004
313 #define TJA1101_CONFIG3_FORCE_SLEEP 0x0002
314 
315 //C++ guard
316 #ifdef __cplusplus
317 extern "C" {
318 #endif
319 
320 //TJA1101 Ethernet PHY driver
321 extern const PhyDriver tja1101PhyDriver;
322 
323 //TJA1101 related functions
324 error_t tja1101Init(NetInterface *interface);
325 void tja1101InitHook(NetInterface *interface);
326 
327 void tja1101Tick(NetInterface *interface);
328 
329 void tja1101EnableIrq(NetInterface *interface);
330 void tja1101DisableIrq(NetInterface *interface);
331 
332 void tja1101EventHandler(NetInterface *interface);
333 
334 void tja1101WritePhyReg(NetInterface *interface, uint8_t address,
335  uint16_t data);
336 
337 uint16_t tja1101ReadPhyReg(NetInterface *interface, uint8_t address);
338 
339 void tja1101DumpPhyReg(NetInterface *interface);
340 
341 //C++ guard
342 #ifdef __cplusplus
343 }
344 #endif
345 
346 #endif
error_t
Error codes.
Definition: error.h:43
uint8_t data[]
Definition: ethernet.h:222
Ipv6Addr address[]
Definition: ipv6.h:316
#define NetInterface
Definition: net.h:36
Network interface controller abstraction layer.
Ethernet PHY driver.
Definition: nic.h:308
void tja1101EventHandler(NetInterface *interface)
TJA1101 event handler.
error_t tja1101Init(NetInterface *interface)
TJA1101 PHY transceiver initialization.
void tja1101EnableIrq(NetInterface *interface)
Enable interrupts.
void tja1101Tick(NetInterface *interface)
TJA1101 timer handler.
void tja1101DisableIrq(NetInterface *interface)
Disable interrupts.
const PhyDriver tja1101PhyDriver
TJA1101 Ethernet PHY driver.
void tja1101WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
uint16_t tja1101ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
void tja1101DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
void tja1101InitHook(NetInterface *interface)
TJA1101 custom configuration.