w5200_driver.h
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1 /**
2  * @file w5200_driver.h
3  * @brief WIZnet W5200 Ethernet controller
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.4.0
29  **/
30 
31 #ifndef _W5200_DRIVER_H
32 #define _W5200_DRIVER_H
33 
34 //Dependencies
35 #include "core/nic.h"
36 
37 //TX buffer size
38 #ifndef W5200_ETH_TX_BUFFER_SIZE
39  #define W5200_ETH_TX_BUFFER_SIZE 1536
40 #elif (W5200_ETH_TX_BUFFER_SIZE != 1536)
41  #error W5200_ETH_TX_BUFFER_SIZE parameter is not valid
42 #endif
43 
44 //RX buffer size
45 #ifndef W5200_ETH_RX_BUFFER_SIZE
46  #define W5200_ETH_RX_BUFFER_SIZE 1536
47 #elif (W5200_ETH_RX_BUFFER_SIZE != 1536)
48  #error W5200_ETH_RX_BUFFER_SIZE parameter is not valid
49 #endif
50 
51 //Opcodes
52 #define W5200_OP_READ 0x00
53 #define W5200_OP_WRITE 0x80
54 
55 //W5200 Common registers
56 #define W5200_MR 0x00
57 #define W5200_GAR0 0x01
58 #define W5200_GAR1 0x02
59 #define W5200_GAR2 0x03
60 #define W5200_GAR3 0x04
61 #define W5200_SUBR0 0x05
62 #define W5200_SUBR1 0x06
63 #define W5200_SUBR2 0x07
64 #define W5200_SUBR3 0x08
65 #define W5200_SHAR0 0x09
66 #define W5200_SHAR1 0x0A
67 #define W5200_SHAR2 0x0B
68 #define W5200_SHAR3 0x0C
69 #define W5200_SHAR4 0x0D
70 #define W5200_SHAR5 0x0E
71 #define W5200_SIPR0 0x0F
72 #define W5200_SIPR1 0x10
73 #define W5200_SIPR2 0x11
74 #define W5200_SIPR3 0x12
75 #define W5200_IR 0x15
76 #define W5200_IMR 0x16
77 #define W5200_RTR0 0x17
78 #define W5200_RTR1 0x18
79 #define W5200_RCR 0x19
80 #define W5200_PATR0 0x1C
81 #define W5200_PATR1 0x1D
82 #define W5200_PPPALGO 0x1E
83 #define W5200_VERSIONR 0x1F
84 #define W5200_PTIMER 0x28
85 #define W5200_PMAGIC 0x29
86 #define W5200_INTLEVEL0 0x30
87 #define W5200_INTLEVEL1 0x31
88 #define W5200_IR2 0x34
89 #define W5200_PSTATUS 0x35
90 #define W5200_IMR2 0x36
91 
92 //W5200 Socket registers
93 #define W5200_S0_MR 0x4000
94 #define W5200_S0_CR 0x4001
95 #define W5200_S0_IR 0x4002
96 #define W5200_S0_SR 0x4003
97 #define W5200_S0_PORT0 0x4004
98 #define W5200_S0_PORT1 0x4005
99 #define W5200_S0_DHAR0 0x4006
100 #define W5200_S0_DHAR1 0x4007
101 #define W5200_S0_DHAR2 0x4008
102 #define W5200_S0_DHAR3 0x4009
103 #define W5200_S0_DHAR4 0x400A
104 #define W5200_S0_DHAR5 0x400B
105 #define W5200_S0_DIPR0 0x400C
106 #define W5200_S0_DIPR1 0x400D
107 #define W5200_S0_DIPR2 0x400E
108 #define W5200_S0_DIPR3 0x400F
109 #define W5200_S0_DPORT0 0x4010
110 #define W5200_S0_DPORT1 0x4011
111 #define W5200_S0_MSSR0 0x4012
112 #define W5200_S0_MSSR1 0x4013
113 #define W5200_S0_PROTO 0x4014
114 #define W5200_S0_TOS 0x4015
115 #define W5200_S0_TTL 0x4016
116 #define W5200_S0_RXMEM_SIZE 0x401E
117 #define W5200_S0_TXMEM_SIZE 0x401F
118 #define W5200_S0_TX_FSR0 0x4020
119 #define W5200_S0_TX_FSR1 0x4021
120 #define W5200_S0_TX_RD0 0x4022
121 #define W5200_S0_TX_RD1 0x4023
122 #define W5200_S0_TX_WR0 0x4024
123 #define W5200_S0_TX_WR1 0x4025
124 #define W5200_S0_RX_RSR0 0x4026
125 #define W5200_S0_RX_RSR1 0x4027
126 #define W5200_S0_RX_RD0 0x4028
127 #define W5200_S0_RX_RD1 0x4029
128 #define W5200_S0_RX_WR0 0x402A
129 #define W5200_S0_RX_WR1 0x402B
130 #define W5200_S0_IMR 0x402C
131 #define W5200_S0_FRAG0 0x402D
132 #define W5200_S0_FRAG1 0x402E
133 #define W5200_S1_MR 0x4100
134 #define W5200_S1_CR 0x4101
135 #define W5200_S1_IR 0x4102
136 #define W5200_S1_SR 0x4103
137 #define W5200_S1_PORT0 0x4104
138 #define W5200_S1_PORT1 0x4105
139 #define W5200_S1_DHAR0 0x4106
140 #define W5200_S1_DHAR1 0x4107
141 #define W5200_S1_DHAR2 0x4108
142 #define W5200_S1_DHAR3 0x4109
143 #define W5200_S1_DHAR4 0x410A
144 #define W5200_S1_DHAR5 0x410B
145 #define W5200_S1_DIPR0 0x410C
146 #define W5200_S1_DIPR1 0x410D
147 #define W5200_S1_DIPR2 0x410E
148 #define W5200_S1_DIPR3 0x410F
149 #define W5200_S1_DPORT0 0x4110
150 #define W5200_S1_DPORT1 0x4111
151 #define W5200_S1_MSSR0 0x4112
152 #define W5200_S1_MSSR1 0x4113
153 #define W5200_S1_PROTO 0x4114
154 #define W5200_S1_TOS 0x4115
155 #define W5200_S1_TTL 0x4116
156 #define W5200_S1_RXMEM_SIZE 0x411E
157 #define W5200_S1_TXMEM_SIZE 0x411F
158 #define W5200_S1_TX_FSR0 0x4120
159 #define W5200_S1_TX_FSR1 0x4121
160 #define W5200_S1_TX_RD0 0x4122
161 #define W5200_S1_TX_RD1 0x4123
162 #define W5200_S1_TX_WR0 0x4124
163 #define W5200_S1_TX_WR1 0x4125
164 #define W5200_S1_RX_RSR0 0x4126
165 #define W5200_S1_RX_RSR1 0x4127
166 #define W5200_S1_RX_RD0 0x4128
167 #define W5200_S1_RX_RD1 0x4129
168 #define W5200_S1_RX_WR0 0x412A
169 #define W5200_S1_RX_WR1 0x412B
170 #define W5200_S1_IMR 0x412C
171 #define W5200_S1_FRAG0 0x412D
172 #define W5200_S1_FRAG1 0x412E
173 #define W5200_S2_MR 0x4200
174 #define W5200_S2_CR 0x4201
175 #define W5200_S2_IR 0x4202
176 #define W5200_S2_SR 0x4203
177 #define W5200_S2_PORT0 0x4204
178 #define W5200_S2_PORT1 0x4205
179 #define W5200_S2_DHAR0 0x4206
180 #define W5200_S2_DHAR1 0x4207
181 #define W5200_S2_DHAR2 0x4208
182 #define W5200_S2_DHAR3 0x4209
183 #define W5200_S2_DHAR4 0x420A
184 #define W5200_S2_DHAR5 0x420B
185 #define W5200_S2_DIPR0 0x420C
186 #define W5200_S2_DIPR1 0x420D
187 #define W5200_S2_DIPR2 0x420E
188 #define W5200_S2_DIPR3 0x420F
189 #define W5200_S2_DPORT0 0x4210
190 #define W5200_S2_DPORT1 0x4211
191 #define W5200_S2_MSSR0 0x4212
192 #define W5200_S2_MSSR1 0x4213
193 #define W5200_S2_PROTO 0x4214
194 #define W5200_S2_TOS 0x4215
195 #define W5200_S2_TTL 0x4216
196 #define W5200_S2_RXMEM_SIZE 0x421E
197 #define W5200_S2_TXMEM_SIZE 0x421F
198 #define W5200_S2_TX_FSR0 0x4220
199 #define W5200_S2_TX_FSR1 0x4221
200 #define W5200_S2_TX_RD0 0x4222
201 #define W5200_S2_TX_RD1 0x4223
202 #define W5200_S2_TX_WR0 0x4224
203 #define W5200_S2_TX_WR1 0x4225
204 #define W5200_S2_RX_RSR0 0x4226
205 #define W5200_S2_RX_RSR1 0x4227
206 #define W5200_S2_RX_RD0 0x4228
207 #define W5200_S2_RX_RD1 0x4229
208 #define W5200_S2_RX_WR0 0x422A
209 #define W5200_S2_RX_WR1 0x422B
210 #define W5200_S2_IMR 0x422C
211 #define W5200_S2_FRAG0 0x422D
212 #define W5200_S2_FRAG1 0x422E
213 #define W5200_S3_MR 0x4300
214 #define W5200_S3_CR 0x4301
215 #define W5200_S3_IR 0x4302
216 #define W5200_S3_SR 0x4303
217 #define W5200_S3_PORT0 0x4304
218 #define W5200_S3_PORT1 0x4305
219 #define W5200_S3_DHAR0 0x4306
220 #define W5200_S3_DHAR1 0x4307
221 #define W5200_S3_DHAR2 0x4308
222 #define W5200_S3_DHAR3 0x4309
223 #define W5200_S3_DHAR4 0x430A
224 #define W5200_S3_DHAR5 0x430B
225 #define W5200_S3_DIPR0 0x430C
226 #define W5200_S3_DIPR1 0x430D
227 #define W5200_S3_DIPR2 0x430E
228 #define W5200_S3_DIPR3 0x430F
229 #define W5200_S3_DPORT0 0x4310
230 #define W5200_S3_DPORT1 0x4311
231 #define W5200_S3_MSSR0 0x4312
232 #define W5200_S3_MSSR1 0x4313
233 #define W5200_S3_PROTO 0x4314
234 #define W5200_S3_TOS 0x4315
235 #define W5200_S3_TTL 0x4316
236 #define W5200_S3_RXMEM_SIZE 0x431E
237 #define W5200_S3_TXMEM_SIZE 0x431F
238 #define W5200_S3_TX_FSR0 0x4320
239 #define W5200_S3_TX_FSR1 0x4321
240 #define W5200_S3_TX_RD0 0x4322
241 #define W5200_S3_TX_RD1 0x4323
242 #define W5200_S3_TX_WR0 0x4324
243 #define W5200_S3_TX_WR1 0x4325
244 #define W5200_S3_RX_RSR0 0x4326
245 #define W5200_S3_RX_RSR1 0x4327
246 #define W5200_S3_RX_RD0 0x4328
247 #define W5200_S3_RX_RD1 0x4329
248 #define W5200_S3_RX_WR0 0x432A
249 #define W5200_S3_RX_WR1 0x432B
250 #define W5200_S3_IMR 0x432C
251 #define W5200_S3_FRAG0 0x432D
252 #define W5200_S3_FRAG1 0x432E
253 #define W5200_S4_MR 0x4400
254 #define W5200_S4_CR 0x4401
255 #define W5200_S4_IR 0x4402
256 #define W5200_S4_SR 0x4403
257 #define W5200_S4_PORT0 0x4404
258 #define W5200_S4_PORT1 0x4405
259 #define W5200_S4_DHAR0 0x4406
260 #define W5200_S4_DHAR1 0x4407
261 #define W5200_S4_DHAR2 0x4408
262 #define W5200_S4_DHAR3 0x4409
263 #define W5200_S4_DHAR4 0x440A
264 #define W5200_S4_DHAR5 0x440B
265 #define W5200_S4_DIPR0 0x440C
266 #define W5200_S4_DIPR1 0x440D
267 #define W5200_S4_DIPR2 0x440E
268 #define W5200_S4_DIPR3 0x440F
269 #define W5200_S4_DPORT0 0x4410
270 #define W5200_S4_DPORT1 0x4411
271 #define W5200_S4_MSSR0 0x4412
272 #define W5200_S4_MSSR1 0x4413
273 #define W5200_S4_PROTO 0x4414
274 #define W5200_S4_TOS 0x4415
275 #define W5200_S4_TTL 0x4416
276 #define W5200_S4_RXMEM_SIZE 0x441E
277 #define W5200_S4_TXMEM_SIZE 0x441F
278 #define W5200_S4_TX_FSR0 0x4420
279 #define W5200_S4_TX_FSR1 0x4421
280 #define W5200_S4_TX_RD0 0x4422
281 #define W5200_S4_TX_RD1 0x4423
282 #define W5200_S4_TX_WR0 0x4424
283 #define W5200_S4_TX_WR1 0x4425
284 #define W5200_S4_RX_RSR0 0x4426
285 #define W5200_S4_RX_RSR1 0x4427
286 #define W5200_S4_RX_RD0 0x4428
287 #define W5200_S4_RX_RD1 0x4429
288 #define W5200_S4_RX_WR0 0x442A
289 #define W5200_S4_RX_WR1 0x442B
290 #define W5200_S4_IMR 0x442C
291 #define W5200_S4_FRAG0 0x442D
292 #define W5200_S4_FRAG1 0x442E
293 #define W5200_S5_MR 0x4500
294 #define W5200_S5_CR 0x4501
295 #define W5200_S5_IR 0x4502
296 #define W5200_S5_SR 0x4503
297 #define W5200_S5_PORT0 0x4504
298 #define W5200_S5_PORT1 0x4505
299 #define W5200_S5_DHAR0 0x4506
300 #define W5200_S5_DHAR1 0x4507
301 #define W5200_S5_DHAR2 0x4508
302 #define W5200_S5_DHAR3 0x4509
303 #define W5200_S5_DHAR4 0x450A
304 #define W5200_S5_DHAR5 0x450B
305 #define W5200_S5_DIPR0 0x450C
306 #define W5200_S5_DIPR1 0x450D
307 #define W5200_S5_DIPR2 0x450E
308 #define W5200_S5_DIPR3 0x450F
309 #define W5200_S5_DPORT0 0x4510
310 #define W5200_S5_DPORT1 0x4511
311 #define W5200_S5_MSSR0 0x4512
312 #define W5200_S5_MSSR1 0x4513
313 #define W5200_S5_PROTO 0x4514
314 #define W5200_S5_TOS 0x4515
315 #define W5200_S5_TTL 0x4516
316 #define W5200_S5_RXMEM_SIZE 0x451E
317 #define W5200_S5_TXMEM_SIZE 0x451F
318 #define W5200_S5_TX_FSR0 0x4520
319 #define W5200_S5_TX_FSR1 0x4521
320 #define W5200_S5_TX_RD0 0x4522
321 #define W5200_S5_TX_RD1 0x4523
322 #define W5200_S5_TX_WR0 0x4524
323 #define W5200_S5_TX_WR1 0x4525
324 #define W5200_S5_RX_RSR0 0x4526
325 #define W5200_S5_RX_RSR1 0x4527
326 #define W5200_S5_RX_RD0 0x4528
327 #define W5200_S5_RX_RD1 0x4529
328 #define W5200_S5_RX_WR0 0x452A
329 #define W5200_S5_RX_WR1 0x452B
330 #define W5200_S5_IMR 0x452C
331 #define W5200_S5_FRAG0 0x452D
332 #define W5200_S5_FRAG1 0x452E
333 #define W5200_S6_MR 0x4600
334 #define W5200_S6_CR 0x4601
335 #define W5200_S6_IR 0x4602
336 #define W5200_S6_SR 0x4603
337 #define W5200_S6_PORT0 0x4604
338 #define W5200_S6_PORT1 0x4605
339 #define W5200_S6_DHAR0 0x4606
340 #define W5200_S6_DHAR1 0x4607
341 #define W5200_S6_DHAR2 0x4608
342 #define W5200_S6_DHAR3 0x4609
343 #define W5200_S6_DHAR4 0x460A
344 #define W5200_S6_DHAR5 0x460B
345 #define W5200_S6_DIPR0 0x460C
346 #define W5200_S6_DIPR1 0x460D
347 #define W5200_S6_DIPR2 0x460E
348 #define W5200_S6_DIPR3 0x460F
349 #define W5200_S6_DPORT0 0x4610
350 #define W5200_S6_DPORT1 0x4611
351 #define W5200_S6_MSSR0 0x4612
352 #define W5200_S6_MSSR1 0x4613
353 #define W5200_S6_PROTO 0x4614
354 #define W5200_S6_TOS 0x4615
355 #define W5200_S6_TTL 0x4616
356 #define W5200_S6_RXMEM_SIZE 0x461E
357 #define W5200_S6_TXMEM_SIZE 0x461F
358 #define W5200_S6_TX_FSR0 0x4620
359 #define W5200_S6_TX_FSR1 0x4621
360 #define W5200_S6_TX_RD0 0x4622
361 #define W5200_S6_TX_RD1 0x4623
362 #define W5200_S6_TX_WR0 0x4624
363 #define W5200_S6_TX_WR1 0x4625
364 #define W5200_S6_RX_RSR0 0x4626
365 #define W5200_S6_RX_RSR1 0x4627
366 #define W5200_S6_RX_RD0 0x4628
367 #define W5200_S6_RX_RD1 0x4629
368 #define W5200_S6_RX_WR0 0x462A
369 #define W5200_S6_RX_WR1 0x462B
370 #define W5200_S6_IMR 0x462C
371 #define W5200_S6_FRAG0 0x462D
372 #define W5200_S6_FRAG1 0x462E
373 #define W5200_S7_MR 0x4700
374 #define W5200_S7_CR 0x4701
375 #define W5200_S7_IR 0x4702
376 #define W5200_S7_SR 0x4703
377 #define W5200_S7_PORT0 0x4704
378 #define W5200_S7_PORT1 0x4705
379 #define W5200_S7_DHAR0 0x4706
380 #define W5200_S7_DHAR1 0x4707
381 #define W5200_S7_DHAR2 0x4708
382 #define W5200_S7_DHAR3 0x4709
383 #define W5200_S7_DHAR4 0x470A
384 #define W5200_S7_DHAR5 0x470B
385 #define W5200_S7_DIPR0 0x470C
386 #define W5200_S7_DIPR1 0x470D
387 #define W5200_S7_DIPR2 0x470E
388 #define W5200_S7_DIPR3 0x470F
389 #define W5200_S7_DPORT0 0x4710
390 #define W5200_S7_DPORT1 0x4711
391 #define W5200_S7_MSSR0 0x4712
392 #define W5200_S7_MSSR1 0x4713
393 #define W5200_S7_PROTO 0x4714
394 #define W5200_S7_TOS 0x4715
395 #define W5200_S7_TTL 0x4716
396 #define W5200_S7_RXMEM_SIZE 0x471E
397 #define W5200_S7_TXMEM_SIZE 0x471F
398 #define W5200_S7_TX_FSR0 0x4720
399 #define W5200_S7_TX_FSR1 0x4721
400 #define W5200_S7_TX_RD0 0x4722
401 #define W5200_S7_TX_RD1 0x4723
402 #define W5200_S7_TX_WR0 0x4724
403 #define W5200_S7_TX_WR1 0x4725
404 #define W5200_S7_RX_RSR0 0x4726
405 #define W5200_S7_RX_RSR1 0x4727
406 #define W5200_S7_RX_RD0 0x4728
407 #define W5200_S7_RX_RD1 0x4729
408 #define W5200_S7_RX_WR0 0x472A
409 #define W5200_S7_RX_WR1 0x472B
410 #define W5200_S7_IMR 0x472C
411 #define W5200_S7_FRAG0 0x472D
412 #define W5200_S7_FRAG1 0x472E
413 
414 //W5200 Socket register access macros
415 #define W5200_Sn_MR(n) (0x4000 + ((n) * 0x0100))
416 #define W5200_Sn_CR(n) (0x4001 + ((n) * 0x0100))
417 #define W5200_Sn_IR(n) (0x4002 + ((n) * 0x0100))
418 #define W5200_Sn_SR(n) (0x4003 + ((n) * 0x0100))
419 #define W5200_Sn_PORT0(n) (0x4004 + ((n) * 0x0100))
420 #define W5200_Sn_PORT1(n) (0x4005 + ((n) * 0x0100))
421 #define W5200_Sn_DHAR0(n) (0x4006 + ((n) * 0x0100))
422 #define W5200_Sn_DHAR1(n) (0x4007 + ((n) * 0x0100))
423 #define W5200_Sn_DHAR2(n) (0x4008 + ((n) * 0x0100))
424 #define W5200_Sn_DHAR3(n) (0x4009 + ((n) * 0x0100))
425 #define W5200_Sn_DHAR4(n) (0x400A + ((n) * 0x0100))
426 #define W5200_Sn_DHAR5(n) (0x400B + ((n) * 0x0100))
427 #define W5200_Sn_DIPR0(n) (0x400C + ((n) * 0x0100))
428 #define W5200_Sn_DIPR1(n) (0x400D + ((n) * 0x0100))
429 #define W5200_Sn_DIPR2(n) (0x400E + ((n) * 0x0100))
430 #define W5200_Sn_DIPR3(n) (0x400F + ((n) * 0x0100))
431 #define W5200_Sn_DPORT0(n) (0x4010 + ((n) * 0x0100))
432 #define W5200_Sn_DPORT1(n) (0x4011 + ((n) * 0x0100))
433 #define W5200_Sn_MSSR0(n) (0x4012 + ((n) * 0x0100))
434 #define W5200_Sn_MSSR1(n) (0x4013 + ((n) * 0x0100))
435 #define W5200_Sn_PROTO(n) (0x4014 + ((n) * 0x0100))
436 #define W5200_Sn_TOS(n) (0x4015 + ((n) * 0x0100))
437 #define W5200_Sn_TTL(n) (0x4016 + ((n) * 0x0100))
438 #define W5200_Sn_RXMEM_SIZE(n) (0x401E + ((n) * 0x0100))
439 #define W5200_Sn_TXMEM_SIZE(n) (0x401F + ((n) * 0x0100))
440 #define W5200_Sn_TX_FSR0(n) (0x4020 + ((n) * 0x0100))
441 #define W5200_Sn_TX_FSR1(n) (0x4021 + ((n) * 0x0100))
442 #define W5200_Sn_TX_RD0(n) (0x4022 + ((n) * 0x0100))
443 #define W5200_Sn_TX_RD1(n) (0x4023 + ((n) * 0x0100))
444 #define W5200_Sn_TX_WR0(n) (0x4024 + ((n) * 0x0100))
445 #define W5200_Sn_TX_WR1(n) (0x4025 + ((n) * 0x0100))
446 #define W5200_Sn_RX_RSR0(n) (0x4026 + ((n) * 0x0100))
447 #define W5200_Sn_RX_RSR1(n) (0x4027 + ((n) * 0x0100))
448 #define W5200_Sn_RX_RD0(n) (0x4028 + ((n) * 0x0100))
449 #define W5200_Sn_RX_RD1(n) (0x4029 + ((n) * 0x0100))
450 #define W5200_Sn_RX_WR0(n) (0x402A + ((n) * 0x0100))
451 #define W5200_Sn_RX_WR1(n) (0x402B + ((n) * 0x0100))
452 #define W5200_Sn_IMR(n) (0x402C + ((n) * 0x0100))
453 #define W5200_Sn_FRAG0(n) (0x402D + ((n) * 0x0100))
454 #define W5200_Sn_FRAG1(n) (0x402E + ((n) * 0x0100))
455 
456 //TX and RX buffers
457 #define W5200_TX_BUFFER 0x8000
458 #define W5200_RX_BUFFER 0xC000
459 
460 //Mode register
461 #define W5200_MR_RST 0x80
462 #define W5200_MR_WOL 0x20
463 #define W5200_MR_PB 0x10
464 #define W5200_MR_PPPOE 0x08
465 
466 //Interrupt register
467 #define W5200_IR_CONFLICT 0x80
468 #define W5200_IR_PPPOE 0x20
469 
470 //Interrupt Mask register
471 #define W5200_IMR_S7_IMR 0x80
472 #define W5200_IMR_S6_IMR 0x40
473 #define W5200_IMR_S5_IMR 0x20
474 #define W5200_IMR_S4_IMR 0x10
475 #define W5200_IMR_S3_IMR 0x08
476 #define W5200_IMR_S2_IMR 0x04
477 #define W5200_IMR_S1_IMR 0x02
478 #define W5200_IMR_S0_IMR 0x01
479 
480 //Chip version register
481 #define W5200_VERSIONR_DEFAULT 0x03
482 
483 //Socket Interrupt register
484 #define W5200_IR2_S7_INT 0x80
485 #define W5200_IR2_S6_INT 0x40
486 #define W5200_IR2_S5_INT 0x20
487 #define W5200_IR2_S4_INT 0x10
488 #define W5200_IR2_S3_INT 0x08
489 #define W5200_IR2_S2_INT 0x04
490 #define W5200_IR2_S1_INT 0x02
491 #define W5200_IR2_S0_INT 0x01
492 
493 //PHY Status register
494 #define W5200_PSTATUS_LINK 0x20
495 #define W5200_PSTATUS_POWERSAVE 0x10
496 #define W5200_PSTATUS_POWERDOWN 0x08
497 
498 //Socket Interrupt Mask register
499 #define W5200_IMR2_IM_IR7 0x80
500 #define W5200_IMR2_IM_IR5 0x20
501 
502 //Socket n Mode register
503 #define W5200_Sn_MR_MULTI 0x80
504 #define W5200_Sn_MR_MF 0x40
505 #define W5200_Sn_MR_ND 0x20
506 #define W5200_Sn_MR_MC 0x20
507 #define W5200_Sn_MR_PROTOCOL 0x0F
508 #define W5200_Sn_MR_PROTOCOL_CLOSED 0x00
509 #define W5200_Sn_MR_PROTOCOL_TCP 0x01
510 #define W5200_Sn_MR_PROTOCOL_UDP 0x02
511 #define W5200_Sn_MR_PROTOCOL_IPRAW 0x03
512 #define W5200_Sn_MR_PROTOCOL_MACRAW 0x04
513 #define W5200_Sn_MR_PROTOCOL_PPPOE 0x05
514 
515 //Socket n Command register
516 #define W5200_Sn_CR_OPEN 0x01
517 #define W5200_Sn_CR_LISTEN 0x02
518 #define W5200_Sn_CR_CONNECT 0x04
519 #define W5200_Sn_CR_DISCON 0x08
520 #define W5200_Sn_CR_CLOSE 0x10
521 #define W5200_Sn_CR_SEND 0x20
522 #define W5200_Sn_CR_SEND_MAC 0x21
523 #define W5200_Sn_CR_SEND_KEEP 0x22
524 #define W5200_Sn_CR_PCON 0x23
525 #define W5200_Sn_CR_PDISCON 0x24
526 #define W5200_Sn_CR_PCR 0x25
527 #define W5200_Sn_CR_PCN 0x26
528 #define W5200_Sn_CR_PCJ 0x27
529 #define W5200_Sn_CR_RECV 0x40
530 
531 //Socket n Interrupt register
532 #define W5200_Sn_IR_PRECV 0x80
533 #define W5200_Sn_IR_PFAIL 0x40
534 #define W5200_Sn_IR_PNEXT 0x20
535 #define W5200_Sn_IR_SENDOK 0x10
536 #define W5200_Sn_IR_TIMEOUT 0x08
537 #define W5200_Sn_IR_RECV 0x04
538 #define W5200_Sn_IR_DISCON 0x02
539 #define W5200_Sn_IR_CON 0x01
540 
541 //Socket n Status register
542 #define W5200_Sn_SR_SOCK_CLOSED 0x00
543 #define W5200_Sn_SR_SOCK_ARP 0x01
544 #define W5200_Sn_SR_SOCK_INIT 0x13
545 #define W5200_Sn_SR_SOCK_LISTEN 0x14
546 #define W5200_Sn_SR_SOCK_SYNSENT 0x15
547 #define W5200_Sn_SR_SOCK_SYNRECV 0x16
548 #define W5200_Sn_SR_SOCK_ESTABLISHED 0x17
549 #define W5200_Sn_SR_SOCK_FIN_WAIT 0x18
550 #define W5200_Sn_SR_SOCK_CLOSING 0x1A
551 #define W5200_Sn_SR_SOCK_TIME_WAIT 0x1B
552 #define W5200_Sn_SR_SOCK_CLOSE_WAIT 0x1C
553 #define W5200_Sn_SR_SOCK_LAST_ACK 0x1D
554 #define W5200_Sn_SR_SOCK_UDP 0x22
555 #define W5200_Sn_SR_SOCK_IPRAW 0x32
556 #define W5200_Sn_SR_SOCK_MACRAW 0x42
557 #define W5200_Sn_SR_SOCK_PPPOE 0x5F
558 
559 //Socket n Receive Memory Size register
560 #define W5200_Sn_RXMEM_SIZE_0KB 0x00
561 #define W5200_Sn_RXMEM_SIZE_1KB 0x01
562 #define W5200_Sn_RXMEM_SIZE_2KB 0x02
563 #define W5200_Sn_RXMEM_SIZE_4KB 0x04
564 #define W5200_Sn_RXMEM_SIZE_8KB 0x08
565 #define W5200_Sn_RXMEM_SIZE_16KB 0x10
566 
567 //Socket n Transmit Memory Size register
568 #define W5200_Sn_TXMEM_SIZE_0KB 0x00
569 #define W5200_Sn_TXMEM_SIZE_1KB 0x01
570 #define W5200_Sn_TXMEM_SIZE_2KB 0x02
571 #define W5200_Sn_TXMEM_SIZE_4KB 0x04
572 #define W5200_Sn_TXMEM_SIZE_8KB 0x08
573 #define W5200_Sn_TXMEM_SIZE_16KB 0x10
574 
575 //Socket n Interrupt Mask register
576 #define W5200_Sn_IMR_PRECV 0x80
577 #define W5200_Sn_IMR_PFAIL 0x40
578 #define W5200_Sn_IMR_PNEXT 0x20
579 #define W5200_Sn_IMR_SENDOK 0x10
580 #define W5200_Sn_IMR_TIMEOUT 0x08
581 #define W5200_Sn_IMR_RECV 0x04
582 #define W5200_Sn_IMR_DISCON 0x02
583 #define W5200_Sn_IMR_CON 0x01
584 
585 //C++ guard
586 #ifdef __cplusplus
587 extern "C" {
588 #endif
589 
590 //W5200 driver
591 extern const NicDriver w5200Driver;
592 
593 //W5200 related functions
594 error_t w5200Init(NetInterface *interface);
595 void w5200InitHook(NetInterface *interface);
596 
597 void w5200Tick(NetInterface *interface);
598 
599 void w5200EnableIrq(NetInterface *interface);
600 void w5200DisableIrq(NetInterface *interface);
602 void w5200EventHandler(NetInterface *interface);
603 
605  const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary);
606 
608 
610 
611 void w5200WriteReg8(NetInterface *interface, uint16_t address, uint8_t data);
612 uint8_t w5200ReadReg8(NetInterface *interface, uint16_t address);
613 
614 void w5200WriteReg16(NetInterface *interface, uint16_t address, uint16_t data);
615 uint16_t w5200ReadReg16(NetInterface *interface, uint16_t address);
616 
617 void w5200WriteData(NetInterface *interface, const uint8_t *data,
618  size_t length);
619 
620 void w5200ReadData(NetInterface *interface, uint8_t *data, size_t length);
621 
622 void w5200WriteBuffer(NetInterface *interface, uint16_t offset,
623  const uint8_t *data, size_t length);
624 
625 void w5200ReadBuffer(NetInterface *interface, uint16_t address, uint8_t *data,
626  size_t length);
627 
628 void w5200DumpReg(NetInterface *interface);
629 
630 //C++ guard
631 #ifdef __cplusplus
632 }
633 #endif
634 
635 #endif
int bool_t
Definition: compiler_port.h:53
error_t
Error codes.
Definition: error.h:43
uint8_t data[]
Definition: ethernet.h:222
Ipv6Addr address[]
Definition: ipv6.h:316
#define NetInterface
Definition: net.h:36
#define NetTxAncillary
Definition: net_misc.h:36
Network interface controller abstraction layer.
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:89
NIC driver.
Definition: nic.h:283
uint8_t length
Definition: tcp.h:368
void w5200DumpReg(NetInterface *interface)
Dump registers for debugging purpose.
Definition: w5200_driver.c:754
uint16_t w5200ReadReg16(NetInterface *interface, uint16_t address)
Read 16-bit register.
Definition: w5200_driver.c:559
void w5200ReadData(NetInterface *interface, uint8_t *data, size_t length)
Read data.
Definition: w5200_driver.c:640
uint8_t w5200ReadReg8(NetInterface *interface, uint16_t address)
Read 8-bit register.
Definition: w5200_driver.c:497
void w5200DisableIrq(NetInterface *interface)
Disable interrupts.
Definition: w5200_driver.c:239
void w5200WriteReg16(NetInterface *interface, uint16_t address, uint16_t data)
Write 16-bit register.
Definition: w5200_driver.c:530
void w5200ReadBuffer(NetInterface *interface, uint16_t address, uint8_t *data, size_t length)
Read RX buffer.
Definition: w5200_driver.c:722
void w5200WriteData(NetInterface *interface, const uint8_t *data, size_t length)
Write data.
Definition: w5200_driver.c:593
void w5200InitHook(NetInterface *interface)
W5200 custom configuration.
Definition: w5200_driver.c:177
error_t w5200UpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
Definition: w5200_driver.c:455
void w5200EnableIrq(NetInterface *interface)
Enable interrupts.
Definition: w5200_driver.c:224
bool_t w5200IrqHandler(NetInterface *interface)
W5200 interrupt service routine.
Definition: w5200_driver.c:255
error_t w5200ReceivePacket(NetInterface *interface)
Receive a packet.
Definition: w5200_driver.c:394
error_t w5200Init(NetInterface *interface)
W5200 controller initialization.
Definition: w5200_driver.c:71
void w5200WriteReg8(NetInterface *interface, uint16_t address, uint8_t data)
Write 8-bit register.
Definition: w5200_driver.c:469
const NicDriver w5200Driver
W5200 driver.
Definition: w5200_driver.c:44
void w5200Tick(NetInterface *interface)
W5200 timer handler.
Definition: w5200_driver.c:187
void w5200WriteBuffer(NetInterface *interface, uint16_t offset, const uint8_t *data, size_t length)
Write TX buffer.
Definition: w5200_driver.c:687
error_t w5200SendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary)
Send a packet.
Definition: w5200_driver.c:341
void w5200EventHandler(NetInterface *interface)
W5200 event handler.
Definition: w5200_driver.c:316