dp83865_driver.c

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/**
 * @file dp83865_driver.c
 * @brief DP83865 Gigabit Ethernet PHY driver
 *
 * @section License
 *
 * SPDX-License-Identifier: GPL-2.0-or-later
 *
 * Copyright (C) 2010-2026 Oryx Embedded SARL. All rights reserved.
 *
 * This file is part of CycloneTCP Open.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software Foundation,
 * Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
 *
 * @author Oryx Embedded SARL (www.oryx-embedded.com)
 * @version 2.6.0
 **/
 
//Switch to the appropriate trace level
#define TRACE_LEVEL NIC_TRACE_LEVEL
 
//Dependencies
#include "core/net.h"
#include "drivers/phy/dp83865_driver.h"
#include "debug.h"
 
 
/**
 * @brief DP83865 Ethernet PHY driver
 **/
 
const PhyDriver dp83865PhyDriver =
{
   dp83865Init,
   dp83865Tick,
   dp83865EnableIrq,
   dp83865DisableIrq,
   dp83865EventHandler
};
 
 
/**
 * @brief DP83865 PHY transceiver initialization
 * @param[in] interface Underlying network interface
 * @return Error code
 **/
 
error_t dp83865Init(NetInterface *interface)
{
   uint16_t temp;
 
   //Debug message
   TRACE_INFO("Initializing DP83865...\r\n");
 
   //Undefined PHY address?
   if(interface->phyAddr >= 32)
   {
      //Use the default address
      interface->phyAddr = DP83865_PHY_ADDR;
   }
 
   //Initialize serial management interface
   if(interface->smiDriver != NULL)
   {
      interface->smiDriver->init();
   }
 
   //Initialize external interrupt line driver
   if(interface->extIntDriver != NULL)
   {
      interface->extIntDriver->init();
   }
 
   //Reset PHY transceiver
   dp83865WritePhyReg(interface, DP83865_BMCR, DP83865_BMCR_RESET);
 
   //Wait for the reset to complete
   while(dp83865ReadPhyReg(interface, DP83865_BMCR) & DP83865_BMCR_RESET)
   {
   }
 
   //Dump PHY registers for debugging purpose
   dp83865DumpPhyReg(interface);
 
   //Select RGMII mode
   temp = dp83865ReadPhyReg(interface, DP83865_AUX_CTRL);
   temp &= ~DP83865_AUX_CTRL_RGMII_EN;
   temp |= DP83865_AUX_CTRL_RGMII_EN_RGMII_3COM_MODE;
   dp83865WritePhyReg(interface, DP83865_AUX_CTRL, temp);
 
   //Perform custom configuration
   dp83865InitHook(interface);
 
   //Force the TCP/IP stack to poll the link state at startup
   interface->phyEvent = TRUE;
   //Notify the TCP/IP stack of the event
   osSetEvent(&interface->netContext->event);
 
   //Successful initialization
   return NO_ERROR;
}
 
 
/**
 * @brief DP83865 custom configuration
 * @param[in] interface Underlying network interface
 **/
 
__weak_func void dp83865InitHook(NetInterface *interface)
{
}
 
 
/**
 * @brief DP83865 timer handler
 * @param[in] interface Underlying network interface
 **/
 
void dp83865Tick(NetInterface *interface)
{
   uint16_t value;
   bool_t linkState;
 
   //Read basic status register
   value = dp83865ReadPhyReg(interface, DP83865_BMSR);
   //Retrieve current link state
   linkState = (value & DP83865_BMSR_LINK_STATUS) ? TRUE : FALSE;
 
   //Link up event?
   if(linkState && !interface->linkState)
   {
      //Set event flag
      interface->phyEvent = TRUE;
      //Notify the TCP/IP stack of the event
      osSetEvent(&interface->netContext->event);
   }
   //Link down event?
   else if(!linkState && interface->linkState)
   {
      //Set event flag
      interface->phyEvent = TRUE;
      //Notify the TCP/IP stack of the event
      osSetEvent(&interface->netContext->event);
   }
}
 
 
/**
 * @brief Enable interrupts
 * @param[in] interface Underlying network interface
 **/
 
void dp83865EnableIrq(NetInterface *interface)
{
   //Enable PHY transceiver interrupts
   if(interface->extIntDriver != NULL)
   {
      interface->extIntDriver->enableIrq();
   }
}
 
 
/**
 * @brief Disable interrupts
 * @param[in] interface Underlying network interface
 **/
 
void dp83865DisableIrq(NetInterface *interface)
{
   //Disable PHY transceiver interrupts
   if(interface->extIntDriver != NULL)
   {
      interface->extIntDriver->disableIrq();
   }
}
 
 
/**
 * @brief DP83865 event handler
 * @param[in] interface Underlying network interface
 **/
 
void dp83865EventHandler(NetInterface *interface)
{
   uint16_t status;
   bool_t linkState;
 
   //Read Link and Auto-Negotiation Status register
   status = dp83865ReadPhyReg(interface, DP83865_LINK_AN);
   //Retrieve current link state
   linkState = (status & DP83865_LINK_AN_LINK_STATUS) ? TRUE : FALSE;
 
   //Link up event?
   if(linkState && !interface->linkState)
   {
      //Check current speed
      switch(status & DP83865_LINK_AN_SPEED_STATUS)
      {
      //10BASE-T
      case DP83865_LINK_AN_SPEED_STATUS_10MBPS:
         interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
         break;
      //100BASE-TX
      case DP83865_LINK_AN_SPEED_STATUS_100MBPS:
         interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
         break;
      //1000BASE-T
      case DP83865_LINK_AN_SPEED_STATUS_1000MBPS:
         interface->linkSpeed = NIC_LINK_SPEED_1GBPS;
         break;
      //Unknown speed
      default:
         //Debug message
         TRACE_WARNING("Invalid speed\r\n");
         break;
      }
 
      //Check duplex mode
      if((status & DP83865_LINK_AN_DUPLEX_STATUS) != 0)
      {
         interface->duplexMode = NIC_FULL_DUPLEX_MODE;
      }
      else
      {
         interface->duplexMode = NIC_HALF_DUPLEX_MODE;
      }
 
      //Update link state
      interface->linkState = TRUE;
 
      //Adjust MAC configuration parameters for proper operation
      interface->nicDriver->updateMacConfig(interface);
 
      //Process link state change event
      nicNotifyLinkChange(interface);
   }
   //Link down event?
   else if(!linkState && interface->linkState)
   {
      //Update link state
      interface->linkState = FALSE;
 
      //Process link state change event
      nicNotifyLinkChange(interface);
   }
}
 
 
/**
 * @brief Write PHY register
 * @param[in] interface Underlying network interface
 * @param[in] address PHY register address
 * @param[in] data Register value
 **/
 
void dp83865WritePhyReg(NetInterface *interface, uint8_t address,
   uint16_t data)
{
   //Write the specified PHY register
   if(interface->smiDriver != NULL)
   {
      interface->smiDriver->writePhyReg(SMI_OPCODE_WRITE,
         interface->phyAddr, address, data);
   }
   else
   {
      interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE,
         interface->phyAddr, address, data);
   }
}
 
 
/**
 * @brief Read PHY register
 * @param[in] interface Underlying network interface
 * @param[in] address PHY register address
 * @return Register value
 **/
 
uint16_t dp83865ReadPhyReg(NetInterface *interface, uint8_t address)
{
   uint16_t data;
 
   //Read the specified PHY register
   if(interface->smiDriver != NULL)
   {
      data = interface->smiDriver->readPhyReg(SMI_OPCODE_READ,
         interface->phyAddr, address);
   }
   else
   {
      data = interface->nicDriver->readPhyReg(SMI_OPCODE_READ,
         interface->phyAddr, address);
   }
 
   //Return the value of the PHY register
   return data;
}
 
 
/**
 * @brief Dump PHY registers for debugging purpose
 * @param[in] interface Underlying network interface
 **/
 
void dp83865DumpPhyReg(NetInterface *interface)
{
   uint8_t i;
 
   //Loop through PHY registers
   for(i = 0; i < 32; i++)
   {
      //Display current PHY register
      TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
         dp83865ReadPhyReg(interface, i));
   }
 
   //Terminate with a line feed
   TRACE_DEBUG("\r\n");
}