ksz8463_driver.h
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1 /**
2  * @file ksz8463_driver.h
3  * @brief KSZ8463 3-port Ethernet switch driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.4.0
29  **/
30 
31 #ifndef _KSZ8463_DRIVER_H
32 #define _KSZ8463_DRIVER_H
33 
34 //Dependencies
35 #include "core/nic.h"
36 
37 //Port identifiers
38 #define KSZ8463_PORT1 1
39 #define KSZ8463_PORT2 2
40 #define KSZ8463_PORT3 3
41 
42 //Port masks
43 #define KSZ8463_PORT_MASK 0x07
44 #define KSZ8463_PORT1_MASK 0x01
45 #define KSZ8463_PORT2_MASK 0x02
46 #define KSZ8463_PORT3_MASK 0x04
47 
48 //SPI command byte
49 #define KSZ8463_SPI_CMD_READ 0x0000
50 #define KSZ8463_SPI_CMD_WRITE 0x8000
51 #define KSZ8463_SPI_CMD_ADDR 0x7FC0
52 #define KSZ8463_SPI_CMD_B3 0x0020
53 #define KSZ8463_SPI_CMD_B2 0x0010
54 #define KSZ8463_SPI_CMD_B1 0x0008
55 #define KSZ8463_SPI_CMD_B0 0x0004
56 
57 //Size of static and dynamic MAC tables
58 #define KSZ8463_STATIC_MAC_TABLE_SIZE 8
59 #define KSZ8463_DYNAMIC_MAC_TABLE_SIZE 1024
60 
61 //Tail tag rules (host to KSZ8463)
62 #define KSZ8463_TAIL_TAG_PRIORITY 0x0C
63 #define KSZ8463_TAIL_TAG_DEST_PORT2 0x02
64 #define KSZ8463_TAIL_TAG_DEST_PORT1 0x01
65 #define KSZ8463_TAIL_TAG_NORMAL_ADDR_LOOKUP 0x00
66 
67 //Tail tag rules (KSZ8463 to host)
68 #define KSZ8463_TAIL_TAG_SRC_PORT 0x01
69 
70 //KSZ8463 PHY registers
71 #define KSZ8463_BMCR 0x00
72 #define KSZ8463_BMSR 0x01
73 #define KSZ8463_PHYID1 0x02
74 #define KSZ8463_PHYID2 0x03
75 #define KSZ8463_ANAR 0x04
76 #define KSZ8463_ANLPAR 0x05
77 #define KSZ8463_LINKMD 0x1D
78 #define KSZ8463_PHYSCS 0x1F
79 
80 //KSZ8463 Switch registers
81 #define KSZ8463_CIDER 0x0000
82 #define KSZ8463_SGCR1 0x0002
83 #define KSZ8463_SGCR2 0x0004
84 #define KSZ8463_SGCR3 0x0006
85 #define KSZ8463_SGCR6 0x000C
86 #define KSZ8463_SGCR7 0x000E
87 #define KSZ8463_MACAR1 0x0010
88 #define KSZ8463_MACAR2 0x0012
89 #define KSZ8463_MACAR3 0x0014
90 #define KSZ8463_TOSR1 0x0016
91 #define KSZ8463_TOSR2 0x0018
92 #define KSZ8463_TOSR3 0x001A
93 #define KSZ8463_TOSR4 0x001C
94 #define KSZ8463_TOSR5 0x001E
95 #define KSZ8463_TOSR6 0x0020
96 #define KSZ8463_TOSR7 0x0022
97 #define KSZ8463_TOSR8 0x0024
98 #define KSZ8463_IADR1 0x0026
99 #define KSZ8463_IADR2 0x0028
100 #define KSZ8463_IADR3 0x002A
101 #define KSZ8463_IADR4 0x002C
102 #define KSZ8463_IADR5 0x002E
103 #define KSZ8463_IACR 0x0030
104 #define KSZ8463_PMCTRL 0x0032
105 #define KSZ8463_GST 0x0036
106 #define KSZ8463_CTPDC 0x0038
107 #define KSZ8463_P1MBCR 0x004C
108 #define KSZ8463_P1MBSR 0x004E
109 #define KSZ8463_PHY1ILR 0x0050
110 #define KSZ8463_PHY1IHR 0x0052
111 #define KSZ8463_P1ANAR 0x0054
112 #define KSZ8463_P1ANLPR 0x0056
113 #define KSZ8463_P2MBCR 0x0058
114 #define KSZ8463_P2MBSR 0x005A
115 #define KSZ8463_PHY2ILR 0x005C
116 #define KSZ8463_PHY2IHR 0x005E
117 #define KSZ8463_P2ANAR 0x0060
118 #define KSZ8463_P2ANLPR 0x0062
119 #define KSZ8463_P1PHYCTRL 0x0066
120 #define KSZ8463_P2PHYCTRL 0x006A
121 #define KSZ8463_P1CR1 0x006C
122 #define KSZ8463_P1CR2 0x006E
123 #define KSZ8463_P1VIDCR 0x0070
124 #define KSZ8463_P1CR3 0x0072
125 #define KSZ8463_P1IRCR0 0x0074
126 #define KSZ8463_P1IRCR1 0x0076
127 #define KSZ8463_P1ERCR0 0x0078
128 #define KSZ8463_P1ERCR1 0x007A
129 #define KSZ8463_P1SCSLMD 0x007C
130 #define KSZ8463_P1CR4 0x007E
131 #define KSZ8463_P1SR 0x0080
132 #define KSZ8463_P2CR1 0x0084
133 #define KSZ8463_P2CR2 0x0086
134 #define KSZ8463_P2VIDCR 0x0088
135 #define KSZ8463_P2CR3 0x008A
136 #define KSZ8463_P2IRCR0 0x008C
137 #define KSZ8463_P2IRCR1 0x008E
138 #define KSZ8463_P2ERCR0 0x0090
139 #define KSZ8463_P2ERCR1 0x0092
140 #define KSZ8463_P2SCSLMD 0x0094
141 #define KSZ8463_P2CR4 0x0096
142 #define KSZ8463_P2SR 0x0098
143 #define KSZ8463_P3CR1 0x009C
144 #define KSZ8463_P3CR2 0x009E
145 #define KSZ8463_P3VIDCR 0x00A0
146 #define KSZ8463_P3CR3 0x00A2
147 #define KSZ8463_P3IRCR0 0x00A4
148 #define KSZ8463_P3IRCR1 0x00A6
149 #define KSZ8463_P3ERCR0 0x00A8
150 #define KSZ8463_P3ERCR1 0x00AA
151 #define KSZ8463_SGCR8 0x00AC
152 #define KSZ8463_SGCR9 0x00AE
153 #define KSZ8463_SAFMACA1L 0x00B0
154 #define KSZ8463_SAFMACA1M 0x00B2
155 #define KSZ8463_SAFMACA1H 0x00B4
156 #define KSZ8463_SAFMACA2L 0x00B6
157 #define KSZ8463_SAFMACA2M 0x00B8
158 #define KSZ8463_SAFMACA2H 0x00BA
159 #define KSZ8463_P1TXQRCR1 0x00C8
160 #define KSZ8463_P1TXQRCR2 0x00CA
161 #define KSZ8463_P2TXQRCR1 0x00CC
162 #define KSZ8463_P2TXQRCR2 0x00CE
163 #define KSZ8463_P3TXQRCR1 0x00D0
164 #define KSZ8463_P3TXQRCR2 0x00D2
165 #define KSZ8463_IOMXSEL 0x00D6
166 #define KSZ8463_CFGR 0x00D8
167 #define KSZ8463_P1ANPT 0x00DC
168 #define KSZ8463_P1ALPRNP 0x00DE
169 #define KSZ8463_P1EEEA 0x00E0
170 #define KSZ8463_P1EEEWEC 0x00E2
171 #define KSZ8463_P1EEECS 0x00E4
172 #define KSZ8463_P1LPIRTC 0x00E6
173 #define KSZ8463_BL2LPIC1 0x00E7
174 #define KSZ8463_P2ANPT 0x00E8
175 #define KSZ8463_P2ALPRNP 0x00EA
176 #define KSZ8463_P2EEEA 0x00EC
177 #define KSZ8463_P2EEEWEC 0x00EE
178 #define KSZ8463_P2EEECS 0x00F0
179 #define KSZ8463_P2LPIRTC 0x00F2
180 #define KSZ8463_PCSEEEC 0x00F3
181 #define KSZ8463_ETLWTC 0x00F4
182 #define KSZ8463_BL2LPIC2 0x00F6
183 #define KSZ8463_MBIR 0x0124
184 #define KSZ8463_GRR 0x0126
185 #define KSZ8463_IER 0x0190
186 #define KSZ8463_ISR 0x0192
187 #define KSZ8463_TRIG_ERR 0x0200
188 #define KSZ8463_TRIG_ACTIVE 0x0202
189 #define KSZ8463_TRIG_DONE 0x0204
190 #define KSZ8463_TRIG_EN 0x0206
191 #define KSZ8463_TRIG_SW_RST 0x0208
192 #define KSZ8463_TRIG12_PPS_WIDTH 0x020A
193 #define KSZ8463_TRIG1_TGT_NSL 0x0220
194 #define KSZ8463_TRIG1_TGT_NSH 0x0222
195 #define KSZ8463_TRIG1_TGT_SL 0x0224
196 #define KSZ8463_TRIG1_TGT_SH 0x0226
197 #define KSZ8463_TRIG1_CFG_1 0x0228
198 #define KSZ8463_TRIG1_CFG_2 0x022A
199 #define KSZ8463_TRIG1_CFG_3 0x022C
200 #define KSZ8463_TRIG1_CFG_4 0x022E
201 #define KSZ8463_TRIG1_CFG_5 0x0230
202 #define KSZ8463_TRIG1_CFG_6 0x0232
203 #define KSZ8463_TRIG1_CFG_7 0x0234
204 #define KSZ8463_TRIG1_CFG_8 0x0236
205 #define KSZ8463_TRIG2_TGT_NSL 0x0240
206 #define KSZ8463_TRIG2_TGT_NSH 0x0242
207 #define KSZ8463_TRIG2_TGT_SL 0x0244
208 #define KSZ8463_TRIG2_TGT_SH 0x0246
209 #define KSZ8463_TRIG2_CFG_1 0x0248
210 #define KSZ8463_TRIG2_CFG_2 0x024A
211 #define KSZ8463_TRIG2_CFG_3 0x024C
212 #define KSZ8463_TRIG2_CFG_4 0x024E
213 #define KSZ8463_TRIG2_CFG_5 0x0250
214 #define KSZ8463_TRIG2_CFG_6 0x0252
215 #define KSZ8463_TRIG2_CFG_7 0x0254
216 #define KSZ8463_TRIG2_CFG_8 0x0256
217 #define KSZ8463_TRIG3_TGT_NSL 0x0260
218 #define KSZ8463_TRIG3_TGT_NSH 0x0262
219 #define KSZ8463_TRIG3_TGT_SL 0x0264
220 #define KSZ8463_TRIG3_TGT_SH 0x0266
221 #define KSZ8463_TRIG3_CFG_1 0x0268
222 #define KSZ8463_TRIG3_CFG_2 0x026A
223 #define KSZ8463_TRIG3_CFG_3 0x026C
224 #define KSZ8463_TRIG3_CFG_4 0x026E
225 #define KSZ8463_TRIG3_CFG_5 0x0270
226 #define KSZ8463_TRIG3_CFG_6 0x0272
227 #define KSZ8463_TRIG3_CFG_7 0x0274
228 #define KSZ8463_TRIG3_CFG_8 0x0276
229 #define KSZ8463_TRIG4_TGT_NSL 0x0280
230 #define KSZ8463_TRIG4_TGT_NSH 0x0282
231 #define KSZ8463_TRIG4_TGT_SL 0x0284
232 #define KSZ8463_TRIG4_TGT_SH 0x0286
233 #define KSZ8463_TRIG4_CFG_1 0x0288
234 #define KSZ8463_TRIG4_CFG_2 0x028A
235 #define KSZ8463_TRIG4_CFG_3 0x028C
236 #define KSZ8463_TRIG4_CFG_4 0x028E
237 #define KSZ8463_TRIG4_CFG_5 0x0290
238 #define KSZ8463_TRIG4_CFG_6 0x0292
239 #define KSZ8463_TRIG4_CFG_7 0x0294
240 #define KSZ8463_TRIG4_CFG_8 0x0296
241 #define KSZ8463_TRIG5_TGT_NSL 0x02A0
242 #define KSZ8463_TRIG5_TGT_NSH 0x02A2
243 #define KSZ8463_TRIG5_TGT_SL 0x02A4
244 #define KSZ8463_TRIG5_TGT_SH 0x02A6
245 #define KSZ8463_TRIG5_CFG_1 0x02A8
246 #define KSZ8463_TRIG5_CFG_2 0x02AA
247 #define KSZ8463_TRIG5_CFG_3 0x02AC
248 #define KSZ8463_TRIG5_CFG_4 0x02AE
249 #define KSZ8463_TRIG5_CFG_5 0x02B0
250 #define KSZ8463_TRIG5_CFG_6 0x02B2
251 #define KSZ8463_TRIG5_CFG_7 0x02B4
252 #define KSZ8463_TRIG5_CFG_8 0x02B6
253 #define KSZ8463_TRIG6_TGT_NSL 0x02C0
254 #define KSZ8463_TRIG6_TGT_NSH 0x02C2
255 #define KSZ8463_TRIG6_TGT_SL 0x02C4
256 #define KSZ8463_TRIG6_TGT_SH 0x02C6
257 #define KSZ8463_TRIG6_CFG_1 0x02C8
258 #define KSZ8463_TRIG6_CFG_2 0x02CA
259 #define KSZ8463_TRIG6_CFG_3 0x02CC
260 #define KSZ8463_TRIG6_CFG_4 0x02CE
261 #define KSZ8463_TRIG6_CFG_5 0x02D0
262 #define KSZ8463_TRIG6_CFG_6 0x02D2
263 #define KSZ8463_TRIG6_CFG_7 0x02D4
264 #define KSZ8463_TRIG6_CFG_8 0x02D6
265 #define KSZ8463_TRIG7_TGT_NSL 0x02E0
266 #define KSZ8463_TRIG7_TGT_NSH 0x02E2
267 #define KSZ8463_TRIG7_TGT_SL 0x02E4
268 #define KSZ8463_TRIG7_TGT_SH 0x02E6
269 #define KSZ8463_TRIG7_CFG_1 0x02E8
270 #define KSZ8463_TRIG7_CFG_2 0x02EA
271 #define KSZ8463_TRIG7_CFG_3 0x02EC
272 #define KSZ8463_TRIG7_CFG_4 0x02EE
273 #define KSZ8463_TRIG7_CFG_5 0x02F0
274 #define KSZ8463_TRIG7_CFG_6 0x02F2
275 #define KSZ8463_TRIG7_CFG_7 0x02F4
276 #define KSZ8463_TRIG7_CFG_8 0x02F6
277 #define KSZ8463_TRIG8_TGT_NSL 0x0300
278 #define KSZ8463_TRIG8_TGT_NSH 0x0302
279 #define KSZ8463_TRIG8_TGT_SL 0x0304
280 #define KSZ8463_TRIG8_TGT_SH 0x0306
281 #define KSZ8463_TRIG8_CFG_1 0x0308
282 #define KSZ8463_TRIG8_CFG_2 0x030A
283 #define KSZ8463_TRIG8_CFG_3 0x030C
284 #define KSZ8463_TRIG8_CFG_4 0x030E
285 #define KSZ8463_TRIG8_CFG_5 0x0310
286 #define KSZ8463_TRIG8_CFG_6 0x0312
287 #define KSZ8463_TRIG8_CFG_7 0x0314
288 #define KSZ8463_TRIG8_CFG_8 0x0316
289 #define KSZ8463_TRIG9_TGT_NSL 0x0320
290 #define KSZ8463_TRIG9_TGT_NSH 0x0322
291 #define KSZ8463_TRIG9_TGT_SL 0x0324
292 #define KSZ8463_TRIG9_TGT_SH 0x0326
293 #define KSZ8463_TRIG9_CFG_1 0x0328
294 #define KSZ8463_TRIG9_CFG_2 0x032A
295 #define KSZ8463_TRIG9_CFG_3 0x032C
296 #define KSZ8463_TRIG9_CFG_4 0x032E
297 #define KSZ8463_TRIG9_CFG_5 0x0330
298 #define KSZ8463_TRIG9_CFG_6 0x0332
299 #define KSZ8463_TRIG9_CFG_7 0x0334
300 #define KSZ8463_TRIG9_CFG_8 0x0336
301 #define KSZ8463_TRIG10_TGT_NSL 0x0340
302 #define KSZ8463_TRIG10_TGT_NSH 0x0342
303 #define KSZ8463_TRIG10_TGT_SL 0x0344
304 #define KSZ8463_TRIG10_TGT_SH 0x0346
305 #define KSZ8463_TRIG10_CFG_1 0x0348
306 #define KSZ8463_TRIG10_CFG_2 0x034A
307 #define KSZ8463_TRIG10_CFG_3 0x034C
308 #define KSZ8463_TRIG10_CFG_4 0x034E
309 #define KSZ8463_TRIG10_CFG_5 0x0350
310 #define KSZ8463_TRIG10_CFG_6 0x0352
311 #define KSZ8463_TRIG10_CFG_7 0x0354
312 #define KSZ8463_TRIG10_CFG_8 0x0356
313 #define KSZ8463_TRIG11_TGT_NSL 0x0360
314 #define KSZ8463_TRIG11_TGT_NSH 0x0362
315 #define KSZ8463_TRIG11_TGT_SL 0x0364
316 #define KSZ8463_TRIG11_TGT_SH 0x0366
317 #define KSZ8463_TRIG11_CFG_1 0x0368
318 #define KSZ8463_TRIG11_CFG_2 0x036A
319 #define KSZ8463_TRIG11_CFG_3 0x036C
320 #define KSZ8463_TRIG11_CFG_4 0x036E
321 #define KSZ8463_TRIG11_CFG_5 0x0370
322 #define KSZ8463_TRIG11_CFG_6 0x0372
323 #define KSZ8463_TRIG11_CFG_7 0x0374
324 #define KSZ8463_TRIG11_CFG_8 0x0376
325 #define KSZ8463_TRIG12_TGT_NSL 0x0380
326 #define KSZ8463_TRIG12_TGT_NSH 0x0382
327 #define KSZ8463_TRIG12_TGT_SL 0x0384
328 #define KSZ8463_TRIG12_TGT_SH 0x0386
329 #define KSZ8463_TRIG12_CFG_1 0x0388
330 #define KSZ8463_TRIG12_CFG_2 0x038A
331 #define KSZ8463_TRIG12_CFG_3 0x038C
332 #define KSZ8463_TRIG12_CFG_4 0x038E
333 #define KSZ8463_TRIG12_CFG_5 0x0390
334 #define KSZ8463_TRIG12_CFG_6 0x0392
335 #define KSZ8463_TRIG12_CFG_7 0x0394
336 #define KSZ8463_TRIG12_CFG_8 0x0396
337 #define KSZ8463_TS_RDY 0x0400
338 #define KSZ8463_TS_EN 0x0402
339 #define KSZ8463_TS_SW_RST 0x0404
340 #define KSZ8463_TS1_STATUS 0x0420
341 #define KSZ8463_TS1_CFG 0x0422
342 #define KSZ8463_TS1_SMPL1_NSL 0x0424
343 #define KSZ8463_TS1_SMPL1_NSH 0x0426
344 #define KSZ8463_TS1_SMPL1_SL 0x0428
345 #define KSZ8463_TS1_SMPL1_SH 0x042A
346 #define KSZ8463_TS1_SMPL1_SUB_NS 0x042C
347 #define KSZ8463_TS1_SMPL2_NSL 0x0434
348 #define KSZ8463_TS1_SMPL2_NSH 0x0436
349 #define KSZ8463_TS1_SMPL2_SL 0x0438
350 #define KSZ8463_TS1_SMPL2_SH 0x043A
351 #define KSZ8463_TS1_SMPL2_SUB_NS 0x043C
352 #define KSZ8463_TS2_STATUS 0x0440
353 #define KSZ8463_TS2_CFG 0x0442
354 #define KSZ8463_TS2_SMPL1_NSL 0x0444
355 #define KSZ8463_TS2_SMPL1_NSH 0x0446
356 #define KSZ8463_TS2_SMPL1_SL 0x0448
357 #define KSZ8463_TS2_SMPL1_SH 0x044A
358 #define KSZ8463_TS2_SMPL1_SUB_NS 0x044C
359 #define KSZ8463_TS2_SMPL2_NSL 0x0454
360 #define KSZ8463_TS2_SMPL2_NSH 0x0456
361 #define KSZ8463_TS2_SMP2_SL 0x0458
362 #define KSZ8463_TS2_SMPL2_SH 0x045A
363 #define KSZ8463_TS2_SMPL2_SUB_NS 0x045C
364 #define KSZ8463_TS3_STATUS 0x0460
365 #define KSZ8463_TS3_CFG 0x0462
366 #define KSZ8463_TS3_SMPL1_NSL 0x0464
367 #define KSZ8463_TS3_SMPL1_NSH 0x0466
368 #define KSZ8463_TS3_SMPL1_SL 0x0468
369 #define KSZ8463_TS3_SMPL1_SH 0x046A
370 #define KSZ8463_TS3_SMPL1_SUB_NS 0x046C
371 #define KSZ8463_TS3_SMPL2_NSL 0x0474
372 #define KSZ8463_TS3_SMPL2_NSH 0x0476
373 #define KSZ8463_TS3_SMP2_SL 0x0478
374 #define KSZ8463_TS3_SMPL2_SH 0x047A
375 #define KSZ8463_TS3_SMPL2_SUB_NS 0x047C
376 #define KSZ8463_TS4_STATUS 0x0480
377 #define KSZ8463_TS4_CFG 0x0482
378 #define KSZ8463_TS4_SMPL1_NSL 0x0484
379 #define KSZ8463_TS4_SMPL1_NSH 0x0486
380 #define KSZ8463_TS4_SMPL1_SL 0x0488
381 #define KSZ8463_TS4_SMPL1_SH 0x048A
382 #define KSZ8463_TS4_SMPL1_SUB_NS 0x048C
383 #define KSZ8463_TS4_SMPL2_NSL 0x0494
384 #define KSZ8463_TS4_SMPL2_NSH 0x0496
385 #define KSZ8463_TS4_SMP2_SL 0x0498
386 #define KSZ8463_TS4_SMPL2_SH 0x049A
387 #define KSZ8463_TS4_SMPL2_SUB_NS 0x049C
388 #define KSZ8463_TS5_STATUS 0x04A0
389 #define KSZ8463_TS5_STATUS 0x04A0
390 #define KSZ8463_TS5_CFG 0x04A2
391 #define KSZ8463_TS5_SMPL1_NSL 0x04A4
392 #define KSZ8463_TS5_SMPL1_NSH 0x04A6
393 #define KSZ8463_TS5_SMPL1_SL 0x04A8
394 #define KSZ8463_TS5_SMPL1_SH 0x04AA
395 #define KSZ8463_TS5_SMPL1_SUB_NS 0x04AC
396 #define KSZ8463_TS5_SMPL2_NSL 0x04B4
397 #define KSZ8463_TS5_SMPL2_NSH 0x04B6
398 #define KSZ8463_TS5_SMP2_SL 0x04B8
399 #define KSZ8463_TS5_SMPL2_SH 0x04BA
400 #define KSZ8463_TS5_SMPL2_SUB_NS 0x04BC
401 #define KSZ8463_TS6_STATUS 0x04C0
402 #define KSZ8463_TS6_CFG 0x04C2
403 #define KSZ8463_TS6_SMPL1_NSL 0x04C4
404 #define KSZ8463_TS6_SMPL1_NSH 0x04C6
405 #define KSZ8463_TS6_SMPL1_SL 0x04C8
406 #define KSZ8463_TS6_SMPL1_SH 0x04CA
407 #define KSZ8463_TS6_SMPL1_SUB_NS 0x04CC
408 #define KSZ8463_TS6_SMPL2_NSL 0x04D4
409 #define KSZ8463_TS6_SMPL2_NSH 0x04D6
410 #define KSZ8463_TS6_SMP2_SL 0x04D8
411 #define KSZ8463_TS6_SMPL2_SH 0x04DA
412 #define KSZ8463_TS6_SMPL2_SUB_NS 0x04DC
413 #define KSZ8463_TS7_STATUS 0x04E0
414 #define KSZ8463_TS7_CFG 0x04E2
415 #define KSZ8463_TS7_SMPL1_NSL 0x04E4
416 #define KSZ8463_TS7_SMPL1_NSH 0x04E6
417 #define KSZ8463_TS7_SMPL1_SL 0x04E8
418 #define KSZ8463_TS7_SMPL1_SH 0x04EA
419 #define KSZ8463_TS7_SMPL1_SUB_NS 0x04EC
420 #define KSZ8463_TS7_SMPL2_NSL 0x04F4
421 #define KSZ8463_TS7_SMPL2_NSH 0x04F6
422 #define KSZ8463_TS7_SMP2_SL 0x04F8
423 #define KSZ8463_TS7_SMPL2_SH 0x04FA
424 #define KSZ8463_TS7_SMPL2_SUB_NS 0x04FC
425 #define KSZ8463_TS8_STATUS 0x0500
426 #define KSZ8463_TS8_CFG 0x0502
427 #define KSZ8463_TS8_SMPL1_NSL 0x0504
428 #define KSZ8463_TS8_SMPL1_NSH 0x0506
429 #define KSZ8463_TS8_SMPL1_SL 0x0508
430 #define KSZ8463_TS8_SMPL1_SH 0x050A
431 #define KSZ8463_TS8_SMPL1_SUB_NS 0x050C
432 #define KSZ8463_TS8_SMPL2_NSL 0x0514
433 #define KSZ8463_TS8_SMPL2_NSH 0x0516
434 #define KSZ8463_TS8_SMP2_SL 0x0518
435 #define KSZ8463_TS8_SMPL2_SH 0x051A
436 #define KSZ8463_TS8_SMPL2_SUB_NS 0x051C
437 #define KSZ8463_TS9_STATUS 0x0520
438 #define KSZ8463_TS9_CFG 0x0522
439 #define KSZ8463_TS9_SMPL1_NSL 0x0524
440 #define KSZ8463_TS9_SMPL1_NSH 0x0526
441 #define KSZ8463_TS9_SMPL1_SL 0x0528
442 #define KSZ8463_TS9_SMPL1_SH 0x052A
443 #define KSZ8463_TS9_SMPL1_SUB_NS 0x052C
444 #define KSZ8463_TS9_SMPL2_NSL 0x0534
445 #define KSZ8463_TS9_SMPL2_NSH 0x0536
446 #define KSZ8463_TS9_SMP2_SL 0x0538
447 #define KSZ8463_TS9_SMPL2_SH 0x053A
448 #define KSZ8463_TS9_SMPL2_SUB_NS 0x053C
449 #define KSZ8463_TS10_STATUS 0x0540
450 #define KSZ8463_TS10_CFG 0x0542
451 #define KSZ8463_TS10_SMPL1_NSL 0x0544
452 #define KSZ8463_TS10_SMPL1_NSH 0x0546
453 #define KSZ8463_TS10_SMPL1_SL 0x0548
454 #define KSZ8463_TS10_SMPL1_SH 0x054A
455 #define KSZ8463_TS10_SMPL1_SUB_NS 0x054C
456 #define KSZ8463_TS10_SMPL2_NSL 0x0554
457 #define KSZ8463_TS10_SMPL2_NSH 0x0556
458 #define KSZ8463_TS10_SMP2_SL 0x0558
459 #define KSZ8463_TS10_SMPL2_SH 0x055A
460 #define KSZ8463_TS10_SMPL2_SUB_NS 0x055C
461 #define KSZ8463_TS11_STATUS 0x0560
462 #define KSZ8463_TS11_CFG 0x0562
463 #define KSZ8463_TS11_SMPL1_NSL 0x0564
464 #define KSZ8463_TS11_SMPL1_NSH 0x0566
465 #define KSZ8463_TS11_SMPL1_SL 0x0568
466 #define KSZ8463_TS11_SMPL1_SH 0x056A
467 #define KSZ8463_TS11_SMPL1_SUB_NS 0x056C
468 #define KSZ8463_TS11_SMPL2_NSL 0x0574
469 #define KSZ8463_TS11_SMPL2_NSH 0x0576
470 #define KSZ8463_TS11_SMP2_SL 0x0578
471 #define KSZ8463_TS11_SMPL2_SH 0x057A
472 #define KSZ8463_TS11_SMPL2_SUB_NS 0x057C
473 #define KSZ8463_TS12_STATUS 0x0580
474 #define KSZ8463_TS12_CFG 0x0582
475 #define KSZ8463_TS12_SMPL1_NSL 0x0584
476 #define KSZ8463_TS12_SMPL1_NSH 0x0586
477 #define KSZ8463_TS12_SMPL1_SL 0x0588
478 #define KSZ8463_TS12_SMPL1_SH 0x058A
479 #define KSZ8463_TS12_SMPL1_SUB_NS 0x058C
480 #define KSZ8463_TS12_SMPL2_NSL 0x0594
481 #define KSZ8463_TS12_SMPL2_NSH 0x0596
482 #define KSZ8463_TS12_SMP2_SL 0x0598
483 #define KSZ8463_TS12_SMPL2_SH 0x059A
484 #define KSZ8463_TS12_SMPL2_SUB_NS 0x059C
485 #define KSZ8463_TS12_SMPL3_NSL 0x05A4
486 #define KSZ8463_TS12_SMPL3_NSH 0x05A6
487 #define KSZ8463_TS12_SMPL3_SL 0x05A8
488 #define KSZ8463_TS12_SMPL3_SH 0x05AA
489 #define KSZ8463_TS12_SMPL3_SUB_NS 0x05AC
490 #define KSZ8463_TS12_SMPL4_NSL 0x05B4
491 #define KSZ8463_TS12_SMPL4_NSH 0x05B6
492 #define KSZ8463_TS12_SMPL4_SL 0x05B8
493 #define KSZ8463_TS12_SMPL4_SH 0x05BA
494 #define KSZ8463_TS12_SMPL4_SUB_NS 0x05BC
495 #define KSZ8463_TS12_SMPL5_NSL 0x05C4
496 #define KSZ8463_TS12_SMPL5_NSH 0x05C6
497 #define KSZ8463_TS12_SMPL5_SL 0x05C8
498 #define KSZ8463_TS12_SMPL5_SH 0x05CA
499 #define KSZ8463_TS12_SMPL5_SUB_NS 0x05CC
500 #define KSZ8463_TS12_SMPL6_NSL 0x05D4
501 #define KSZ8463_TS12_SMPL6_NSH 0x05D6
502 #define KSZ8463_TS12_SMPL6_SL 0x05D8
503 #define KSZ8463_TS12_SMPL6_SH 0x05DA
504 #define KSZ8463_TS12_SMPL6_SUB_NS 0x05DC
505 #define KSZ8463_TS12_SMPL7_NSL 0x05E4
506 #define KSZ8463_TS12_SMPL7_NSH 0x05E6
507 #define KSZ8463_TS12_SMPL7_SL 0x05E8
508 #define KSZ8463_TS12_SMPL7_SH 0x05EA
509 #define KSZ8463_TS12_SMPL7_SUB_NS 0x05EC
510 #define KSZ8463_TS12_SMPL8_NSL 0x05F4
511 #define KSZ8463_TS12_SMPL8_NSH 0x05F6
512 #define KSZ8463_TS12_SMPL8_SL 0x05F8
513 #define KSZ8463_TS12_SMPL8_SH 0x05FA
514 #define KSZ8463_TS12_SMPL8_SUB_NS 0x05FC
515 #define KSZ8463_PTP_CLK_CTL 0x0600
516 #define KSZ8463_PTP_RTC_NSL 0x0604
517 #define KSZ8463_PTP_RTC_NSH 0x0606
518 #define KSZ8463_PTP_RTC_SL 0x0608
519 #define KSZ8463_PTP_RTC_SH 0x060A
520 #define KSZ8463_PTP_RTC_PHASE 0x060C
521 #define KSZ8463_PTP_SNS_RATE_L 0x0610
522 #define KSZ8463_PTP_SNS_RATE_H 0x0612
523 #define KSZ8463_PTP_TEMP_ADJ_DURA_L 0x0614
524 #define KSZ8463_PTP_TEMP_ADJ_DURA_H 0x0616
525 #define KSZ8463_PTP_MSG_CFG_1 0x0620
526 #define KSZ8463_PTP_MSG_CFG_2 0x0622
527 #define KSZ8463_PTP_DOMAIN_VER 0x0624
528 #define KSZ8463_P1_PTP_RX_LATENCY 0x0640
529 #define KSZ8463_P1_PTP_TX_LATENCY 0x0642
530 #define KSZ8463_P1_PTP_ASYM_COR 0x0644
531 #define KSZ8463_P1_PTP_LINK_DLY 0x0646
532 #define KSZ8463_P1_PTP_XDLY_REQ_TSL 0x0648
533 #define KSZ8463_P1_PTP_XDLY_REQ_TSH 0x064A
534 #define KSZ8463_P1_PTP_SYNC_TSL 0x064C
535 #define KSZ8463_P1_PTP_SYNC_TSH 0x064E
536 #define KSZ8463_P1_PTP_PDLY_RESP_TSL 0x0650
537 #define KSZ8463_P1_PTP_PDLY_RESP_TSH 0x0652
538 #define KSZ8463_P2_PTP_RX_LATENCY 0x0660
539 #define KSZ8463_P2_PTP_TX_LATENCY 0x0662
540 #define KSZ8463_P2_PTP_ASYM_COR 0x0664
541 #define KSZ8463_P2_PTP_LINK_DLY 0x0666
542 #define KSZ8463_P2_PTP_XDLY_REQ_TSL 0x0668
543 #define KSZ8463_P2_PTP_XDLY_REQ_TSH 0x066A
544 #define KSZ8463_P2_PTP_SYNC_TSL 0x066C
545 #define KSZ8463_P2_PTP_SYNC_TSH 0x066E
546 #define KSZ8463_P2_PTP_PDLY_RESP_TSL 0x0670
547 #define KSZ8463_P2_PTP_PDLY_RESP_TSH 0x0672
548 #define KSZ8463_GPIO_MONITOR 0x0680
549 #define KSZ8463_GPIO_OEN 0x0682
550 #define KSZ8463_PTP_TRIG_IS 0x0688
551 #define KSZ8463_PTP_TRIG_IE 0x068A
552 #define KSZ8463_PTP_TS_IS 0x068C
553 #define KSZ8463_PTP_TS_IE 0x068E
554 #define KSZ8463_DSP_CNTRL_6 0x0734
555 #define KSZ8463_ANA_CNTRL_1 0x0748
556 #define KSZ8463_ANA_CNTRL_3 0x074C
557 
558 //KSZ8463 Switch register access macros
559 #define KSZ8463_PnMBCR(port) (0x0040 + ((port) * 0x000C))
560 #define KSZ8463_PnMBSR(port) (0x0042 + ((port) * 0x000C))
561 #define KSZ8463_PHYnILR(port) (0x0044 + ((port) * 0x000C))
562 #define KSZ8463_PHYnIHR(port) (0x0046 + ((port) * 0x000C))
563 #define KSZ8463_PnANAR(port) (0x0048 + ((port) * 0x000C))
564 #define KSZ8463_PnANLPR(port) (0x004A + ((port) * 0x000C))
565 #define KSZ8463_PnPHYCTRL(port) (0x0062 + ((port) * 0x0004))
566 #define KSZ8463_PnCR1(port) (0x0054 + ((port) * 0x0018))
567 #define KSZ8463_PnCR2(port) (0x0056 + ((port) * 0x0018))
568 #define KSZ8463_PnVIDCR(port) (0x0058 + ((port) * 0x0018))
569 #define KSZ8463_PnCR3(port) (0x005A + ((port) * 0x0018))
570 #define KSZ8463_PnIRCR0(port) (0x005C + ((port) * 0x0018))
571 #define KSZ8463_PnIRCR1(port) (0x005E + ((port) * 0x0018))
572 #define KSZ8463_PnERCR0(port) (0x0060 + ((port) * 0x0018))
573 #define KSZ8463_PnERCR1(port) (0x0062 + ((port) * 0x0018))
574 #define KSZ8463_PnSCSLMD(port) (0x0064 + ((port) * 0x0018))
575 #define KSZ8463_PnCR4(port) (0x0066 + ((port) * 0x0018))
576 #define KSZ8463_PnSR(port) (0x0068 + ((port) * 0x0018))
577 #define KSZ8463_PnTXQRCR1(port) (0x00C4 + ((port) * 0x0004))
578 #define KSZ8463_PnTXQRCR2(port) (0x00C6 + ((port) * 0x0004))
579 #define KSZ8463_PnANPT(port) (0x00D0 + ((port) * 0x000C))
580 #define KSZ8463_PnALPRNP(port) (0x00D2 + ((port) * 0x000C))
581 #define KSZ8463_PnEEEA(port) (0x00D4 + ((port) * 0x000C))
582 #define KSZ8463_PnEEEWEC(port) (0x00D6 + ((port) * 0x000C))
583 #define KSZ8463_PnEEECS(port) (0x00D8 + ((port) * 0x000C))
584 #define KSZ8463_PnLPIRTC(port) (0x00DA + ((port) * 0x000C))
585 #define KSZ8463_Pn_PTP_RX_LATENCY(port) (0x0620 + ((port) * 0x0020))
586 #define KSZ8463_Pn_PTP_TX_LATENCY(port) (0x0622 + ((port) * 0x0020))
587 #define KSZ8463_Pn_PTP_ASYM_COR(port) (0x0624 + ((port) * 0x0020))
588 #define KSZ8463_Pn_PTP_LINK_DLY(port) (0x0626 + ((port) * 0x0020))
589 #define KSZ8463_Pn_PTP_XDLY_REQ_TSL(port) (0x0628 + ((port) * 0x0020))
590 #define KSZ8463_Pn_PTP_XDLY_REQ_TSH(port) (0x062A + ((port) * 0x0020))
591 #define KSZ8463_Pn_PTP_SYNC_TSL(port) (0x062C + ((port) * 0x0020))
592 #define KSZ8463_Pn_PTP_SYNC_TSH(port) (0x062E + ((port) * 0x0020))
593 #define KSZ8463_Pn_PTP_PDLY_RESP_TSL(port) (0x0630 + ((port) * 0x0020))
594 #define KSZ8463_Pn_PTP_PDLY_RESP_TSH(port) (0x0632 + ((port) * 0x0020))
595 
596 //Basic Control register
597 #define KSZ8463_BMCR_LOOPBACK 0x4000
598 #define KSZ8463_BMCR_FORCE_100 0x2000
599 #define KSZ8463_BMCR_AN_EN 0x1000
600 #define KSZ8463_BMCR_POWER_DOWN 0x0800
601 #define KSZ8463_BMCR_ISOLATE 0x0400
602 #define KSZ8463_BMCR_RESTART_AN 0x0200
603 #define KSZ8463_BMCR_FORCE_FULL_DUPLEX 0x0100
604 #define KSZ8463_BMCR_COL_TEST 0x0080
605 #define KSZ8463_BMCR_HP_MDIX 0x0020
606 #define KSZ8463_BMCR_FORCE_MDI 0x0010
607 #define KSZ8463_BMCR_AUTO_MDIX_DIS 0x0008
608 #define KSZ8463_BMCR_FAR_END_FAULT_DIS 0x0004
609 #define KSZ8463_BMCR_TRANSMIT_DIS 0x0002
610 #define KSZ8463_BMCR_LED_DIS 0x0001
611 
612 //Basic Status register
613 #define KSZ8463_BMSR_100BT4 0x8000
614 #define KSZ8463_BMSR_100BTX_FD 0x4000
615 #define KSZ8463_BMSR_100BTX_HD 0x2000
616 #define KSZ8463_BMSR_10BT_FD 0x1000
617 #define KSZ8463_BMSR_10BT_HD 0x0800
618 #define KSZ8463_BMSR_PREAMBLE_SUPPR 0x0040
619 #define KSZ8463_BMSR_AN_COMPLETE 0x0020
620 #define KSZ8463_BMSR_FAR_END_FAULT 0x0010
621 #define KSZ8463_BMSR_AN_CAPABLE 0x0008
622 #define KSZ8463_BMSR_LINK_STATUS 0x0004
623 #define KSZ8463_BMSR_JABBER_TEST 0x0002
624 #define KSZ8463_BMSR_EXTENDED_CAPABLE 0x0001
625 
626 //PHYID High register
627 #define KSZ8463_PHYID1_DEFAULT 0x0022
628 
629 //PHYID Low register
630 #define KSZ8463_PHYID2_DEFAULT 0x1430
631 
632 //Auto-Negotiation Advertisement Ability register
633 #define KSZ8463_ANAR_NEXT_PAGE 0x8000
634 #define KSZ8463_ANAR_REMOTE_FAULT 0x2000
635 #define KSZ8463_ANAR_PAUSE 0x0400
636 #define KSZ8463_ANAR_100BTX_FD 0x0100
637 #define KSZ8463_ANAR_100BTX_HD 0x0080
638 #define KSZ8463_ANAR_10BT_FD 0x0040
639 #define KSZ8463_ANAR_10BT_HD 0x0020
640 #define KSZ8463_ANAR_SELECTOR 0x001F
641 #define KSZ8463_ANAR_SELECTOR_DEFAULT 0x0001
642 
643 //Auto-Negotiation Link Partner Ability register
644 #define KSZ8463_ANLPAR_NEXT_PAGE 0x8000
645 #define KSZ8463_ANLPAR_LP_ACK 0x4000
646 #define KSZ8463_ANLPAR_REMOTE_FAULT 0x2000
647 #define KSZ8463_ANLPAR_PAUSE 0x0400
648 #define KSZ8463_ANLPAR_100BTX_FD 0x0100
649 #define KSZ8463_ANLPAR_100BTX_HD 0x0080
650 #define KSZ8463_ANLPAR_10BT_FD 0x0040
651 #define KSZ8463_ANLPAR_10BT_HD 0x0020
652 
653 //LinkMD Control/Status register
654 #define KSZ8463_LINKMD_TEST_EN 0x8000
655 #define KSZ8463_LINKMD_RESULT 0x6000
656 #define KSZ8463_LINKMD_SHORT 0x1000
657 #define KSZ8463_LINKMD_FAULT_COUNT 0x01FF
658 
659 //PHY Special Control/Status register
660 #define KSZ8463_PHYSCS_POL_REVERSE 0x0020
661 #define KSZ8463_PHYSCS_MDIX_STATUS 0x0010
662 #define KSZ8463_PHYSCS_FORCE_LINK 0x0008
663 #define KSZ8463_PHYSCS_EEE_EN 0x0004
664 #define KSZ8463_PHYSCS_REMOTE_LOOPBACK 0x0002
665 
666 //Chip ID And Enable register
667 #define KSZ8463_CIDER_FAMILY_ID 0xFF00
668 #define KSZ8463_CIDER_FAMILY_ID_DEFAULT 0x8400
669 #define KSZ8463_CIDER_CHIP_ID 0x00F0
670 #define KSZ8463_CIDER_CHIP_ID_ML_FML 0x0040
671 #define KSZ8463_CIDER_CHIP_ID_RL_FRL 0x0050
672 #define KSZ8463_CIDER_REVISION_ID 0x000E
673 #define KSZ8463_CIDER_START_SWITCH 0x0001
674 
675 //Switch Global Control 1 register
676 #define KSZ8463_SGCR1_PASS_ALL_FRAMES 0x8000
677 #define KSZ8463_SGCR1_RX_2K_PKT_LEN_EN 0x4000
678 #define KSZ8463_SGCR1_TX_FLOW_CTRL_EN 0x2000
679 #define KSZ8463_SGCR1_RX_FLOW_CTRL_EN 0x1000
680 #define KSZ8463_SGCR1_FRAME_LEN_CHECK_EN 0x0800
681 #define KSZ8463_SGCR1_AGING_EN 0x0400
682 #define KSZ8463_SGCR1_FAST_AGE_EN 0x0200
683 #define KSZ8463_SGCR1_AGGRESSIVE_BACK_OFF_EN 0x0100
684 #define KSZ8463_SGCR1_IG_LIMIT_FLOW_CTRL_EN 0x0020
685 #define KSZ8463_SGCR1_RX_2K_PKT_EN 0x0010
686 #define KSZ8463_SGCR1_PASS_FLOW_CTRL_PKT 0x0008
687 #define KSZ8463_SGCR1_LINK_CHANGE_AGE 0x0001
688 
689 //Switch Global Control 2 register
690 #define KSZ8463_SGCR2_VLAN_EN 0x8000
691 #define KSZ8463_SGCR2_IGMP_SNOOP_EN 0x4000
692 #define KSZ8463_SGCR2_IPV6_MLD_SNOOP_EN 0x2000
693 #define KSZ8463_SGCR2_IPV6_MLD_SNOOP_OPT_SEL 0x1000
694 #define KSZ8463_SGCR2_SNIFF_MODE_SEL 0x0100
695 #define KSZ8463_SGCR2_UNI_VLAN_MISMATCH_DISCARD 0x0080
696 #define KSZ8463_SGCR2_MCAST_STORM_PROTECT_DIS 0x0040
697 #define KSZ8463_SGCR2_BACK_PRESSURE_MODE 0x0020
698 #define KSZ8463_SGCR2_FLOW_CTRL_FAIR_MODE 0x0010
699 #define KSZ8463_SGCR2_NO_EXCESSIVE_COL_DROP 0x0008
700 #define KSZ8463_SGCR2_HUGE_PKT_SUPPORT 0x0004
701 #define KSZ8463_SGCR2_MAX_PKT_SIZE_CHECK_EN 0x0002
702 #define KSZ8463_SGCR2_PRIO_BUFFER_RESERVE 0x0001
703 
704 //Switch Global Control 3 register
705 #define KSZ8463_SGCR3_BCAST_STORM_PROTECT_RATE_LSB 0xFF00
706 #define KSZ8463_SGCR3_SW_HOST_PORT_HALF_DUPLEX_MODE 0x0040
707 #define KSZ8463_SGCR3_SW_HOST_PORT_FLOW_CTRL_EN 0x0020
708 #define KSZ8463_SGCR3_SW_MII_10BT 0x0010
709 #define KSZ8463_SGCR3_NULL_VID_REPLACEMENT 0x0008
710 #define KSZ8463_SGCR3_BCAST_STORM_PROTECT_RATE_MSB 0x0007
711 
712 //Switch Global Control 6 register
713 #define KSZ8463_SGCR6_TAG7 0xC000
714 #define KSZ8463_SGCR6_TAG6 0x3000
715 #define KSZ8463_SGCR6_TAG5 0x0C00
716 #define KSZ8463_SGCR6_TAG4 0x0300
717 #define KSZ8463_SGCR6_TAG3 0x00C0
718 #define KSZ8463_SGCR6_TAG2 0x0030
719 #define KSZ8463_SGCR6_TAG1 0x000C
720 #define KSZ8463_SGCR6_TAG0 0x0003
721 
722 //Switch Global Control 7 register
723 #define KSZ8463_SGCR7_PORT_LED_MODE 0x0300
724 #define KSZ8463_SGCR7_PORT_LED_MODE_LED1_SPD_LED2_LINK_ACT 0x0000
725 #define KSZ8463_SGCR7_PORT_LED_MODE_LED1_ACT_LED2_LINK 0x0100
726 #define KSZ8463_SGCR7_PORT_LED_MODE_LED1_FD_LED2_LINK_ACT 0x0200
727 #define KSZ8463_SGCR7_PORT_LED_MODE_LED1_FD_LED2_LINK 0x0300
728 #define KSZ8463_SGCR7_UNKNOWN_DEFAULT_PORT_EN 0x0080
729 #define KSZ8463_SGCR7_DRIVER_STRENGTH_SEL 0x0060
730 #define KSZ8463_SGCR7_DRIVER_STRENGTH_SEL_4MA 0x0000
731 #define KSZ8463_SGCR7_DRIVER_STRENGTH_SEL_8MA 0x0020
732 #define KSZ8463_SGCR7_DRIVER_STRENGTH_SEL_12MA 0x0040
733 #define KSZ8463_SGCR7_DRIVER_STRENGTH_SEL_16MA 0x0060
734 #define KSZ8463_SGCR7_UNKNOWN_PKT_DEFAULT_PORT 0x0007
735 #define KSZ8463_SGCR7_UNKNOWN_PKT_DEFAULT_PORT_PORT1 0x0001
736 #define KSZ8463_SGCR7_UNKNOWN_PKT_DEFAULT_PORT_PORT2 0x0002
737 #define KSZ8463_SGCR7_UNKNOWN_PKT_DEFAULT_PORT_PORT3 0x0004
738 
739 //Indirect Access Data 1 register
740 #define KSZ8463_IADR1_CPU_READ_STATUS 0x0080
741 #define KSZ8463_IADR1_DATA 0x0007
742 
743 //Indirect Access Control register
744 #define KSZ8463_IACR_WRITE 0x0000
745 #define KSZ8463_IACR_READ 0x1000
746 #define KSZ8463_IACR_TABLE_SEL 0x0C00
747 #define KSZ8463_IACR_TABLE_SEL_STATIC_MAC 0x0000
748 #define KSZ8463_IACR_TABLE_SEL_VLAN 0x0400
749 #define KSZ8463_IACR_TABLE_SEL_DYNAMIC_MAC 0x0800
750 #define KSZ8463_IACR_TABLE_SEL_MIB_COUNTER 0x0C00
751 #define KSZ8463_IACR_ADDR 0x03FF
752 
753 //Power Management Control and Wake-up Event Status register
754 #define KSZ8463_PMCTRL_LINK_UP_DETECT_STATUS 0x0008
755 #define KSZ8463_PMCTRL_ENERGY_DETECT_STATUS 0x0004
756 #define KSZ8463_PMCTRL_PWR_MGMT_MODE 0x0003
757 #define KSZ8463_PMCTRL_PWR_MGMT_MODE_NORMAL 0x0000
758 #define KSZ8463_PMCTRL_PWR_MGMT_MODE_ENERGY_DETECT 0x0001
759 #define KSZ8463_PMCTRL_PWR_MGMT_MODE_SOFT_PWR_DOWN 0x0002
760 
761 //Go Sleep Time register
762 #define KSZ8463_GST_GO_SLEEP_TIME 0x00FF
763 
764 //Clock Tree Power Down Control register
765 #define KSZ8463_CTPDC_PLL_AUTO_PWR_DOWN_EN 0x0010
766 #define KSZ8463_CTPDC_SWITCH_CLK_AUTO_SHUTDOWN_EN 0x0008
767 #define KSZ8463_CTPDC_CPU_CLK_AUTO_SHUTDOWN_EN 0x0004
768 #define KSZ8463_CTPDC_SHUTDOWN_WAIT_PERIOD 0x0003
769 #define KSZ8463_CTPDC_SHUTDOWN_WAIT_PERIOD_5_3S 0x0000
770 #define KSZ8463_CTPDC_SHUTDOWN_WAIT_PERIOD_1_6S 0x0001
771 #define KSZ8463_CTPDC_SHUTDOWN_WAIT_PERIOD_1_0MS 0x0002
772 #define KSZ8463_CTPDC_SHUTDOWN_WAIT_PERIOD_3_2US 0x0003
773 
774 //Port N Control 2 register
775 #define KSZ8463_PnCR2_INGRESS_VLAN_FILT 0x4000
776 #define KSZ8463_PnCR2_DISCARD_NON_PVID_PKT 0x2000
777 #define KSZ8463_PnCR2_FORCE_FLOW_CTRL 0x1000
778 #define KSZ8463_PnCR2_BACK_PRESSURE_EN 0x0800
779 #define KSZ8463_PnCR2_TRANSMIT_EN 0x0400
780 #define KSZ8463_PnCR2_RECEIVE_EN 0x0200
781 #define KSZ8463_PnCR2_LEARNING_DIS 0x0100
782 #define KSZ8463_PnCR2_SNIFFER_PORT 0x0080
783 #define KSZ8463_PnCR2_RECEIVE_SNIFF 0x0040
784 #define KSZ8463_PnCR2_TRANSMIT_SNIFF 0x0020
785 #define KSZ8463_PnCR2_USER_PRIO_CEILING 0x0008
786 #define KSZ8463_PnCR2_PORT_VLAN_MEMBERSHIP 0x0007
787 
788 //Port N VID Control register
789 #define KSZ8463_PnVIDCR_PRIORITY 0xE000
790 #define KSZ8463_PnVIDCR_CFI 0x1000
791 #define KSZ8463_PnVIDCR_VID 0x0FFF
792 
793 //Port N Status register
794 #define KSZ8463_PnSR_HP_MDIX 0x8000
795 #define KSZ8463_PnSR_POL_REVERSE 0x2000
796 #define KSZ8463_PnSR_TX_FLOW_CTRL_EN 0x1000
797 #define KSZ8463_PnSR_RX_FLOW_CTRL_EN 0x0800
798 #define KSZ8463_PnSR_OP_SPEED 0x0400
799 #define KSZ8463_PnSR_OP_DUPLEX 0x0200
800 #define KSZ8463_PnSR_FAR_END_FAULT 0x0100
801 #define KSZ8463_PnSR_MDIX_STATUS 0x0080
802 #define KSZ8463_PnSR_AN_DONE 0x0040
803 #define KSZ8463_PnSR_LINK_STATUS 0x0020
804 #define KSZ8463_PnSR_LP_FLOW_CTRL_CAPABLE 0x0010
805 #define KSZ8463_PnSR_LP_100BTX_FD_CAPABLE 0x0008
806 #define KSZ8463_PnSR_LP_100BTX_HF_CAPABLE 0x0004
807 #define KSZ8463_PnSR_LP_10BT_FD_CAPABLE 0x0002
808 #define KSZ8463_PnSR_LP_10BT_HD_CAPABLE 0x0001
809 
810 //Switch Global Control 8 register
811 #define KSZ8463_SGCR8_QUEUE_PRIO_MAPPING 0xC000
812 #define KSZ8463_SGCR8_FLUSH_DYNAMIC_MAC_TABLE 0x0400
813 #define KSZ8463_SGCR8_FLUSH_STATIC_MAC_TABLE 0x0200
814 #define KSZ8463_SGCR8_TAIL_TAG_EN 0x0100
815 #define KSZ8463_SGCR8_PAUSE_OFF_LIMIT_TIME 0x00FF
816 
817 //Global Reset register
818 #define KSZ8463_GRR_MEMORY_BIST_START 0x0008
819 #define KSZ8463_GRR_PTP_SOFT_RESET 0x0004
820 #define KSZ8463_GRR_GLOBAL_SOFT_RESET 0x0001
821 
822 //Interrupt Enable register
823 #define KSZ8463_IER_LC_IE 0x8000
824 #define KSZ8463_IER_PTP_TS_IE 0x1000
825 #define KSZ8463_IER_PTP_TRIG_IE 0x0400
826 #define KSZ8463_IER_LD_IE 0x0008
827 #define KSZ8463_IER_ED_IE 0x0004
828 
829 //Interrupt Status register
830 #define KSZ8463_ISR_LC_IS 0x8000
831 #define KSZ8463_ISR_PTP_TS_IS 0x1000
832 #define KSZ8463_ISR_PTP_TRIG_IS 0x0400
833 #define KSZ8463_ISR_LD_IS 0x0008
834 #define KSZ8463_ISR_ED_IS 0x0004
835 
836 //Trigger Output Unit Error register
837 #define KSZ8463_TRIG_ERR_UNIT12 0x0800
838 #define KSZ8463_TRIG_ERR_UNIT11 0x0400
839 #define KSZ8463_TRIG_ERR_UNIT10 0x0200
840 #define KSZ8463_TRIG_ERR_UNIT9 0x0100
841 #define KSZ8463_TRIG_ERR_UNIT8 0x0080
842 #define KSZ8463_TRIG_ERR_UNIT7 0x0040
843 #define KSZ8463_TRIG_ERR_UNIT6 0x0020
844 #define KSZ8463_TRIG_ERR_UNIT5 0x0010
845 #define KSZ8463_TRIG_ERR_UNIT4 0x0008
846 #define KSZ8463_TRIG_ERR_UNIT3 0x0004
847 #define KSZ8463_TRIG_ERR_UNIT2 0x0002
848 #define KSZ8463_TRIG_ERR_UNIT1 0x0001
849 
850 //Trigger Output Unit Active register
851 #define KSZ8463_TRIG_ACTIVE_UNIT12 0x0800
852 #define KSZ8463_TRIG_ACTIVE_UNIT11 0x0400
853 #define KSZ8463_TRIG_ACTIVE_UNIT10 0x0200
854 #define KSZ8463_TRIG_ACTIVE_UNIT9 0x0100
855 #define KSZ8463_TRIG_ACTIVE_UNIT8 0x0080
856 #define KSZ8463_TRIG_ACTIVE_UNIT7 0x0040
857 #define KSZ8463_TRIG_ACTIVE_UNIT6 0x0020
858 #define KSZ8463_TRIG_ACTIVE_UNIT5 0x0010
859 #define KSZ8463_TRIG_ACTIVE_UNIT4 0x0008
860 #define KSZ8463_TRIG_ACTIVE_UNIT3 0x0004
861 #define KSZ8463_TRIG_ACTIVE_UNIT2 0x0002
862 #define KSZ8463_TRIG_ACTIVE_UNIT1 0x0001
863 
864 //Trigger Output Unit Done register
865 #define KSZ8463_TRIG_DONE_UNIT12 0x0800
866 #define KSZ8463_TRIG_DONE_UNIT11 0x0400
867 #define KSZ8463_TRIG_DONE_UNIT10 0x0200
868 #define KSZ8463_TRIG_DONE_UNIT9 0x0100
869 #define KSZ8463_TRIG_DONE_UNIT8 0x0080
870 #define KSZ8463_TRIG_DONE_UNIT7 0x0040
871 #define KSZ8463_TRIG_DONE_UNIT6 0x0020
872 #define KSZ8463_TRIG_DONE_UNIT5 0x0010
873 #define KSZ8463_TRIG_DONE_UNIT4 0x0008
874 #define KSZ8463_TRIG_DONE_UNIT3 0x0004
875 #define KSZ8463_TRIG_DONE_UNIT2 0x0002
876 #define KSZ8463_TRIG_DONE_UNIT1 0x0001
877 
878 //Trigger Output Unit Enable register
879 #define KSZ8463_TRIG_EN_UNIT12 0x0800
880 #define KSZ8463_TRIG_EN_UNIT11 0x0400
881 #define KSZ8463_TRIG_EN_UNIT10 0x0200
882 #define KSZ8463_TRIG_EN_UNIT9 0x0100
883 #define KSZ8463_TRIG_EN_UNIT8 0x0080
884 #define KSZ8463_TRIG_EN_UNIT7 0x0040
885 #define KSZ8463_TRIG_EN_UNIT6 0x0020
886 #define KSZ8463_TRIG_EN_UNIT5 0x0010
887 #define KSZ8463_TRIG_EN_UNIT4 0x0008
888 #define KSZ8463_TRIG_EN_UNIT3 0x0004
889 #define KSZ8463_TRIG_EN_UNIT2 0x0002
890 #define KSZ8463_TRIG_EN_UNIT1 0x0001
891 
892 //Trigger Output Unit Software Reset register
893 #define KSZ8463_TRIG_SW_RST_UNIT12 0x0800
894 #define KSZ8463_TRIG_SW_RST_UNIT11 0x0400
895 #define KSZ8463_TRIG_SW_RST_UNIT10 0x0200
896 #define KSZ8463_TRIG_SW_RST_UNIT9 0x0100
897 #define KSZ8463_TRIG_SW_RST_UNIT8 0x0080
898 #define KSZ8463_TRIG_SW_RST_UNIT7 0x0040
899 #define KSZ8463_TRIG_SW_RST_UNIT6 0x0020
900 #define KSZ8463_TRIG_SW_RST_UNIT5 0x0010
901 #define KSZ8463_TRIG_SW_RST_UNIT4 0x0008
902 #define KSZ8463_TRIG_SW_RST_UNIT3 0x0004
903 #define KSZ8463_TRIG_SW_RST_UNIT2 0x0002
904 #define KSZ8463_TRIG_SW_RST_UNIT1 0x0001
905 
906 //Trigger Output Unit 12 PPS Pulse Width register
907 #define KSZ8463_TRIG12_PPS_WIDTH_PATH_DELAY_TRIG1 0x0700
908 #define KSZ8463_TRIG12_PPS_WIDTH_PPS_PULSE_WIDTH_MSB_TRIG12 0x00FF
909 
910 //Trigger Output Unit 1 Configuration/Control 1 register
911 #define KSZ8463_TRIG1_CFG_1_CASCADE_MODE 0x8000
912 #define KSZ8463_TRIG1_CFG_1_TAIL_UNIT 0x4000
913 #define KSZ8463_TRIG1_CFG_1_UPSTREAM_TRIG_UNIT 0x3C00
914 #define KSZ8463_TRIG1_CFG_1_UPSTREAM_TRIG_UNIT_UNIT1 0x0000
915 #define KSZ8463_TRIG1_CFG_1_UPSTREAM_TRIG_UNIT_UNIT2 0x0400
916 #define KSZ8463_TRIG1_CFG_1_UPSTREAM_TRIG_UNIT_UNIT3 0x0800
917 #define KSZ8463_TRIG1_CFG_1_UPSTREAM_TRIG_UNIT_UNIT4 0x0C00
918 #define KSZ8463_TRIG1_CFG_1_UPSTREAM_TRIG_UNIT_UNIT5 0x1000
919 #define KSZ8463_TRIG1_CFG_1_UPSTREAM_TRIG_UNIT_UNIT6 0x1400
920 #define KSZ8463_TRIG1_CFG_1_UPSTREAM_TRIG_UNIT_UNIT7 0x1800
921 #define KSZ8463_TRIG1_CFG_1_UPSTREAM_TRIG_UNIT_UNIT8 0x1C00
922 #define KSZ8463_TRIG1_CFG_1_UPSTREAM_TRIG_UNIT_UNIT9 0x2000
923 #define KSZ8463_TRIG1_CFG_1_UPSTREAM_TRIG_UNIT_UNIT10 0x2400
924 #define KSZ8463_TRIG1_CFG_1_UPSTREAM_TRIG_UNIT_UNIT11 0x2800
925 #define KSZ8463_TRIG1_CFG_1_UPSTREAM_TRIG_UNIT_UNIT12 0x2C00
926 #define KSZ8463_TRIG1_CFG_1_TRIGGER_NOW 0x0200
927 #define KSZ8463_TRIG1_CFG_1_TRIGGER_NOTIFY 0x0100
928 #define KSZ8463_TRIG1_CFG_1_PATTERN 0x0070
929 #define KSZ8463_TRIG1_CFG_1_PATTERN_TRIG_NEG_EDGE 0x0000
930 #define KSZ8463_TRIG1_CFG_1_PATTERN_TRIG_POS_EDGE 0x0010
931 #define KSZ8463_TRIG1_CFG_1_PATTERN_TRIG_NEG_PULSE 0x0020
932 #define KSZ8463_TRIG1_CFG_1_PATTERN_TRIG_POS_PULSE 0x0030
933 #define KSZ8463_TRIG1_CFG_1_PATTERN_TRIG_NEG_CYCLE 0x0040
934 #define KSZ8463_TRIG1_CFG_1_PATTERN_TRIG_POS_CYCLE 0x0050
935 #define KSZ8463_TRIG1_CFG_1_PATTERN_TRIG_REG_OUTPUT 0x0060
936 #define KSZ8463_TRIG1_CFG_1_GPIO_SEL 0x000F
937 #define KSZ8463_TRIG1_CFG_1_GPIO_SEL_GPIO0 0x0000
938 #define KSZ8463_TRIG1_CFG_1_GPIO_SEL_GPIO1 0x0001
939 #define KSZ8463_TRIG1_CFG_1_GPIO_SEL_GPIO2 0x0002
940 #define KSZ8463_TRIG1_CFG_1_GPIO_SEL_GPIO3 0x0003
941 #define KSZ8463_TRIG1_CFG_1_GPIO_SEL_GPIO4 0x0004
942 #define KSZ8463_TRIG1_CFG_1_GPIO_SEL_GPIO5 0x0005
943 #define KSZ8463_TRIG1_CFG_1_GPIO_SEL_GPIO6 0x0006
944 #define KSZ8463_TRIG1_CFG_1_GPIO_SEL_GPIO7 0x0007
945 #define KSZ8463_TRIG1_CFG_1_GPIO_SEL_GPIO8 0x0008
946 #define KSZ8463_TRIG1_CFG_1_GPIO_SEL_GPIO9 0x0009
947 #define KSZ8463_TRIG1_CFG_1_GPIO_SEL_GPIO10 0x000A
948 #define KSZ8463_TRIG1_CFG_1_GPIO_SEL_GPIO11 0x000B
949 
950 //Trigger Output Unit 2 Configuration/Control 1 register
951 #define KSZ8463_TRIG2_CFG_1_CASCADE_MODE 0x8000
952 #define KSZ8463_TRIG2_CFG_1_TAIL_UNIT 0x4000
953 #define KSZ8463_TRIG2_CFG_1_UPSTREAM_TRIG_UNIT 0x3C00
954 #define KSZ8463_TRIG2_CFG_1_UPSTREAM_TRIG_UNIT_UNIT1 0x0000
955 #define KSZ8463_TRIG2_CFG_1_UPSTREAM_TRIG_UNIT_UNIT2 0x0400
956 #define KSZ8463_TRIG2_CFG_1_UPSTREAM_TRIG_UNIT_UNIT3 0x0800
957 #define KSZ8463_TRIG2_CFG_1_UPSTREAM_TRIG_UNIT_UNIT4 0x0C00
958 #define KSZ8463_TRIG2_CFG_1_UPSTREAM_TRIG_UNIT_UNIT5 0x1000
959 #define KSZ8463_TRIG2_CFG_1_UPSTREAM_TRIG_UNIT_UNIT6 0x1400
960 #define KSZ8463_TRIG2_CFG_1_UPSTREAM_TRIG_UNIT_UNIT7 0x1800
961 #define KSZ8463_TRIG2_CFG_1_UPSTREAM_TRIG_UNIT_UNIT8 0x1C00
962 #define KSZ8463_TRIG2_CFG_1_UPSTREAM_TRIG_UNIT_UNIT9 0x2000
963 #define KSZ8463_TRIG2_CFG_1_UPSTREAM_TRIG_UNIT_UNIT10 0x2400
964 #define KSZ8463_TRIG2_CFG_1_UPSTREAM_TRIG_UNIT_UNIT11 0x2800
965 #define KSZ8463_TRIG2_CFG_1_UPSTREAM_TRIG_UNIT_UNIT12 0x2C00
966 #define KSZ8463_TRIG2_CFG_1_TRIGGER_NOW 0x0200
967 #define KSZ8463_TRIG2_CFG_1_TRIGGER_NOTIFY 0x0100
968 #define KSZ8463_TRIG2_CFG_1_PATTERN 0x0070
969 #define KSZ8463_TRIG2_CFG_1_PATTERN_TRIG_NEG_EDGE 0x0000
970 #define KSZ8463_TRIG2_CFG_1_PATTERN_TRIG_POS_EDGE 0x0010
971 #define KSZ8463_TRIG2_CFG_1_PATTERN_TRIG_NEG_PULSE 0x0020
972 #define KSZ8463_TRIG2_CFG_1_PATTERN_TRIG_POS_PULSE 0x0030
973 #define KSZ8463_TRIG2_CFG_1_PATTERN_TRIG_NEG_CYCLE 0x0040
974 #define KSZ8463_TRIG2_CFG_1_PATTERN_TRIG_POS_CYCLE 0x0050
975 #define KSZ8463_TRIG2_CFG_1_PATTERN_TRIG_REG_OUTPUT 0x0060
976 #define KSZ8463_TRIG2_CFG_1_GPIO_SEL 0x000F
977 #define KSZ8463_TRIG2_CFG_1_GPIO_SEL_GPIO0 0x0000
978 #define KSZ8463_TRIG2_CFG_1_GPIO_SEL_GPIO1 0x0001
979 #define KSZ8463_TRIG2_CFG_1_GPIO_SEL_GPIO2 0x0002
980 #define KSZ8463_TRIG2_CFG_1_GPIO_SEL_GPIO3 0x0003
981 #define KSZ8463_TRIG2_CFG_1_GPIO_SEL_GPIO4 0x0004
982 #define KSZ8463_TRIG2_CFG_1_GPIO_SEL_GPIO5 0x0005
983 #define KSZ8463_TRIG2_CFG_1_GPIO_SEL_GPIO6 0x0006
984 #define KSZ8463_TRIG2_CFG_1_GPIO_SEL_GPIO7 0x0007
985 #define KSZ8463_TRIG2_CFG_1_GPIO_SEL_GPIO8 0x0008
986 #define KSZ8463_TRIG2_CFG_1_GPIO_SEL_GPIO9 0x0009
987 #define KSZ8463_TRIG2_CFG_1_GPIO_SEL_GPIO10 0x000A
988 #define KSZ8463_TRIG2_CFG_1_GPIO_SEL_GPIO11 0x000B
989 
990 //Trigger Output Unit 3 Configuration/Control 1 register
991 #define KSZ8463_TRIG3_CFG_1_CASCADE_MODE 0x8000
992 #define KSZ8463_TRIG3_CFG_1_TAIL_UNIT 0x4000
993 #define KSZ8463_TRIG3_CFG_1_UPSTREAM_TRIG_UNIT 0x3C00
994 #define KSZ8463_TRIG3_CFG_1_UPSTREAM_TRIG_UNIT_UNIT1 0x0000
995 #define KSZ8463_TRIG3_CFG_1_UPSTREAM_TRIG_UNIT_UNIT2 0x0400
996 #define KSZ8463_TRIG3_CFG_1_UPSTREAM_TRIG_UNIT_UNIT3 0x0800
997 #define KSZ8463_TRIG3_CFG_1_UPSTREAM_TRIG_UNIT_UNIT4 0x0C00
998 #define KSZ8463_TRIG3_CFG_1_UPSTREAM_TRIG_UNIT_UNIT5 0x1000
999 #define KSZ8463_TRIG3_CFG_1_UPSTREAM_TRIG_UNIT_UNIT6 0x1400
1000 #define KSZ8463_TRIG3_CFG_1_UPSTREAM_TRIG_UNIT_UNIT7 0x1800
1001 #define KSZ8463_TRIG3_CFG_1_UPSTREAM_TRIG_UNIT_UNIT8 0x1C00
1002 #define KSZ8463_TRIG3_CFG_1_UPSTREAM_TRIG_UNIT_UNIT9 0x2000
1003 #define KSZ8463_TRIG3_CFG_1_UPSTREAM_TRIG_UNIT_UNIT10 0x2400
1004 #define KSZ8463_TRIG3_CFG_1_UPSTREAM_TRIG_UNIT_UNIT11 0x2800
1005 #define KSZ8463_TRIG3_CFG_1_UPSTREAM_TRIG_UNIT_UNIT12 0x2C00
1006 #define KSZ8463_TRIG3_CFG_1_TRIGGER_NOW 0x0200
1007 #define KSZ8463_TRIG3_CFG_1_TRIGGER_NOTIFY 0x0100
1008 #define KSZ8463_TRIG3_CFG_1_PATTERN 0x0070
1009 #define KSZ8463_TRIG3_CFG_1_PATTERN_TRIG_NEG_EDGE 0x0000
1010 #define KSZ8463_TRIG3_CFG_1_PATTERN_TRIG_POS_EDGE 0x0010
1011 #define KSZ8463_TRIG3_CFG_1_PATTERN_TRIG_NEG_PULSE 0x0020
1012 #define KSZ8463_TRIG3_CFG_1_PATTERN_TRIG_POS_PULSE 0x0030
1013 #define KSZ8463_TRIG3_CFG_1_PATTERN_TRIG_NEG_CYCLE 0x0040
1014 #define KSZ8463_TRIG3_CFG_1_PATTERN_TRIG_POS_CYCLE 0x0050
1015 #define KSZ8463_TRIG3_CFG_1_PATTERN_TRIG_REG_OUTPUT 0x0060
1016 #define KSZ8463_TRIG3_CFG_1_GPIO_SEL 0x000F
1017 #define KSZ8463_TRIG3_CFG_1_GPIO_SEL_GPIO0 0x0000
1018 #define KSZ8463_TRIG3_CFG_1_GPIO_SEL_GPIO1 0x0001
1019 #define KSZ8463_TRIG3_CFG_1_GPIO_SEL_GPIO2 0x0002
1020 #define KSZ8463_TRIG3_CFG_1_GPIO_SEL_GPIO3 0x0003
1021 #define KSZ8463_TRIG3_CFG_1_GPIO_SEL_GPIO4 0x0004
1022 #define KSZ8463_TRIG3_CFG_1_GPIO_SEL_GPIO5 0x0005
1023 #define KSZ8463_TRIG3_CFG_1_GPIO_SEL_GPIO6 0x0006
1024 #define KSZ8463_TRIG3_CFG_1_GPIO_SEL_GPIO7 0x0007
1025 #define KSZ8463_TRIG3_CFG_1_GPIO_SEL_GPIO8 0x0008
1026 #define KSZ8463_TRIG3_CFG_1_GPIO_SEL_GPIO9 0x0009
1027 #define KSZ8463_TRIG3_CFG_1_GPIO_SEL_GPIO10 0x000A
1028 #define KSZ8463_TRIG3_CFG_1_GPIO_SEL_GPIO11 0x000B
1029 
1030 //Trigger Output Unit 4 Configuration/Control 1 register
1031 #define KSZ8463_TRIG4_CFG_1_CASCADE_MODE 0x8000
1032 #define KSZ8463_TRIG4_CFG_1_TAIL_UNIT 0x4000
1033 #define KSZ8463_TRIG4_CFG_1_UPSTREAM_TRIG_UNIT 0x3C00
1034 #define KSZ8463_TRIG4_CFG_1_UPSTREAM_TRIG_UNIT_UNIT1 0x0000
1035 #define KSZ8463_TRIG4_CFG_1_UPSTREAM_TRIG_UNIT_UNIT2 0x0400
1036 #define KSZ8463_TRIG4_CFG_1_UPSTREAM_TRIG_UNIT_UNIT3 0x0800
1037 #define KSZ8463_TRIG4_CFG_1_UPSTREAM_TRIG_UNIT_UNIT4 0x0C00
1038 #define KSZ8463_TRIG4_CFG_1_UPSTREAM_TRIG_UNIT_UNIT5 0x1000
1039 #define KSZ8463_TRIG4_CFG_1_UPSTREAM_TRIG_UNIT_UNIT6 0x1400
1040 #define KSZ8463_TRIG4_CFG_1_UPSTREAM_TRIG_UNIT_UNIT7 0x1800
1041 #define KSZ8463_TRIG4_CFG_1_UPSTREAM_TRIG_UNIT_UNIT8 0x1C00
1042 #define KSZ8463_TRIG4_CFG_1_UPSTREAM_TRIG_UNIT_UNIT9 0x2000
1043 #define KSZ8463_TRIG4_CFG_1_UPSTREAM_TRIG_UNIT_UNIT10 0x2400
1044 #define KSZ8463_TRIG4_CFG_1_UPSTREAM_TRIG_UNIT_UNIT11 0x2800
1045 #define KSZ8463_TRIG4_CFG_1_UPSTREAM_TRIG_UNIT_UNIT12 0x2C00
1046 #define KSZ8463_TRIG4_CFG_1_TRIGGER_NOW 0x0200
1047 #define KSZ8463_TRIG4_CFG_1_TRIGGER_NOTIFY 0x0100
1048 #define KSZ8463_TRIG4_CFG_1_PATTERN 0x0070
1049 #define KSZ8463_TRIG4_CFG_1_PATTERN_TRIG_NEG_EDGE 0x0000
1050 #define KSZ8463_TRIG4_CFG_1_PATTERN_TRIG_POS_EDGE 0x0010
1051 #define KSZ8463_TRIG4_CFG_1_PATTERN_TRIG_NEG_PULSE 0x0020
1052 #define KSZ8463_TRIG4_CFG_1_PATTERN_TRIG_POS_PULSE 0x0030
1053 #define KSZ8463_TRIG4_CFG_1_PATTERN_TRIG_NEG_CYCLE 0x0040
1054 #define KSZ8463_TRIG4_CFG_1_PATTERN_TRIG_POS_CYCLE 0x0050
1055 #define KSZ8463_TRIG4_CFG_1_PATTERN_TRIG_REG_OUTPUT 0x0060
1056 #define KSZ8463_TRIG4_CFG_1_GPIO_SEL 0x000F
1057 #define KSZ8463_TRIG4_CFG_1_GPIO_SEL_GPIO0 0x0000
1058 #define KSZ8463_TRIG4_CFG_1_GPIO_SEL_GPIO1 0x0001
1059 #define KSZ8463_TRIG4_CFG_1_GPIO_SEL_GPIO2 0x0002
1060 #define KSZ8463_TRIG4_CFG_1_GPIO_SEL_GPIO3 0x0003
1061 #define KSZ8463_TRIG4_CFG_1_GPIO_SEL_GPIO4 0x0004
1062 #define KSZ8463_TRIG4_CFG_1_GPIO_SEL_GPIO5 0x0005
1063 #define KSZ8463_TRIG4_CFG_1_GPIO_SEL_GPIO6 0x0006
1064 #define KSZ8463_TRIG4_CFG_1_GPIO_SEL_GPIO7 0x0007
1065 #define KSZ8463_TRIG4_CFG_1_GPIO_SEL_GPIO8 0x0008
1066 #define KSZ8463_TRIG4_CFG_1_GPIO_SEL_GPIO9 0x0009
1067 #define KSZ8463_TRIG4_CFG_1_GPIO_SEL_GPIO10 0x000A
1068 #define KSZ8463_TRIG4_CFG_1_GPIO_SEL_GPIO11 0x000B
1069 
1070 //Trigger Output Unit 5 Configuration/Control 1 register
1071 #define KSZ8463_TRIG5_CFG_1_CASCADE_MODE 0x8000
1072 #define KSZ8463_TRIG5_CFG_1_TAIL_UNIT 0x4000
1073 #define KSZ8463_TRIG5_CFG_1_UPSTREAM_TRIG_UNIT 0x3C00
1074 #define KSZ8463_TRIG5_CFG_1_UPSTREAM_TRIG_UNIT_UNIT1 0x0000
1075 #define KSZ8463_TRIG5_CFG_1_UPSTREAM_TRIG_UNIT_UNIT2 0x0400
1076 #define KSZ8463_TRIG5_CFG_1_UPSTREAM_TRIG_UNIT_UNIT3 0x0800
1077 #define KSZ8463_TRIG5_CFG_1_UPSTREAM_TRIG_UNIT_UNIT4 0x0C00
1078 #define KSZ8463_TRIG5_CFG_1_UPSTREAM_TRIG_UNIT_UNIT5 0x1000
1079 #define KSZ8463_TRIG5_CFG_1_UPSTREAM_TRIG_UNIT_UNIT6 0x1400
1080 #define KSZ8463_TRIG5_CFG_1_UPSTREAM_TRIG_UNIT_UNIT7 0x1800
1081 #define KSZ8463_TRIG5_CFG_1_UPSTREAM_TRIG_UNIT_UNIT8 0x1C00
1082 #define KSZ8463_TRIG5_CFG_1_UPSTREAM_TRIG_UNIT_UNIT9 0x2000
1083 #define KSZ8463_TRIG5_CFG_1_UPSTREAM_TRIG_UNIT_UNIT10 0x2400
1084 #define KSZ8463_TRIG5_CFG_1_UPSTREAM_TRIG_UNIT_UNIT11 0x2800
1085 #define KSZ8463_TRIG5_CFG_1_UPSTREAM_TRIG_UNIT_UNIT12 0x2C00
1086 #define KSZ8463_TRIG5_CFG_1_TRIGGER_NOW 0x0200
1087 #define KSZ8463_TRIG5_CFG_1_TRIGGER_NOTIFY 0x0100
1088 #define KSZ8463_TRIG5_CFG_1_PATTERN 0x0070
1089 #define KSZ8463_TRIG5_CFG_1_PATTERN_TRIG_NEG_EDGE 0x0000
1090 #define KSZ8463_TRIG5_CFG_1_PATTERN_TRIG_POS_EDGE 0x0010
1091 #define KSZ8463_TRIG5_CFG_1_PATTERN_TRIG_NEG_PULSE 0x0020
1092 #define KSZ8463_TRIG5_CFG_1_PATTERN_TRIG_POS_PULSE 0x0030
1093 #define KSZ8463_TRIG5_CFG_1_PATTERN_TRIG_NEG_CYCLE 0x0040
1094 #define KSZ8463_TRIG5_CFG_1_PATTERN_TRIG_POS_CYCLE 0x0050
1095 #define KSZ8463_TRIG5_CFG_1_PATTERN_TRIG_REG_OUTPUT 0x0060
1096 #define KSZ8463_TRIG5_CFG_1_GPIO_SEL 0x000F
1097 #define KSZ8463_TRIG5_CFG_1_GPIO_SEL_GPIO0 0x0000
1098 #define KSZ8463_TRIG5_CFG_1_GPIO_SEL_GPIO1 0x0001
1099 #define KSZ8463_TRIG5_CFG_1_GPIO_SEL_GPIO2 0x0002
1100 #define KSZ8463_TRIG5_CFG_1_GPIO_SEL_GPIO3 0x0003
1101 #define KSZ8463_TRIG5_CFG_1_GPIO_SEL_GPIO4 0x0004
1102 #define KSZ8463_TRIG5_CFG_1_GPIO_SEL_GPIO5 0x0005
1103 #define KSZ8463_TRIG5_CFG_1_GPIO_SEL_GPIO6 0x0006
1104 #define KSZ8463_TRIG5_CFG_1_GPIO_SEL_GPIO7 0x0007
1105 #define KSZ8463_TRIG5_CFG_1_GPIO_SEL_GPIO8 0x0008
1106 #define KSZ8463_TRIG5_CFG_1_GPIO_SEL_GPIO9 0x0009
1107 #define KSZ8463_TRIG5_CFG_1_GPIO_SEL_GPIO10 0x000A
1108 #define KSZ8463_TRIG5_CFG_1_GPIO_SEL_GPIO11 0x000B
1109 
1110 //Trigger Output Unit 6 Configuration/Control 1 register
1111 #define KSZ8463_TRIG6_CFG_1_CASCADE_MODE 0x8000
1112 #define KSZ8463_TRIG6_CFG_1_TAIL_UNIT 0x4000
1113 #define KSZ8463_TRIG6_CFG_1_UPSTREAM_TRIG_UNIT 0x3C00
1114 #define KSZ8463_TRIG6_CFG_1_UPSTREAM_TRIG_UNIT_UNIT1 0x0000
1115 #define KSZ8463_TRIG6_CFG_1_UPSTREAM_TRIG_UNIT_UNIT2 0x0400
1116 #define KSZ8463_TRIG6_CFG_1_UPSTREAM_TRIG_UNIT_UNIT3 0x0800
1117 #define KSZ8463_TRIG6_CFG_1_UPSTREAM_TRIG_UNIT_UNIT4 0x0C00
1118 #define KSZ8463_TRIG6_CFG_1_UPSTREAM_TRIG_UNIT_UNIT5 0x1000
1119 #define KSZ8463_TRIG6_CFG_1_UPSTREAM_TRIG_UNIT_UNIT6 0x1400
1120 #define KSZ8463_TRIG6_CFG_1_UPSTREAM_TRIG_UNIT_UNIT7 0x1800
1121 #define KSZ8463_TRIG6_CFG_1_UPSTREAM_TRIG_UNIT_UNIT8 0x1C00
1122 #define KSZ8463_TRIG6_CFG_1_UPSTREAM_TRIG_UNIT_UNIT9 0x2000
1123 #define KSZ8463_TRIG6_CFG_1_UPSTREAM_TRIG_UNIT_UNIT10 0x2400
1124 #define KSZ8463_TRIG6_CFG_1_UPSTREAM_TRIG_UNIT_UNIT11 0x2800
1125 #define KSZ8463_TRIG6_CFG_1_UPSTREAM_TRIG_UNIT_UNIT12 0x2C00
1126 #define KSZ8463_TRIG6_CFG_1_TRIGGER_NOW 0x0200
1127 #define KSZ8463_TRIG6_CFG_1_TRIGGER_NOTIFY 0x0100
1128 #define KSZ8463_TRIG6_CFG_1_PATTERN 0x0070
1129 #define KSZ8463_TRIG6_CFG_1_PATTERN_TRIG_NEG_EDGE 0x0000
1130 #define KSZ8463_TRIG6_CFG_1_PATTERN_TRIG_POS_EDGE 0x0010
1131 #define KSZ8463_TRIG6_CFG_1_PATTERN_TRIG_NEG_PULSE 0x0020
1132 #define KSZ8463_TRIG6_CFG_1_PATTERN_TRIG_POS_PULSE 0x0030
1133 #define KSZ8463_TRIG6_CFG_1_PATTERN_TRIG_NEG_CYCLE 0x0040
1134 #define KSZ8463_TRIG6_CFG_1_PATTERN_TRIG_POS_CYCLE 0x0050
1135 #define KSZ8463_TRIG6_CFG_1_PATTERN_TRIG_REG_OUTPUT 0x0060
1136 #define KSZ8463_TRIG6_CFG_1_GPIO_SEL 0x000F
1137 #define KSZ8463_TRIG6_CFG_1_GPIO_SEL_GPIO0 0x0000
1138 #define KSZ8463_TRIG6_CFG_1_GPIO_SEL_GPIO1 0x0001
1139 #define KSZ8463_TRIG6_CFG_1_GPIO_SEL_GPIO2 0x0002
1140 #define KSZ8463_TRIG6_CFG_1_GPIO_SEL_GPIO3 0x0003
1141 #define KSZ8463_TRIG6_CFG_1_GPIO_SEL_GPIO4 0x0004
1142 #define KSZ8463_TRIG6_CFG_1_GPIO_SEL_GPIO5 0x0005
1143 #define KSZ8463_TRIG6_CFG_1_GPIO_SEL_GPIO6 0x0006
1144 #define KSZ8463_TRIG6_CFG_1_GPIO_SEL_GPIO7 0x0007
1145 #define KSZ8463_TRIG6_CFG_1_GPIO_SEL_GPIO8 0x0008
1146 #define KSZ8463_TRIG6_CFG_1_GPIO_SEL_GPIO9 0x0009
1147 #define KSZ8463_TRIG6_CFG_1_GPIO_SEL_GPIO10 0x000A
1148 #define KSZ8463_TRIG6_CFG_1_GPIO_SEL_GPIO11 0x000B
1149 
1150 //Trigger Output Unit 7 Configuration/Control 1 register
1151 #define KSZ8463_TRIG7_CFG_1_CASCADE_MODE 0x8000
1152 #define KSZ8463_TRIG7_CFG_1_TAIL_UNIT 0x4000
1153 #define KSZ8463_TRIG7_CFG_1_UPSTREAM_TRIG_UNIT 0x3C00
1154 #define KSZ8463_TRIG7_CFG_1_UPSTREAM_TRIG_UNIT_UNIT1 0x0000
1155 #define KSZ8463_TRIG7_CFG_1_UPSTREAM_TRIG_UNIT_UNIT2 0x0400
1156 #define KSZ8463_TRIG7_CFG_1_UPSTREAM_TRIG_UNIT_UNIT3 0x0800
1157 #define KSZ8463_TRIG7_CFG_1_UPSTREAM_TRIG_UNIT_UNIT4 0x0C00
1158 #define KSZ8463_TRIG7_CFG_1_UPSTREAM_TRIG_UNIT_UNIT5 0x1000
1159 #define KSZ8463_TRIG7_CFG_1_UPSTREAM_TRIG_UNIT_UNIT6 0x1400
1160 #define KSZ8463_TRIG7_CFG_1_UPSTREAM_TRIG_UNIT_UNIT7 0x1800
1161 #define KSZ8463_TRIG7_CFG_1_UPSTREAM_TRIG_UNIT_UNIT8 0x1C00
1162 #define KSZ8463_TRIG7_CFG_1_UPSTREAM_TRIG_UNIT_UNIT9 0x2000
1163 #define KSZ8463_TRIG7_CFG_1_UPSTREAM_TRIG_UNIT_UNIT10 0x2400
1164 #define KSZ8463_TRIG7_CFG_1_UPSTREAM_TRIG_UNIT_UNIT11 0x2800
1165 #define KSZ8463_TRIG7_CFG_1_UPSTREAM_TRIG_UNIT_UNIT12 0x2C00
1166 #define KSZ8463_TRIG7_CFG_1_TRIGGER_NOW 0x0200
1167 #define KSZ8463_TRIG7_CFG_1_TRIGGER_NOTIFY 0x0100
1168 #define KSZ8463_TRIG7_CFG_1_PATTERN 0x0070
1169 #define KSZ8463_TRIG7_CFG_1_PATTERN_TRIG_NEG_EDGE 0x0000
1170 #define KSZ8463_TRIG7_CFG_1_PATTERN_TRIG_POS_EDGE 0x0010
1171 #define KSZ8463_TRIG7_CFG_1_PATTERN_TRIG_NEG_PULSE 0x0020
1172 #define KSZ8463_TRIG7_CFG_1_PATTERN_TRIG_POS_PULSE 0x0030
1173 #define KSZ8463_TRIG7_CFG_1_PATTERN_TRIG_NEG_CYCLE 0x0040
1174 #define KSZ8463_TRIG7_CFG_1_PATTERN_TRIG_POS_CYCLE 0x0050
1175 #define KSZ8463_TRIG7_CFG_1_PATTERN_TRIG_REG_OUTPUT 0x0060
1176 #define KSZ8463_TRIG7_CFG_1_GPIO_SEL 0x000F
1177 #define KSZ8463_TRIG7_CFG_1_GPIO_SEL_GPIO0 0x0000
1178 #define KSZ8463_TRIG7_CFG_1_GPIO_SEL_GPIO1 0x0001
1179 #define KSZ8463_TRIG7_CFG_1_GPIO_SEL_GPIO2 0x0002
1180 #define KSZ8463_TRIG7_CFG_1_GPIO_SEL_GPIO3 0x0003
1181 #define KSZ8463_TRIG7_CFG_1_GPIO_SEL_GPIO4 0x0004
1182 #define KSZ8463_TRIG7_CFG_1_GPIO_SEL_GPIO5 0x0005
1183 #define KSZ8463_TRIG7_CFG_1_GPIO_SEL_GPIO6 0x0006
1184 #define KSZ8463_TRIG7_CFG_1_GPIO_SEL_GPIO7 0x0007
1185 #define KSZ8463_TRIG7_CFG_1_GPIO_SEL_GPIO8 0x0008
1186 #define KSZ8463_TRIG7_CFG_1_GPIO_SEL_GPIO9 0x0009
1187 #define KSZ8463_TRIG7_CFG_1_GPIO_SEL_GPIO10 0x000A
1188 #define KSZ8463_TRIG7_CFG_1_GPIO_SEL_GPIO11 0x000B
1189 
1190 //Trigger Output Unit 8 Configuration/Control 1 register
1191 #define KSZ8463_TRIG8_CFG_1_CASCADE_MODE 0x8000
1192 #define KSZ8463_TRIG8_CFG_1_TAIL_UNIT 0x4000
1193 #define KSZ8463_TRIG8_CFG_1_UPSTREAM_TRIG_UNIT 0x3C00
1194 #define KSZ8463_TRIG8_CFG_1_UPSTREAM_TRIG_UNIT_UNIT1 0x0000
1195 #define KSZ8463_TRIG8_CFG_1_UPSTREAM_TRIG_UNIT_UNIT2 0x0400
1196 #define KSZ8463_TRIG8_CFG_1_UPSTREAM_TRIG_UNIT_UNIT3 0x0800
1197 #define KSZ8463_TRIG8_CFG_1_UPSTREAM_TRIG_UNIT_UNIT4 0x0C00
1198 #define KSZ8463_TRIG8_CFG_1_UPSTREAM_TRIG_UNIT_UNIT5 0x1000
1199 #define KSZ8463_TRIG8_CFG_1_UPSTREAM_TRIG_UNIT_UNIT6 0x1400
1200 #define KSZ8463_TRIG8_CFG_1_UPSTREAM_TRIG_UNIT_UNIT7 0x1800
1201 #define KSZ8463_TRIG8_CFG_1_UPSTREAM_TRIG_UNIT_UNIT8 0x1C00
1202 #define KSZ8463_TRIG8_CFG_1_UPSTREAM_TRIG_UNIT_UNIT9 0x2000
1203 #define KSZ8463_TRIG8_CFG_1_UPSTREAM_TRIG_UNIT_UNIT10 0x2400
1204 #define KSZ8463_TRIG8_CFG_1_UPSTREAM_TRIG_UNIT_UNIT11 0x2800
1205 #define KSZ8463_TRIG8_CFG_1_UPSTREAM_TRIG_UNIT_UNIT12 0x2C00
1206 #define KSZ8463_TRIG8_CFG_1_TRIGGER_NOW 0x0200
1207 #define KSZ8463_TRIG8_CFG_1_TRIGGER_NOTIFY 0x0100
1208 #define KSZ8463_TRIG8_CFG_1_PATTERN 0x0070
1209 #define KSZ8463_TRIG8_CFG_1_PATTERN_TRIG_NEG_EDGE 0x0000
1210 #define KSZ8463_TRIG8_CFG_1_PATTERN_TRIG_POS_EDGE 0x0010
1211 #define KSZ8463_TRIG8_CFG_1_PATTERN_TRIG_NEG_PULSE 0x0020
1212 #define KSZ8463_TRIG8_CFG_1_PATTERN_TRIG_POS_PULSE 0x0030
1213 #define KSZ8463_TRIG8_CFG_1_PATTERN_TRIG_NEG_CYCLE 0x0040
1214 #define KSZ8463_TRIG8_CFG_1_PATTERN_TRIG_POS_CYCLE 0x0050
1215 #define KSZ8463_TRIG8_CFG_1_PATTERN_TRIG_REG_OUTPUT 0x0060
1216 #define KSZ8463_TRIG8_CFG_1_GPIO_SEL 0x000F
1217 #define KSZ8463_TRIG8_CFG_1_GPIO_SEL_GPIO0 0x0000
1218 #define KSZ8463_TRIG8_CFG_1_GPIO_SEL_GPIO1 0x0001
1219 #define KSZ8463_TRIG8_CFG_1_GPIO_SEL_GPIO2 0x0002
1220 #define KSZ8463_TRIG8_CFG_1_GPIO_SEL_GPIO3 0x0003
1221 #define KSZ8463_TRIG8_CFG_1_GPIO_SEL_GPIO4 0x0004
1222 #define KSZ8463_TRIG8_CFG_1_GPIO_SEL_GPIO5 0x0005
1223 #define KSZ8463_TRIG8_CFG_1_GPIO_SEL_GPIO6 0x0006
1224 #define KSZ8463_TRIG8_CFG_1_GPIO_SEL_GPIO7 0x0007
1225 #define KSZ8463_TRIG8_CFG_1_GPIO_SEL_GPIO8 0x0008
1226 #define KSZ8463_TRIG8_CFG_1_GPIO_SEL_GPIO9 0x0009
1227 #define KSZ8463_TRIG8_CFG_1_GPIO_SEL_GPIO10 0x000A
1228 #define KSZ8463_TRIG8_CFG_1_GPIO_SEL_GPIO11 0x000B
1229 
1230 //Trigger Output Unit 9 Configuration/Control 1 register
1231 #define KSZ8463_TRIG9_CFG_1_CASCADE_MODE 0x8000
1232 #define KSZ8463_TRIG9_CFG_1_TAIL_UNIT 0x4000
1233 #define KSZ8463_TRIG9_CFG_1_UPSTREAM_TRIG_UNIT 0x3C00
1234 #define KSZ8463_TRIG9_CFG_1_UPSTREAM_TRIG_UNIT_UNIT1 0x0000
1235 #define KSZ8463_TRIG9_CFG_1_UPSTREAM_TRIG_UNIT_UNIT2 0x0400
1236 #define KSZ8463_TRIG9_CFG_1_UPSTREAM_TRIG_UNIT_UNIT3 0x0800
1237 #define KSZ8463_TRIG9_CFG_1_UPSTREAM_TRIG_UNIT_UNIT4 0x0C00
1238 #define KSZ8463_TRIG9_CFG_1_UPSTREAM_TRIG_UNIT_UNIT5 0x1000
1239 #define KSZ8463_TRIG9_CFG_1_UPSTREAM_TRIG_UNIT_UNIT6 0x1400
1240 #define KSZ8463_TRIG9_CFG_1_UPSTREAM_TRIG_UNIT_UNIT7 0x1800
1241 #define KSZ8463_TRIG9_CFG_1_UPSTREAM_TRIG_UNIT_UNIT8 0x1C00
1242 #define KSZ8463_TRIG9_CFG_1_UPSTREAM_TRIG_UNIT_UNIT9 0x2000
1243 #define KSZ8463_TRIG9_CFG_1_UPSTREAM_TRIG_UNIT_UNIT10 0x2400
1244 #define KSZ8463_TRIG9_CFG_1_UPSTREAM_TRIG_UNIT_UNIT11 0x2800
1245 #define KSZ8463_TRIG9_CFG_1_UPSTREAM_TRIG_UNIT_UNIT12 0x2C00
1246 #define KSZ8463_TRIG9_CFG_1_TRIGGER_NOW 0x0200
1247 #define KSZ8463_TRIG9_CFG_1_TRIGGER_NOTIFY 0x0100
1248 #define KSZ8463_TRIG9_CFG_1_PATTERN 0x0070
1249 #define KSZ8463_TRIG9_CFG_1_PATTERN_TRIG_NEG_EDGE 0x0000
1250 #define KSZ8463_TRIG9_CFG_1_PATTERN_TRIG_POS_EDGE 0x0010
1251 #define KSZ8463_TRIG9_CFG_1_PATTERN_TRIG_NEG_PULSE 0x0020
1252 #define KSZ8463_TRIG9_CFG_1_PATTERN_TRIG_POS_PULSE 0x0030
1253 #define KSZ8463_TRIG9_CFG_1_PATTERN_TRIG_NEG_CYCLE 0x0040
1254 #define KSZ8463_TRIG9_CFG_1_PATTERN_TRIG_POS_CYCLE 0x0050
1255 #define KSZ8463_TRIG9_CFG_1_PATTERN_TRIG_REG_OUTPUT 0x0060
1256 #define KSZ8463_TRIG9_CFG_1_GPIO_SEL 0x000F
1257 #define KSZ8463_TRIG9_CFG_1_GPIO_SEL_GPIO0 0x0000
1258 #define KSZ8463_TRIG9_CFG_1_GPIO_SEL_GPIO1 0x0001
1259 #define KSZ8463_TRIG9_CFG_1_GPIO_SEL_GPIO2 0x0002
1260 #define KSZ8463_TRIG9_CFG_1_GPIO_SEL_GPIO3 0x0003
1261 #define KSZ8463_TRIG9_CFG_1_GPIO_SEL_GPIO4 0x0004
1262 #define KSZ8463_TRIG9_CFG_1_GPIO_SEL_GPIO5 0x0005
1263 #define KSZ8463_TRIG9_CFG_1_GPIO_SEL_GPIO6 0x0006
1264 #define KSZ8463_TRIG9_CFG_1_GPIO_SEL_GPIO7 0x0007
1265 #define KSZ8463_TRIG9_CFG_1_GPIO_SEL_GPIO8 0x0008
1266 #define KSZ8463_TRIG9_CFG_1_GPIO_SEL_GPIO9 0x0009
1267 #define KSZ8463_TRIG9_CFG_1_GPIO_SEL_GPIO10 0x000A
1268 #define KSZ8463_TRIG9_CFG_1_GPIO_SEL_GPIO11 0x000B
1269 
1270 //Trigger Output Unit 10 Configuration/Control 1 register
1271 #define KSZ8463_TRIG10_CFG_1_CASCADE_MODE 0x8000
1272 #define KSZ8463_TRIG10_CFG_1_TAIL_UNIT 0x4000
1273 #define KSZ8463_TRIG10_CFG_1_UPSTREAM_TRIG_UNIT 0x3C00
1274 #define KSZ8463_TRIG10_CFG_1_UPSTREAM_TRIG_UNIT_UNIT1 0x0000
1275 #define KSZ8463_TRIG10_CFG_1_UPSTREAM_TRIG_UNIT_UNIT2 0x0400
1276 #define KSZ8463_TRIG10_CFG_1_UPSTREAM_TRIG_UNIT_UNIT3 0x0800
1277 #define KSZ8463_TRIG10_CFG_1_UPSTREAM_TRIG_UNIT_UNIT4 0x0C00
1278 #define KSZ8463_TRIG10_CFG_1_UPSTREAM_TRIG_UNIT_UNIT5 0x1000
1279 #define KSZ8463_TRIG10_CFG_1_UPSTREAM_TRIG_UNIT_UNIT6 0x1400
1280 #define KSZ8463_TRIG10_CFG_1_UPSTREAM_TRIG_UNIT_UNIT7 0x1800
1281 #define KSZ8463_TRIG10_CFG_1_UPSTREAM_TRIG_UNIT_UNIT8 0x1C00
1282 #define KSZ8463_TRIG10_CFG_1_UPSTREAM_TRIG_UNIT_UNIT9 0x2000
1283 #define KSZ8463_TRIG10_CFG_1_UPSTREAM_TRIG_UNIT_UNIT10 0x2400
1284 #define KSZ8463_TRIG10_CFG_1_UPSTREAM_TRIG_UNIT_UNIT11 0x2800
1285 #define KSZ8463_TRIG10_CFG_1_UPSTREAM_TRIG_UNIT_UNIT12 0x2C00
1286 #define KSZ8463_TRIG10_CFG_1_TRIGGER_NOW 0x0200
1287 #define KSZ8463_TRIG10_CFG_1_TRIGGER_NOTIFY 0x0100
1288 #define KSZ8463_TRIG10_CFG_1_PATTERN 0x0070
1289 #define KSZ8463_TRIG10_CFG_1_PATTERN_TRIG_NEG_EDGE 0x0000
1290 #define KSZ8463_TRIG10_CFG_1_PATTERN_TRIG_POS_EDGE 0x0010
1291 #define KSZ8463_TRIG10_CFG_1_PATTERN_TRIG_NEG_PULSE 0x0020
1292 #define KSZ8463_TRIG10_CFG_1_PATTERN_TRIG_POS_PULSE 0x0030
1293 #define KSZ8463_TRIG10_CFG_1_PATTERN_TRIG_NEG_CYCLE 0x0040
1294 #define KSZ8463_TRIG10_CFG_1_PATTERN_TRIG_POS_CYCLE 0x0050
1295 #define KSZ8463_TRIG10_CFG_1_PATTERN_TRIG_REG_OUTPUT 0x0060
1296 #define KSZ8463_TRIG10_CFG_1_GPIO_SEL 0x000F
1297 #define KSZ8463_TRIG10_CFG_1_GPIO_SEL_GPIO0 0x0000
1298 #define KSZ8463_TRIG10_CFG_1_GPIO_SEL_GPIO1 0x0001
1299 #define KSZ8463_TRIG10_CFG_1_GPIO_SEL_GPIO2 0x0002
1300 #define KSZ8463_TRIG10_CFG_1_GPIO_SEL_GPIO3 0x0003
1301 #define KSZ8463_TRIG10_CFG_1_GPIO_SEL_GPIO4 0x0004
1302 #define KSZ8463_TRIG10_CFG_1_GPIO_SEL_GPIO5 0x0005
1303 #define KSZ8463_TRIG10_CFG_1_GPIO_SEL_GPIO6 0x0006
1304 #define KSZ8463_TRIG10_CFG_1_GPIO_SEL_GPIO7 0x0007
1305 #define KSZ8463_TRIG10_CFG_1_GPIO_SEL_GPIO8 0x0008
1306 #define KSZ8463_TRIG10_CFG_1_GPIO_SEL_GPIO9 0x0009
1307 #define KSZ8463_TRIG10_CFG_1_GPIO_SEL_GPIO10 0x000A
1308 #define KSZ8463_TRIG10_CFG_1_GPIO_SEL_GPIO11 0x000B
1309 
1310 //Trigger Output Unit 11 Configuration/Control 1 register
1311 #define KSZ8463_TRIG11_CFG_1_CASCADE_MODE 0x8000
1312 #define KSZ8463_TRIG11_CFG_1_TAIL_UNIT 0x4000
1313 #define KSZ8463_TRIG11_CFG_1_UPSTREAM_TRIG_UNIT 0x3C00
1314 #define KSZ8463_TRIG11_CFG_1_UPSTREAM_TRIG_UNIT_UNIT1 0x0000
1315 #define KSZ8463_TRIG11_CFG_1_UPSTREAM_TRIG_UNIT_UNIT2 0x0400
1316 #define KSZ8463_TRIG11_CFG_1_UPSTREAM_TRIG_UNIT_UNIT3 0x0800
1317 #define KSZ8463_TRIG11_CFG_1_UPSTREAM_TRIG_UNIT_UNIT4 0x0C00
1318 #define KSZ8463_TRIG11_CFG_1_UPSTREAM_TRIG_UNIT_UNIT5 0x1000
1319 #define KSZ8463_TRIG11_CFG_1_UPSTREAM_TRIG_UNIT_UNIT6 0x1400
1320 #define KSZ8463_TRIG11_CFG_1_UPSTREAM_TRIG_UNIT_UNIT7 0x1800
1321 #define KSZ8463_TRIG11_CFG_1_UPSTREAM_TRIG_UNIT_UNIT8 0x1C00
1322 #define KSZ8463_TRIG11_CFG_1_UPSTREAM_TRIG_UNIT_UNIT9 0x2000
1323 #define KSZ8463_TRIG11_CFG_1_UPSTREAM_TRIG_UNIT_UNIT10 0x2400
1324 #define KSZ8463_TRIG11_CFG_1_UPSTREAM_TRIG_UNIT_UNIT11 0x2800
1325 #define KSZ8463_TRIG11_CFG_1_UPSTREAM_TRIG_UNIT_UNIT12 0x2C00
1326 #define KSZ8463_TRIG11_CFG_1_TRIGGER_NOW 0x0200
1327 #define KSZ8463_TRIG11_CFG_1_TRIGGER_NOTIFY 0x0100
1328 #define KSZ8463_TRIG11_CFG_1_PATTERN 0x0070
1329 #define KSZ8463_TRIG11_CFG_1_PATTERN_TRIG_NEG_EDGE 0x0000
1330 #define KSZ8463_TRIG11_CFG_1_PATTERN_TRIG_POS_EDGE 0x0010
1331 #define KSZ8463_TRIG11_CFG_1_PATTERN_TRIG_NEG_PULSE 0x0020
1332 #define KSZ8463_TRIG11_CFG_1_PATTERN_TRIG_POS_PULSE 0x0030
1333 #define KSZ8463_TRIG11_CFG_1_PATTERN_TRIG_NEG_CYCLE 0x0040
1334 #define KSZ8463_TRIG11_CFG_1_PATTERN_TRIG_POS_CYCLE 0x0050
1335 #define KSZ8463_TRIG11_CFG_1_PATTERN_TRIG_REG_OUTPUT 0x0060
1336 #define KSZ8463_TRIG11_CFG_1_GPIO_SEL 0x000F
1337 #define KSZ8463_TRIG11_CFG_1_GPIO_SEL_GPIO0 0x0000
1338 #define KSZ8463_TRIG11_CFG_1_GPIO_SEL_GPIO1 0x0001
1339 #define KSZ8463_TRIG11_CFG_1_GPIO_SEL_GPIO2 0x0002
1340 #define KSZ8463_TRIG11_CFG_1_GPIO_SEL_GPIO3 0x0003
1341 #define KSZ8463_TRIG11_CFG_1_GPIO_SEL_GPIO4 0x0004
1342 #define KSZ8463_TRIG11_CFG_1_GPIO_SEL_GPIO5 0x0005
1343 #define KSZ8463_TRIG11_CFG_1_GPIO_SEL_GPIO6 0x0006
1344 #define KSZ8463_TRIG11_CFG_1_GPIO_SEL_GPIO7 0x0007
1345 #define KSZ8463_TRIG11_CFG_1_GPIO_SEL_GPIO8 0x0008
1346 #define KSZ8463_TRIG11_CFG_1_GPIO_SEL_GPIO9 0x0009
1347 #define KSZ8463_TRIG11_CFG_1_GPIO_SEL_GPIO10 0x000A
1348 #define KSZ8463_TRIG11_CFG_1_GPIO_SEL_GPIO11 0x000B
1349 
1350 //Trigger Output Unit 12 Configuration/Control 1 register
1351 #define KSZ8463_TRIG12_CFG_1_CASCADE_MODE 0x8000
1352 #define KSZ8463_TRIG12_CFG_1_TAIL_UNIT 0x4000
1353 #define KSZ8463_TRIG12_CFG_1_UPSTREAM_TRIG_UNIT 0x3C00
1354 #define KSZ8463_TRIG12_CFG_1_UPSTREAM_TRIG_UNIT_UNIT1 0x0000
1355 #define KSZ8463_TRIG12_CFG_1_UPSTREAM_TRIG_UNIT_UNIT2 0x0400
1356 #define KSZ8463_TRIG12_CFG_1_UPSTREAM_TRIG_UNIT_UNIT3 0x0800
1357 #define KSZ8463_TRIG12_CFG_1_UPSTREAM_TRIG_UNIT_UNIT4 0x0C00
1358 #define KSZ8463_TRIG12_CFG_1_UPSTREAM_TRIG_UNIT_UNIT5 0x1000
1359 #define KSZ8463_TRIG12_CFG_1_UPSTREAM_TRIG_UNIT_UNIT6 0x1400
1360 #define KSZ8463_TRIG12_CFG_1_UPSTREAM_TRIG_UNIT_UNIT7 0x1800
1361 #define KSZ8463_TRIG12_CFG_1_UPSTREAM_TRIG_UNIT_UNIT8 0x1C00
1362 #define KSZ8463_TRIG12_CFG_1_UPSTREAM_TRIG_UNIT_UNIT9 0x2000
1363 #define KSZ8463_TRIG12_CFG_1_UPSTREAM_TRIG_UNIT_UNIT10 0x2400
1364 #define KSZ8463_TRIG12_CFG_1_UPSTREAM_TRIG_UNIT_UNIT11 0x2800
1365 #define KSZ8463_TRIG12_CFG_1_UPSTREAM_TRIG_UNIT_UNIT12 0x2C00
1366 #define KSZ8463_TRIG12_CFG_1_TRIGGER_NOW 0x0200
1367 #define KSZ8463_TRIG12_CFG_1_TRIGGER_NOTIFY 0x0100
1368 #define KSZ8463_TRIG12_CFG_1_PATTERN 0x0070
1369 #define KSZ8463_TRIG12_CFG_1_PATTERN_TRIG_NEG_EDGE 0x0000
1370 #define KSZ8463_TRIG12_CFG_1_PATTERN_TRIG_POS_EDGE 0x0010
1371 #define KSZ8463_TRIG12_CFG_1_PATTERN_TRIG_NEG_PULSE 0x0020
1372 #define KSZ8463_TRIG12_CFG_1_PATTERN_TRIG_POS_PULSE 0x0030
1373 #define KSZ8463_TRIG12_CFG_1_PATTERN_TRIG_NEG_CYCLE 0x0040
1374 #define KSZ8463_TRIG12_CFG_1_PATTERN_TRIG_POS_CYCLE 0x0050
1375 #define KSZ8463_TRIG12_CFG_1_PATTERN_TRIG_REG_OUTPUT 0x0060
1376 #define KSZ8463_TRIG12_CFG_1_GPIO_SEL 0x000F
1377 #define KSZ8463_TRIG12_CFG_1_GPIO_SEL_GPIO0 0x0000
1378 #define KSZ8463_TRIG12_CFG_1_GPIO_SEL_GPIO1 0x0001
1379 #define KSZ8463_TRIG12_CFG_1_GPIO_SEL_GPIO2 0x0002
1380 #define KSZ8463_TRIG12_CFG_1_GPIO_SEL_GPIO3 0x0003
1381 #define KSZ8463_TRIG12_CFG_1_GPIO_SEL_GPIO4 0x0004
1382 #define KSZ8463_TRIG12_CFG_1_GPIO_SEL_GPIO5 0x0005
1383 #define KSZ8463_TRIG12_CFG_1_GPIO_SEL_GPIO6 0x0006
1384 #define KSZ8463_TRIG12_CFG_1_GPIO_SEL_GPIO7 0x0007
1385 #define KSZ8463_TRIG12_CFG_1_GPIO_SEL_GPIO8 0x0008
1386 #define KSZ8463_TRIG12_CFG_1_GPIO_SEL_GPIO9 0x0009
1387 #define KSZ8463_TRIG12_CFG_1_GPIO_SEL_GPIO10 0x000A
1388 #define KSZ8463_TRIG12_CFG_1_GPIO_SEL_GPIO11 0x000B
1389 
1390 //PTP Clock Control register
1391 #define KSZ8463_PTP_CLK_CTL_PTP_STEP_ADJ_CLK 0x0040
1392 #define KSZ8463_PTP_CLK_CTL_PTP_STEP_DIR 0x0020
1393 #define KSZ8463_PTP_CLK_CTL_PTP_READ_CLK 0x0010
1394 #define KSZ8463_PTP_CLK_CTL_PTP_LOAD_CLK 0x0008
1395 #define KSZ8463_PTP_CLK_CTL_PTP_CONTINU_ADJ_CLK 0x0004
1396 #define KSZ8463_PTP_CLK_CTL_EN_PTP_CLK 0x0002
1397 #define KSZ8463_PTP_CLK_CTL_RESET_PTP_CLK 0x0001
1398 
1399 //PTP Sub-nanosecond Rate High-Word and Configuration register
1400 #define KSZ8463_PTP_SNS_RATE_H_PTP_RATE_DIR 0x8000
1401 #define KSZ8463_PTP_SNS_RATE_H_PTP_TEMP_ADJ_CLK 0x4000
1402 #define KSZ8463_PTP_SNS_RATE_H_PTP_SNS_RATE_H 0x3FFF
1403 
1404 //PTP Message Configuration 1 register
1405 #define KSZ8463_PTP_MSG_CFG_1_IEEE_802_1AS_MODE 0x0080
1406 #define KSZ8463_PTP_MSG_CFG_1_IEEE_1588_PTP_MODE 0x0040
1407 #define KSZ8463_PTP_MSG_CFG_1_ETH_PTP_DETECT 0x0020
1408 #define KSZ8463_PTP_MSG_CFG_1_IPV4_UDP_PTP_DETECT 0x0010
1409 #define KSZ8463_PTP_MSG_CFG_1_IPV6_UDP_PTP_DETECT 0x0008
1410 #define KSZ8463_PTP_MSG_CFG_1_E2E_CLK_MODE 0x0000
1411 #define KSZ8463_PTP_MSG_CFG_1_P2P_CLK_MODE 0x0004
1412 #define KSZ8463_PTP_MSG_CFG_1_SLAVE_OC_CLK_MODE 0x0000
1413 #define KSZ8463_PTP_MSG_CFG_1_MASTER_OC_CLK_MODE 0x0002
1414 #define KSZ8463_PTP_MSG_CFG_1_TWO_STEP_CLK_MODE 0x0000
1415 #define KSZ8463_PTP_MSG_CFG_1_ONE_STEP_CLK_MODE 0x0001
1416 
1417 //PTP Message Configuration 2 register
1418 #define KSZ8463_PTP_MSG_CFG_2_UNICAST_PTP_EN 0x1000
1419 #define KSZ8463_PTP_MSG_CFG_2_ALT_MASTER_EN 0x0800
1420 #define KSZ8463_PTP_MSG_CFG_2_PTP_MSG_PRIO_TX_QUEUE 0x0400
1421 #define KSZ8463_PTP_MSG_CFG_2_CHECK_SYNC_FOLLOW_UP 0x0200
1422 #define KSZ8463_PTP_MSG_CFG_2_CHECK_DELAY_REQ_RESP 0x0100
1423 #define KSZ8463_PTP_MSG_CFG_2_CHECK_PDELAY_REQ_RESP 0x0080
1424 #define KSZ8463_PTP_MSG_CFG_2_CHECK_DOMAIN 0x0010
1425 #define KSZ8463_PTP_MSG_CFG_2_IPV4_UDP_CHECKSUM_EN 0x0004
1426 #define KSZ8463_PTP_MSG_CFG_2_ANNOUNCE_PORT1 0x0002
1427 #define KSZ8463_PTP_MSG_CFG_2_ANNOUNCE_PORT2 0x0001
1428 
1429 //PTP Domain and Version register
1430 #define KSZ8463_PTP_DOMAIN_VER_PTP_VERSION 0x0F00
1431 #define KSZ8463_PTP_DOMAIN_VER_PTP_DOMAIN 0x00FF
1432 
1433 //PTP GPIO Monitor register
1434 #define KSZ8463_GPIO_MONITOR_INPUT11 0x0800
1435 #define KSZ8463_GPIO_MONITOR_INPUT10 0x0400
1436 #define KSZ8463_GPIO_MONITOR_INPUT9 0x0200
1437 #define KSZ8463_GPIO_MONITOR_INPUT8 0x0100
1438 #define KSZ8463_GPIO_MONITOR_INPUT7 0x0080
1439 #define KSZ8463_GPIO_MONITOR_INPUT6 0x0040
1440 #define KSZ8463_GPIO_MONITOR_INPUT5 0x0020
1441 #define KSZ8463_GPIO_MONITOR_INPUT4 0x0010
1442 #define KSZ8463_GPIO_MONITOR_INPUT3 0x0008
1443 #define KSZ8463_GPIO_MONITOR_INPUT2 0x0004
1444 #define KSZ8463_GPIO_MONITOR_INPUT1 0x0002
1445 #define KSZ8463_GPIO_MONITOR_INPUT0 0x0001
1446 
1447 //PTP GPIO Output Enable register
1448 #define KSZ8463_GPIO_OEN_OUTPUT11 0x0800
1449 #define KSZ8463_GPIO_OEN_OUTPUT10 0x0400
1450 #define KSZ8463_GPIO_OEN_OUTPUT9 0x0200
1451 #define KSZ8463_GPIO_OEN_OUTPUT8 0x0100
1452 #define KSZ8463_GPIO_OEN_OUTPUT7 0x0080
1453 #define KSZ8463_GPIO_OEN_OUTPUT6 0x0040
1454 #define KSZ8463_GPIO_OEN_OUTPUT5 0x0020
1455 #define KSZ8463_GPIO_OEN_OUTPUT4 0x0010
1456 #define KSZ8463_GPIO_OEN_OUTPUT3 0x0008
1457 #define KSZ8463_GPIO_OEN_OUTPUT2 0x0004
1458 #define KSZ8463_GPIO_OEN_OUTPUT1 0x0002
1459 #define KSZ8463_GPIO_OEN_OUTPUT0 0x0001
1460 
1461 //PTP Trigger Unit Interrupt Status register
1462 #define KSZ8463_PTP_TRIG_IS_UNIT12 0x0800
1463 #define KSZ8463_PTP_TRIG_IS_UNIT11 0x0400
1464 #define KSZ8463_PTP_TRIG_IS_UNIT10 0x0200
1465 #define KSZ8463_PTP_TRIG_IS_UNIT9 0x0100
1466 #define KSZ8463_PTP_TRIG_IS_UNIT8 0x0080
1467 #define KSZ8463_PTP_TRIG_IS_UNIT7 0x0040
1468 #define KSZ8463_PTP_TRIG_IS_UNIT6 0x0020
1469 #define KSZ8463_PTP_TRIG_IS_UNIT5 0x0010
1470 #define KSZ8463_PTP_TRIG_IS_UNIT4 0x0008
1471 #define KSZ8463_PTP_TRIG_IS_UNIT3 0x0004
1472 #define KSZ8463_PTP_TRIG_IS_UNIT2 0x0002
1473 #define KSZ8463_PTP_TRIG_IS_UNIT1 0x0001
1474 
1475 //PTP Trigger Unit Interrupt Enable register
1476 #define KSZ8463_PTP_TRIG_IE_UNIT12 0x0800
1477 #define KSZ8463_PTP_TRIG_IE_UNIT11 0x0400
1478 #define KSZ8463_PTP_TRIG_IE_UNIT10 0x0200
1479 #define KSZ8463_PTP_TRIG_IE_UNIT9 0x0100
1480 #define KSZ8463_PTP_TRIG_IE_UNIT8 0x0080
1481 #define KSZ8463_PTP_TRIG_IE_UNIT7 0x0040
1482 #define KSZ8463_PTP_TRIG_IE_UNIT6 0x0020
1483 #define KSZ8463_PTP_TRIG_IE_UNIT5 0x0010
1484 #define KSZ8463_PTP_TRIG_IE_UNIT4 0x0008
1485 #define KSZ8463_PTP_TRIG_IE_UNIT3 0x0004
1486 #define KSZ8463_PTP_TRIG_IE_UNIT2 0x0002
1487 #define KSZ8463_PTP_TRIG_IE_UNIT1 0x0001
1488 
1489 //PTP Time stamp Unit Interrupt Status register
1490 #define KSZ8463_PTP_TS_IS_P2_XDLY_TS_IS 0x8000
1491 #define KSZ8463_PTP_TS_IS_P2_SYNC_TS_IS 0x4000
1492 #define KSZ8463_PTP_TS_IS_P1_XDLY_TS_IS 0x2000
1493 #define KSZ8463_PTP_TS_IS_P1_SYNC_TS_IS 0x1000
1494 #define KSZ8463_PTP_TS_IS_TSU_IS 0x0FFF
1495 
1496 //PTP Time stamp Unit Interrupt Enable register
1497 #define KSZ8463_PTP_TS_IE_P2_XDLY_TS_IE 0x8000
1498 #define KSZ8463_PTP_TS_IE_P2_SYNC_TS_IE 0x4000
1499 #define KSZ8463_PTP_TS_IE_P1_XDLY_TS_IE 0x2000
1500 #define KSZ8463_PTP_TS_IE_P1_SYNC_TS_IE 0x1000
1501 #define KSZ8463_PTP_TS_IE_TSU_IE 0x0FFF
1502 
1503 //DSP Control 1 register
1504 #define KSZ8463_DSP_CNTRL_6_RECEIVER_ADJ 0x2000
1505 
1506 //Analog Control 1 register
1507 #define KSZ8463_ANA_CNTRL_1_LDO_OFF 0x0080
1508 
1509 //Analog Control 3 register
1510 #define KSZ8463_ANA_CNTRL_3_HIPLS3_MASK 0x8000
1511 #define KSZ8463_ANA_CNTRL_3_BTRX_REDUCE 0x0008
1512 
1513 //C++ guard
1514 #ifdef __cplusplus
1515 extern "C" {
1516 #endif
1517 
1518 //CC-RX, CodeWarrior or Win32 compiler?
1519 #if defined(__CCRX__)
1520  #pragma pack
1521 #elif defined(__CWCC__) || defined(_WIN32)
1522  #pragma pack(push, 1)
1523 #endif
1524 
1525 
1526 /**
1527  * @brief Static MAC table entry
1528  **/
1529 
1530 typedef struct
1531 {
1532 #if defined(_CPU_BIG_ENDIAN) && !defined(__ICCRX__)
1533  uint8_t reserved : 6; //0
1534  uint8_t fidH : 2;
1535  uint8_t fidL : 2; //1
1536  uint8_t useFid : 1;
1537  uint8_t override : 1;
1538  uint8_t valid : 1;
1539  uint8_t forwardPorts : 3;
1540 #else
1541  uint8_t fidH : 2; //0
1542  uint8_t reserved : 6;
1543  uint8_t forwardPorts : 3; //1
1544  uint8_t valid : 1;
1545  uint8_t override : 1;
1546  uint8_t useFid : 1;
1547  uint8_t fidL : 2;
1548 #endif
1551 
1552 
1553 /**
1554  * @brief Dynamic MAC table entry
1555  **/
1556 
1557 typedef struct
1558 {
1559 #if defined(_CPU_BIG_ENDIAN) && !defined(__ICCRX__)
1560  uint8_t dataNotReady : 1; //0
1561  uint8_t reserved : 4;
1562  uint8_t macEmpty : 1;
1563  uint8_t numValidEntriesH : 2;
1564  uint8_t numValidEntriesL; //1
1565  uint8_t timestamp : 2; //2
1566  uint8_t sourcePort : 2;
1567  uint8_t fid : 4;
1568 #else
1569  uint8_t numValidEntriesH : 2; //0
1570  uint8_t macEmpty : 1;
1571  uint8_t reserved : 4;
1572  uint8_t dataNotReady : 1;
1573  uint8_t numValidEntriesL; //1
1574  uint8_t fid : 4; //2
1575  uint8_t sourcePort : 2;
1576  uint8_t timestamp : 2;
1577 #endif
1580 
1581 
1582 //CC-RX, CodeWarrior or Win32 compiler?
1583 #if defined(__CCRX__)
1584  #pragma unpack
1585 #elif defined(__CWCC__) || defined(_WIN32)
1586  #pragma pack(pop)
1587 #endif
1588 
1589 //KSZ8463 Ethernet switch driver
1590 extern const SwitchDriver ksz8463SwitchDriver;
1591 
1592 //KSZ8463 related functions
1593 error_t ksz8463Init(NetInterface *interface);
1594 void ksz8463InitHook(NetInterface *interface);
1595 
1596 void ksz8463Tick(NetInterface *interface);
1597 
1598 void ksz8463EnableIrq(NetInterface *interface);
1599 void ksz8463DisableIrq(NetInterface *interface);
1600 
1601 void ksz8463EventHandler(NetInterface *interface);
1602 
1603 error_t ksz8463TagFrame(NetInterface *interface, NetBuffer *buffer,
1604  size_t *offset, NetTxAncillary *ancillary);
1605 
1606 error_t ksz8463UntagFrame(NetInterface *interface, uint8_t **frame,
1607  size_t *length, NetRxAncillary *ancillary);
1608 
1609 bool_t ksz8463GetLinkState(NetInterface *interface, uint8_t port);
1610 uint32_t ksz8463GetLinkSpeed(NetInterface *interface, uint8_t port);
1612 
1613 void ksz8463SetPortState(NetInterface *interface, uint8_t port,
1614  SwitchPortState state);
1615 
1617 
1618 void ksz8463SetAgingTime(NetInterface *interface, uint32_t agingTime);
1619 
1620 void ksz8463EnableIgmpSnooping(NetInterface *interface, bool_t enable);
1621 void ksz8463EnableMldSnooping(NetInterface *interface, bool_t enable);
1622 void ksz8463EnableRsvdMcastTable(NetInterface *interface, bool_t enable);
1623 
1625  const SwitchFdbEntry *entry);
1626 
1628  const SwitchFdbEntry *entry);
1629 
1631  SwitchFdbEntry *entry);
1632 
1633 void ksz8463FlushStaticFdbTable(NetInterface *interface);
1634 
1636  SwitchFdbEntry *entry);
1637 
1638 void ksz8463FlushDynamicFdbTable(NetInterface *interface, uint8_t port);
1639 
1641  bool_t enable, uint32_t forwardPorts);
1642 
1643 void ksz8463WritePhyReg(NetInterface *interface, uint8_t port,
1644  uint8_t address, uint16_t data);
1645 
1646 uint16_t ksz8463ReadPhyReg(NetInterface *interface, uint8_t port,
1647  uint8_t address);
1648 
1649 void ksz8463DumpPhyReg(NetInterface *interface, uint8_t port);
1650 
1651 void ksz8463WriteSwitchReg(NetInterface *interface, uint16_t address,
1652  uint16_t data);
1653 
1654 uint16_t ksz8463ReadSwitchReg(NetInterface *interface, uint16_t address);
1655 
1656 void ksz8463DumpSwitchReg(NetInterface *interface);
1657 
1658 //C++ guard
1659 #ifdef __cplusplus
1660 }
1661 #endif
1662 
1663 #endif
unsigned int uint_t
Definition: compiler_port.h:50
int bool_t
Definition: compiler_port.h:53
uint16_t port
Definition: dns_common.h:267
error_t
Error codes.
Definition: error.h:43
uint8_t data[]
Definition: ethernet.h:222
MacAddr
Definition: ethernet.h:195
uint8_t reserved
Definition: ipv4.h:312
Ipv6Addr address[]
Definition: ipv6.h:316
void ksz8463EnableIgmpSnooping(NetInterface *interface, bool_t enable)
Enable IGMP snooping.
uint32_t ksz8463GetLinkSpeed(NetInterface *interface, uint8_t port)
Get link speed.
void ksz8463FlushStaticFdbTable(NetInterface *interface)
Flush static MAC table.
error_t ksz8463Init(NetInterface *interface)
KSZ8463 Ethernet switch initialization.
void ksz8463EnableRsvdMcastTable(NetInterface *interface, bool_t enable)
Enable reserved multicast table.
SwitchPortState ksz8463GetPortState(NetInterface *interface, uint8_t port)
Get port state.
const SwitchDriver ksz8463SwitchDriver
KSZ8463 Ethernet switch driver.
error_t ksz8463GetStaticFdbEntry(NetInterface *interface, uint_t index, SwitchFdbEntry *entry)
Read an entry from the static MAC table.
error_t ksz8463DeleteStaticFdbEntry(NetInterface *interface, const SwitchFdbEntry *entry)
Remove an entry from the static MAC table.
error_t ksz8463TagFrame(NetInterface *interface, NetBuffer *buffer, size_t *offset, NetTxAncillary *ancillary)
Add tail tag to Ethernet frame.
void ksz8463DumpSwitchReg(NetInterface *interface)
Dump switch registers for debugging purpose.
void ksz8463EventHandler(NetInterface *interface)
KSZ8463 event handler.
uint16_t ksz8463ReadSwitchReg(NetInterface *interface, uint16_t address)
Read switch register.
error_t ksz8463AddStaticFdbEntry(NetInterface *interface, const SwitchFdbEntry *entry)
Add a new entry to the static MAC table.
error_t ksz8463UntagFrame(NetInterface *interface, uint8_t **frame, size_t *length, NetRxAncillary *ancillary)
Decode tail tag from incoming Ethernet frame.
void ksz8463DumpPhyReg(NetInterface *interface, uint8_t port)
Dump PHY registers for debugging purpose.
void ksz8463FlushDynamicFdbTable(NetInterface *interface, uint8_t port)
Flush dynamic MAC table.
void ksz8463EnableMldSnooping(NetInterface *interface, bool_t enable)
Enable MLD snooping.
void ksz8463SetUnknownMcastFwdPorts(NetInterface *interface, bool_t enable, uint32_t forwardPorts)
Set forward ports for unknown multicast packets.
uint16_t ksz8463ReadPhyReg(NetInterface *interface, uint8_t port, uint8_t address)
Read PHY register.
void ksz8463WritePhyReg(NetInterface *interface, uint8_t port, uint8_t address, uint16_t data)
Write PHY register.
void ksz8463SetPortState(NetInterface *interface, uint8_t port, SwitchPortState state)
Set port state.
error_t ksz8463GetDynamicFdbEntry(NetInterface *interface, uint_t index, SwitchFdbEntry *entry)
Read an entry from the dynamic MAC table.
void ksz8463WriteSwitchReg(NetInterface *interface, uint16_t address, uint16_t data)
Write switch register.
void ksz8463InitHook(NetInterface *interface)
KSZ8463 custom configuration.
void ksz8463EnableIrq(NetInterface *interface)
Enable interrupts.
void ksz8463Tick(NetInterface *interface)
KSZ8463 timer handler.
NicDuplexMode ksz8463GetDuplexMode(NetInterface *interface, uint8_t port)
Get duplex mode.
void ksz8463DisableIrq(NetInterface *interface)
Disable interrupts.
void ksz8463SetAgingTime(NetInterface *interface, uint32_t agingTime)
Set aging time for dynamic filtering entries.
bool_t ksz8463GetLinkState(NetInterface *interface, uint8_t port)
Get link state.
#define NetInterface
Definition: net.h:36
#define NetRxAncillary
Definition: net_misc.h:40
#define NetTxAncillary
Definition: net_misc.h:36
Network interface controller abstraction layer.
NicDuplexMode
Duplex mode.
Definition: nic.h:122
SwitchPortState
Switch port state.
Definition: nic.h:134
Dynamic MAC table entry.
uint8_t numValidEntriesH
uint8_t sourcePort
MacAddr macAddr
uint8_t fid
uint8_t macEmpty
uint8_t reserved
uint8_t numValidEntriesL
uint8_t timestamp
uint8_t dataNotReady
Static MAC table entry.
uint8_t forwardPorts
MacAddr macAddr
uint8_t valid
uint8_t useFid
uint8_t fidL
uint8_t override
uint8_t fidH
uint8_t reserved
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:89
Ethernet switch driver.
Definition: nic.h:322
Forwarding database entry.
Definition: nic.h:149
uint8_t length
Definition: tcp.h:368