31 #ifndef _KSZ8864_DRIVER_H
32 #define _KSZ8864_DRIVER_H
38 #define KSZ8864_PORT1 1
39 #define KSZ8864_PORT2 2
40 #define KSZ8864_PORT3 3
41 #define KSZ8864_PORT4 4
44 #define KSZ8864_PORT_MASK 0x0F
45 #define KSZ8864_PORT1_MASK 0x01
46 #define KSZ8864_PORT2_MASK 0x02
47 #define KSZ8864_PORT3_MASK 0x04
48 #define KSZ8864_PORT4_MASK 0x08
51 #define KSZ8864_SPI_CMD_WRITE 0x02
52 #define KSZ8864_SPI_CMD_READ 0x03
55 #define KSZ8864_STATIC_MAC_TABLE_SIZE 32
56 #define KSZ8864_DYNAMIC_MAC_TABLE_SIZE 1024
59 #define KSZ8864_TAIL_TAG_NORMAL_ADDR_LOOKUP 0x80
60 #define KSZ8864_TAIL_TAG_PORT_SEL 0x40
61 #define KSZ8864_TAIL_TAG_DEST_QUEUE 0x30
62 #define KSZ8864_TAIL_TAG_DEST_PORT3 0x08
63 #define KSZ8864_TAIL_TAG_DEST_PORT2 0x04
64 #define KSZ8864_TAIL_TAG_DEST_PORT1 0x02
67 #define KSZ8864_TAIL_TAG_SRC_PORT 0x03
70 #define KSZ8864_BMCR 0x00
71 #define KSZ8864_BMSR 0x01
72 #define KSZ8864_PHYID1 0x02
73 #define KSZ8864_PHYID2 0x03
74 #define KSZ8864_ANAR 0x04
75 #define KSZ8864_ANLPAR 0x05
76 #define KSZ8864_LINKMD 0x1D
77 #define KSZ8864_PHYSCS 0x1F
80 #define KSZ8864_CHIP_ID0 0x00
81 #define KSZ8864_CHIP_ID1 0x01
82 #define KSZ8864_GLOBAL_CTRL0 0x02
83 #define KSZ8864_GLOBAL_CTRL1 0x03
84 #define KSZ8864_GLOBAL_CTRL2 0x04
85 #define KSZ8864_GLOBAL_CTRL3 0x05
86 #define KSZ8864_GLOBAL_CTRL4 0x06
87 #define KSZ8864_GLOBAL_CTRL5 0x07
88 #define KSZ8864_GLOBAL_CTRL6 0x08
89 #define KSZ8864_GLOBAL_CTRL7 0x09
90 #define KSZ8864_GLOBAL_CTRL8 0x0A
91 #define KSZ8864_GLOBAL_CTRL9 0x0B
92 #define KSZ8864_GLOBAL_CTRL10 0x0C
93 #define KSZ8864_GLOBAL_CTRL11 0x0D
94 #define KSZ8864_PD_MGMT_CTRL1 0x0E
95 #define KSZ8864_PD_MGMT_CTRL2 0x0F
96 #define KSZ8864_PORT1_CTRL0 0x20
97 #define KSZ8864_PORT1_CTRL1 0x21
98 #define KSZ8864_PORT1_CTRL2 0x22
99 #define KSZ8864_PORT1_CTRL3 0x23
100 #define KSZ8864_PORT1_CTRL4 0x24
101 #define KSZ8864_PORT1_STAT0 0x29
102 #define KSZ8864_PORT1_PSCS 0x2A
103 #define KSZ8864_PORT1_LINKMD 0x2B
104 #define KSZ8864_PORT1_CTRL5 0x2C
105 #define KSZ8864_PORT1_CTRL6 0x2D
106 #define KSZ8864_PORT1_STAT1 0x2E
107 #define KSZ8864_PORT1_CTRL7_STAT2 0x2F
108 #define KSZ8864_PORT2_CTRL0 0x30
109 #define KSZ8864_PORT2_CTRL1 0x31
110 #define KSZ8864_PORT2_CTRL2 0x32
111 #define KSZ8864_PORT2_CTRL3 0x33
112 #define KSZ8864_PORT2_CTRL4 0x34
113 #define KSZ8864_PORT2_STAT0 0x39
114 #define KSZ8864_PORT2_PSCS 0x3A
115 #define KSZ8864_PORT2_LINKMD 0x3B
116 #define KSZ8864_PORT2_CTRL5 0x3C
117 #define KSZ8864_PORT2_CTRL6 0x3D
118 #define KSZ8864_PORT2_STAT1 0x3E
119 #define KSZ8864_PORT2_CTRL7_STAT2 0x3F
120 #define KSZ8864_PORT3_CTRL0 0x40
121 #define KSZ8864_PORT3_CTRL1 0x41
122 #define KSZ8864_PORT3_CTRL2 0x42
123 #define KSZ8864_PORT3_CTRL3 0x43
124 #define KSZ8864_PORT3_CTRL4 0x44
125 #define KSZ8864_PORT3_CTRL6 0x4D
126 #define KSZ8864_PORT4_CTRL0 0x50
127 #define KSZ8864_PORT4_CTRL1 0x51
128 #define KSZ8864_PORT4_CTRL2 0x52
129 #define KSZ8864_PORT4_CTRL3 0x53
130 #define KSZ8864_PORT4_CTRL4 0x54
131 #define KSZ8864_RMII_MGMT_CTRL 0x57
132 #define KSZ8864_PORT4_CTRL6 0x5D
133 #define KSZ8864_MAC_ADDR0 0x68
134 #define KSZ8864_MAC_ADDR1 0x69
135 #define KSZ8864_MAC_ADDR2 0x6A
136 #define KSZ8864_MAC_ADDR3 0x6B
137 #define KSZ8864_MAC_ADDR4 0x6C
138 #define KSZ8864_MAC_ADDR5 0x6D
139 #define KSZ8864_INDIRECT_CTRL0 0x6E
140 #define KSZ8864_INDIRECT_CTRL1 0x6F
141 #define KSZ8864_INDIRECT_DATA8 0x70
142 #define KSZ8864_INDIRECT_DATA7 0x71
143 #define KSZ8864_INDIRECT_DATA6 0x72
144 #define KSZ8864_INDIRECT_DATA5 0x73
145 #define KSZ8864_INDIRECT_DATA4 0x74
146 #define KSZ8864_INDIRECT_DATA3 0x75
147 #define KSZ8864_INDIRECT_DATA2 0x76
148 #define KSZ8864_INDIRECT_DATA1 0x77
149 #define KSZ8864_INDIRECT_DATA0 0x78
150 #define KSZ8864_INT_STAT 0x7C
151 #define KSZ8864_INT_MASK 0x7D
152 #define KSZ8864_GLOBAL_CTRL12 0x80
153 #define KSZ8864_GLOBAL_CTRL13 0x81
154 #define KSZ8864_GLOBAL_CTRL14 0x82
155 #define KSZ8864_GLOBAL_CTRL15 0x83
156 #define KSZ8864_GLOBAL_CTRL16 0x84
157 #define KSZ8864_GLOBAL_CTRL17 0x85
158 #define KSZ8864_GLOBAL_CTRL18 0x86
159 #define KSZ8864_GLOBAL_CTRL19 0x87
160 #define KSZ8864_ID 0x89
161 #define KSZ8864_TOS_PRIO_CTRL0 0x90
162 #define KSZ8864_TOS_PRIO_CTRL1 0x91
163 #define KSZ8864_TOS_PRIO_CTRL2 0x92
164 #define KSZ8864_TOS_PRIO_CTRL3 0x93
165 #define KSZ8864_TOS_PRIO_CTRL4 0x94
166 #define KSZ8864_TOS_PRIO_CTRL5 0x95
167 #define KSZ8864_TOS_PRIO_CTRL6 0x96
168 #define KSZ8864_TOS_PRIO_CTRL7 0x97
169 #define KSZ8864_TOS_PRIO_CTRL8 0x98
170 #define KSZ8864_TOS_PRIO_CTRL9 0x99
171 #define KSZ8864_TOS_PRIO_CTRL10 0x9A
172 #define KSZ8864_TOS_PRIO_CTRL11 0x9B
173 #define KSZ8864_TOS_PRIO_CTRL12 0x9C
174 #define KSZ8864_TOS_PRIO_CTRL13 0x9D
175 #define KSZ8864_TOS_PRIO_CTRL14 0x9E
176 #define KSZ8864_TOS_PRIO_CTRL15 0x9F
177 #define KSZ8864_TEST 0xBF
178 #define KSZ8864_PORT1_CTRL8 0xC0
179 #define KSZ8864_PORT1_CTRL9 0xC1
180 #define KSZ8864_PORT1_CTRL10 0xC2
181 #define KSZ8864_PORT1_CTRL11 0xC3
182 #define KSZ8864_PORT1_CTRL12 0xC4
183 #define KSZ8864_PORT1_CTRL13 0xC5
184 #define KSZ8864_PORT1_RATE_LIMIT_CTRL 0xC6
185 #define KSZ8864_PORT1_PRIO0_IG_LIMIT_CTRL1 0xC7
186 #define KSZ8864_PORT1_PRIO1_IG_LIMIT_CTRL2 0xC8
187 #define KSZ8864_PORT1_PRIO2_IG_LIMIT_CTRL3 0xC9
188 #define KSZ8864_PORT1_PRIO3_IG_LIMIT_CTRL4 0xCA
189 #define KSZ8864_PORT1_QUEUE0_EG_LIMIT_CTRL1 0xCB
190 #define KSZ8864_PORT1_QUEUE1_EG_LIMIT_CTRL2 0xCC
191 #define KSZ8864_PORT1_QUEUE2_EG_LIMIT_CTRL3 0xCD
192 #define KSZ8864_PORT1_QUEUE3_EG_LIMIT_CTRL4 0xCE
193 #define KSZ8864_TEST_PORT3_CTRL1 0xCF
194 #define KSZ8864_PORT2_CTRL8 0xD0
195 #define KSZ8864_PORT2_CTRL9 0xD1
196 #define KSZ8864_PORT2_CTRL10 0xD2
197 #define KSZ8864_PORT2_CTRL11 0xD3
198 #define KSZ8864_PORT2_CTRL12 0xD4
199 #define KSZ8864_PORT2_CTRL13 0xD5
200 #define KSZ8864_PORT2_RATE_LIMIT_CTRL 0xD6
201 #define KSZ8864_PORT2_PRIO0_IG_LIMIT_CTRL1 0xD7
202 #define KSZ8864_PORT2_PRIO1_IG_LIMIT_CTRL2 0xD8
203 #define KSZ8864_PORT2_PRIO2_IG_LIMIT_CTRL3 0xD9
204 #define KSZ8864_PORT2_PRIO3_IG_LIMIT_CTRL4 0xDA
205 #define KSZ8864_PORT2_QUEUE0_EG_LIMIT_CTRL1 0xDB
206 #define KSZ8864_PORT2_QUEUE1_EG_LIMIT_CTRL2 0xDC
207 #define KSZ8864_PORT2_QUEUE2_EG_LIMIT_CTRL3 0xDD
208 #define KSZ8864_PORT2_QUEUE3_EG_LIMIT_CTRL4 0xDE
209 #define KSZ8864_TEST_PORT3_CTRL2 0xDF
210 #define KSZ8864_PORT3_CTRL8 0xE0
211 #define KSZ8864_PORT3_CTRL9 0xE1
212 #define KSZ8864_PORT3_CTRL10 0xE2
213 #define KSZ8864_PORT3_CTRL11 0xE3
214 #define KSZ8864_PORT3_CTRL12 0xE4
215 #define KSZ8864_PORT3_CTRL13 0xE5
216 #define KSZ8864_PORT3_RATE_LIMIT_CTRL 0xE6
217 #define KSZ8864_PORT3_PRIO0_IG_LIMIT_CTRL1 0xE7
218 #define KSZ8864_PORT3_PRIO1_IG_LIMIT_CTRL2 0xE8
219 #define KSZ8864_PORT3_PRIO2_IG_LIMIT_CTRL3 0xE9
220 #define KSZ8864_PORT3_PRIO3_IG_LIMIT_CTRL4 0xEA
221 #define KSZ8864_PORT3_QUEUE0_EG_LIMIT_CTRL1 0xEB
222 #define KSZ8864_PORT3_QUEUE1_EG_LIMIT_CTRL2 0xEC
223 #define KSZ8864_PORT3_QUEUE2_EG_LIMIT_CTRL3 0xED
224 #define KSZ8864_PORT3_QUEUE3_EG_LIMIT_CTRL4 0xEE
225 #define KSZ8864_TEST3 0xEF
226 #define KSZ8864_PORT4_CTRL8 0xF0
227 #define KSZ8864_PORT4_CTRL9 0xF1
228 #define KSZ8864_PORT4_CTRL10 0xF2
229 #define KSZ8864_PORT4_CTRL11 0xF3
230 #define KSZ8864_PORT4_CTRL12 0xF4
231 #define KSZ8864_PORT4_CTRL13 0xF5
232 #define KSZ8864_PORT4_RATE_LIMIT_CTRL 0xF6
233 #define KSZ8864_PORT4_PRIO0_IG_LIMIT_CTRL1 0xF7
234 #define KSZ8864_PORT4_PRIO1_IG_LIMIT_CTRL2 0xF8
235 #define KSZ8864_PORT4_PRIO2_IG_LIMIT_CTRL3 0xF9
236 #define KSZ8864_PORT4_PRIO3_IG_LIMIT_CTRL4 0xFA
237 #define KSZ8864_PORT4_QUEUE0_EG_LIMIT_CTRL1 0xFB
238 #define KSZ8864_PORT4_QUEUE1_EG_LIMIT_CTRL2 0xFC
239 #define KSZ8864_PORT4_QUEUE2_EG_LIMIT_CTRL3 0xFD
240 #define KSZ8864_PORT4_QUEUE3_EG_LIMIT_CTRL4 0xFE
241 #define KSZ8864_TEST4 0xFF
244 #define KSZ8864_PORTn_CTRL0(port) (0x10 + ((port) * 0x10))
245 #define KSZ8864_PORTn_CTRL1(port) (0x11 + ((port) * 0x10))
246 #define KSZ8864_PORTn_CTRL2(port) (0x12 + ((port) * 0x10))
247 #define KSZ8864_PORTn_CTRL3(port) (0x13 + ((port) * 0x10))
248 #define KSZ8864_PORTn_CTRL4(port) (0x14 + ((port) * 0x10))
249 #define KSZ8864_PORTn_STAT0(port) (0x19 + ((port) * 0x10))
250 #define KSZ8864_PORTn_PSCS(port) (0x1A + ((port) * 0x10))
251 #define KSZ8864_PORTn_LINKMD(port) (0x1B + ((port) * 0x10))
252 #define KSZ8864_PORTn_CTRL5(port) (0x1C + ((port) * 0x10))
253 #define KSZ8864_PORTn_CTRL6(port) (0x1D + ((port) * 0x10))
254 #define KSZ8864_PORTn_STAT1(port) (0x1E + ((port) * 0x10))
255 #define KSZ8864_PORTn_CTRL7_STAT2(port) (0x1F + ((port) * 0x10))
256 #define KSZ8864_PORTn_CTRL8(port) (0xB0 + ((port) * 0x10))
257 #define KSZ8864_PORTn_CTRL9(port) (0xB1 + ((port) * 0x10))
258 #define KSZ8864_PORTn_CTRL10(port) (0xB2 + ((port) * 0x10))
259 #define KSZ8864_PORTn_CTRL11(port) (0xB3 + ((port) * 0x10))
260 #define KSZ8864_PORTn_CTRL12(port) (0xB4 + ((port) * 0x10))
261 #define KSZ8864_PORTn_CTRL13(port) (0xB5 + ((port) * 0x10))
262 #define KSZ8864_PORTn_RATE_LIMIT_CTRL(port) (0xB6 + ((port) * 0x10))
263 #define KSZ8864_PORTn_PRIO0_IG_LIMIT_CTRL1(port) (0xB7 + ((port) * 0x10))
264 #define KSZ8864_PORTn_PRIO1_IG_LIMIT_CTRL2(port) (0xB8 + ((port) * 0x10))
265 #define KSZ8864_PORTn_PRIO2_IG_LIMIT_CTRL3(port) (0xB9 + ((port) * 0x10))
266 #define KSZ8864_PORTn_PRIO3_IG_LIMIT_CTRL4(port) (0xBA + ((port) * 0x10))
267 #define KSZ8864_PORTn_QUEUE0_EG_LIMIT_CTRL1(port) (0xBB + ((port) * 0x10))
268 #define KSZ8864_PORTn_QUEUE1_EG_LIMIT_CTRL2(port) (0xBC + ((port) * 0x10))
269 #define KSZ8864_PORTn_QUEUE2_EG_LIMIT_CTRL3(port) (0xBD + ((port) * 0x10))
270 #define KSZ8864_PORTn_QUEUE3_EG_LIMIT_CTRL4(port) (0xBE + ((port) * 0x10))
273 #define KSZ8864_BMCR_RESET 0x8000
274 #define KSZ8864_BMCR_LOOPBACK 0x4000
275 #define KSZ8864_BMCR_FORCE_100 0x2000
276 #define KSZ8864_BMCR_AN_EN 0x1000
277 #define KSZ8864_BMCR_POWER_DOWN 0x0800
278 #define KSZ8864_BMCR_ISOLATE 0x0400
279 #define KSZ8864_BMCR_RESTART_AN 0x0200
280 #define KSZ8864_BMCR_FORCE_FULL_DUPLEX 0x0100
281 #define KSZ8864_BMCR_COL_TEST 0x0080
282 #define KSZ8864_BMCR_HP_MDIX 0x0020
283 #define KSZ8864_BMCR_FORCE_MDI 0x0010
284 #define KSZ8864_BMCR_AUTO_MDIX_DIS 0x0008
285 #define KSZ8864_BMCR_FAR_END_FAULT_DIS 0x0004
286 #define KSZ8864_BMCR_TRANSMIT_DIS 0x0002
287 #define KSZ8864_BMCR_LED_DIS 0x0001
290 #define KSZ8864_BMSR_100BT4 0x8000
291 #define KSZ8864_BMSR_100BTX_FD 0x4000
292 #define KSZ8864_BMSR_100BTX_HD 0x2000
293 #define KSZ8864_BMSR_10BT_FD 0x1000
294 #define KSZ8864_BMSR_10BT_HD 0x0800
295 #define KSZ8864_BMSR_PREAMBLE_SUPPR 0x0040
296 #define KSZ8864_BMSR_AN_COMPLETE 0x0020
297 #define KSZ8864_BMSR_FAR_END_FAULT 0x0010
298 #define KSZ8864_BMSR_AN_CAPABLE 0x0008
299 #define KSZ8864_BMSR_LINK_STATUS 0x0004
300 #define KSZ8864_BMSR_JABBER_TEST 0x0002
301 #define KSZ8864_BMSR_EXTENDED_CAPABLE 0x0001
304 #define KSZ8864_PHYID1_DEFAULT 0x0022
307 #define KSZ8864_PHYID2_DEFAULT 0x1450
310 #define KSZ8864_ANAR_NEXT_PAGE 0x8000
311 #define KSZ8864_ANAR_REMOTE_FAULT 0x2000
312 #define KSZ8864_ANAR_PAUSE 0x0400
313 #define KSZ8864_ANAR_100BTX_FD 0x0100
314 #define KSZ8864_ANAR_100BTX_HD 0x0080
315 #define KSZ8864_ANAR_10BT_FD 0x0040
316 #define KSZ8864_ANAR_10BT_HD 0x0020
317 #define KSZ8864_ANAR_SELECTOR 0x001F
318 #define KSZ8864_ANAR_SELECTOR_DEFAULT 0x0001
321 #define KSZ8864_ANLPAR_NEXT_PAGE 0x8000
322 #define KSZ8864_ANLPAR_LP_ACK 0x4000
323 #define KSZ8864_ANLPAR_REMOTE_FAULT 0x2000
324 #define KSZ8864_ANLPAR_PAUSE 0x0400
325 #define KSZ8864_ANLPAR_100BTX_FD 0x0100
326 #define KSZ8864_ANLPAR_100BTX_HD 0x0080
327 #define KSZ8864_ANLPAR_10BT_FD 0x0040
328 #define KSZ8864_ANLPAR_10BT_HD 0x0020
331 #define KSZ8864_LINKMD_TEST_EN 0x8000
332 #define KSZ8864_LINKMD_RESULT 0x6000
333 #define KSZ8864_LINKMD_SHORT 0x1000
334 #define KSZ8864_LINKMD_FAULT_COUNT 0x01FF
337 #define KSZ8864_PHYSCS_OP_MODE 0x0700
338 #define KSZ8864_PHYSCS_OP_MODE_AN 0x0100
339 #define KSZ8864_PHYSCS_OP_MODE_10BT_HD 0x0200
340 #define KSZ8864_PHYSCS_OP_MODE_100BTX_HD 0x0300
341 #define KSZ8864_PHYSCS_OP_MODE_10BT_FD 0x0500
342 #define KSZ8864_PHYSCS_OP_MODE_100BTX_FD 0x0600
343 #define KSZ8864_PHYSCS_OP_MODE_ISOLATE 0x0700
344 #define KSZ8864_PHYSCS_POLRVS 0x0020
345 #define KSZ8864_PHYSCS_MDIX_STATUS 0x0010
346 #define KSZ8864_PHYSCS_FORCE_LINK 0x0008
347 #define KSZ8864_PHYSCS_PWRSAVE 0x0004
348 #define KSZ8864_PHYSCS_REMOTE_LOOPBACK 0x0002
351 #define KSZ8864_CHIP_ID0_FAMILY_ID 0xFF
352 #define KSZ8864_CHIP_ID0_FAMILY_ID_DEFAULT 0x95
355 #define KSZ8864_CHIP_ID1_REVISION_ID 0x0E
356 #define KSZ8864_CHIP_ID1_START_SWITCH 0x01
359 #define KSZ8864_GLOBAL_CTRL0_NEW_BACK_OFF_EN 0x80
360 #define KSZ8864_GLOBAL_CTRL0_FLUSH_DYNAMIC_MAC_TABLE 0x20
361 #define KSZ8864_GLOBAL_CTRL0_FLUSH_STATIC_MAC_TABLE 0x10
362 #define KSZ8864_GLOBAL_CTRL0_UNH_MODE 0x02
363 #define KSZ8864_GLOBAL_CTRL0_LINK_CHANGE_AGE 0x01
366 #define KSZ8864_GLOBAL_CTRL1_PASS_ALL_FRAMES 0x80
367 #define KSZ8864_GLOBAL_CTRL1_2KB_PKT_SUPPORT 0x40
368 #define KSZ8864_GLOBAL_CTRL1_TX_FLOW_CTRL_DIS 0x20
369 #define KSZ8864_GLOBAL_CTRL1_RX_FLOW_CTRL_DIS 0x10
370 #define KSZ8864_GLOBAL_CTRL1_FRAME_LEN_CHECK_EN 0x08
371 #define KSZ8864_GLOBAL_CTRL1_AGING_EN 0x04
372 #define KSZ8864_GLOBAL_CTRL1_FAST_AGE_EN 0x02
373 #define KSZ8864_GLOBAL_CTRL1_AGGRESSIVE_BACK_OFF_EN 0x01
376 #define KSZ8864_GLOBAL_CTRL2_UNI_VLAN_MISMATCH_DISCARD 0x80
377 #define KSZ8864_GLOBAL_CTRL2_MCAST_STORM_PROTECT_DIS 0x40
378 #define KSZ8864_GLOBAL_CTRL2_BACK_PRESSURE_MODE 0x20
379 #define KSZ8864_GLOBAL_CTRL2_FLOW_CTRL_FAIR_MODE 0x10
380 #define KSZ8864_GLOBAL_CTRL2_NO_EXCESSIVE_COL_DROP 0x08
381 #define KSZ8864_GLOBAL_CTRL2_HUGE_PKT_SUPPORT 0x04
382 #define KSZ8864_GLOBAL_CTRL2_MAX_PKT_SIZE_CHECK_DIS 0x02
385 #define KSZ8864_GLOBAL_CTRL3_VLAN_EN 0x80
386 #define KSZ8864_GLOBAL_CTRL3_SW4_IGMP_SNOOP_EN 0x40
387 #define KSZ8864_GLOBAL_CTRL3_SW4_DIRECT_MODE_EN 0x20
388 #define KSZ8864_GLOBAL_CTRL3_SW4_PRE_TAG_EN 0x10
389 #define KSZ8864_GLOBAL_CTRL3_TAG_MASK_EN 0x02
390 #define KSZ8864_GLOBAL_CTRL3_SNIFF_MODE_SEL 0x01
393 #define KSZ8864_GLOBAL_CTRL4_SW4_BACK_PRESSURE_EN 0x80
394 #define KSZ8864_GLOBAL_CTRL4_SW4_HALF_DUPLEX_MODE 0x40
395 #define KSZ8864_GLOBAL_CTRL4_SW4_FLOW_CTRL_EN 0x20
396 #define KSZ8864_GLOBAL_CTRL4_SW4_SPEED 0x10
397 #define KSZ8864_GLOBAL_CTRL4_NULL_VID_REPLACEMENT 0x08
398 #define KSZ8864_GLOBAL_CTRL4_BCAST_STORM_PROTECT_RATE_MSB 0x07
401 #define KSZ8864_GLOBAL_CTRL5_BCAST_STORM_PROTECT_RATE_LSB 0xFF
404 #define KSZ8864_GLOBAL_CTRL6_FACTORY_TESTING 0xFF
407 #define KSZ8864_GLOBAL_CTRL7_FACTORY_TESTING 0xFF
410 #define KSZ8864_GLOBAL_CTRL8_FACTORY_TESTING 0xFF
413 #define KSZ8864_GLOBAL_CTRL9_SW3_REFCLK_EDGE_SEL 0x80
414 #define KSZ8864_GLOBAL_CTRL9_SW3_REFCLK_EDGE_SEL_RISING 0x00
415 #define KSZ8864_GLOBAL_CTRL9_SW3_REFCLK_EDGE_SEL_FALLING 0x80
416 #define KSZ8864_GLOBAL_CTRL9_SW4_REFCLK_EDGE_SEL 0x40
417 #define KSZ8864_GLOBAL_CTRL9_SW4_REFCLK_EDGE_SEL_RISING 0x00
418 #define KSZ8864_GLOBAL_CTRL9_SW4_REFCLK_EDGE_SEL_FALLING 0x40
419 #define KSZ8864_GLOBAL_CTRL9_PHY_PWR_SAVE 0x08
420 #define KSZ8864_GLOBAL_CTRL9_LED_MODE 0x02
421 #define KSZ8864_GLOBAL_CTRL9_SPI_READ_CLK_EDGE_SEL 0x01
422 #define KSZ8864_GLOBAL_CTRL9_SPI_READ_CLK_EDGE_SEL_FALLING 0x00
423 #define KSZ8864_GLOBAL_CTRL9_SPI_READ_CLK_EDGE_SEL_RISING 0x01
426 #define KSZ8864_GLOBAL_CTRL10_CLK_MODE 0x40
427 #define KSZ8864_GLOBAL_CTRL10_CPU_CLK_SEL 0x30
428 #define KSZ8864_GLOBAL_CTRL10_TAIL_TAG_EN 0x02
429 #define KSZ8864_GLOBAL_CTRL10_PASS_FLOW_CTRL_PKT 0x01
432 #define KSZ8864_GLOBAL_CTRL11_FACTORY_TESTING 0xFF
435 #define KSZ8864_PD_MGMT_CTRL1_PLL_PWR_DOWN 0x20
436 #define KSZ8864_PD_MGMT_CTRL1_PWR_MGMT_MODE 0x18
437 #define KSZ8864_PD_MGMT_CTRL1_PWR_MGMT_MODE_NORMAL 0x00
438 #define KSZ8864_PD_MGMT_CTRL1_PWR_MGMT_MODE_ENERGY_DETECT 0x08
439 #define KSZ8864_PD_MGMT_CTRL1_PWR_MGMT_MODE_SOFT_PWR_DOWN 0x10
440 #define KSZ8864_PD_MGMT_CTRL1_PWR_MGMT_MODE_PWR_SAVING 0x18
443 #define KSZ8864_PD_MGMT_CTRL2_GO_SLEEP_TIME 0xFF
446 #define KSZ8864_PORTn_CTRL0_BCAST_STORM_PROTECT_EN 0x80
447 #define KSZ8864_PORTn_CTRL0_DIFFSERV_PRIO_CLASS_EN 0x40
448 #define KSZ8864_PORTn_CTRL0_802_1P_PRIO_CLASS_EN 0x20
449 #define KSZ8864_PORTn_CTRL0_PORT_PRIO_CLASS_EN 0x18
450 #define KSZ8864_PORTn_CTRL0_TAG_INSERTION 0x04
451 #define KSZ8864_PORTn_CTRL0_TAG_REMOVAL 0x02
452 #define KSZ8864_PORTn_CTRL0_TWO_QUEUE_SPLIT_EN 0x01
455 #define KSZ8864_PORTn_CTRL1_SNIFFER_PORT 0x80
456 #define KSZ8864_PORTn_CTRL1_RECEIVE_SNIFF 0x40
457 #define KSZ8864_PORTn_CTRL1_TRANSMIT_SNIFF 0x20
458 #define KSZ8864_PORTn_CTRL1_PORT_VLAN_MEMBERSHIP 0x1F
461 #define KSZ8864_PORTn_CTRL2_USER_PRIO_CEILING 0x80
462 #define KSZ8864_PORTn_CTRL2_INGRESS_VLAN_FILT 0x40
463 #define KSZ8864_PORTn_CTRL2_DISCARD_NON_PVID_PKT 0x20
464 #define KSZ8864_PORTn_CTRL2_FORCE_FLOW_CTRL 0x10
465 #define KSZ8864_PORTn_CTRL2_BACK_PRESSURE_EN 0x08
466 #define KSZ8864_PORTn_CTRL2_TRANSMIT_EN 0x04
467 #define KSZ8864_PORTn_CTRL2_RECEIVE_EN 0x02
468 #define KSZ8864_PORTn_CTRL2_LEARNING_DIS 0x01
471 #define KSZ8864_PORTn_CTRL3_DEFAULT_USER_PRIO 0xE0
472 #define KSZ8864_PORTn_CTRL3_DEFAULT_CFI 0x10
473 #define KSZ8864_PORTn_CTRL3_DEFAULT_VID_MSB 0x0F
476 #define KSZ8864_PORTn_CTRL4_DEFAULT_VID_LSB 0xFF
479 #define KSZ8864_RMII_MGMT_CTRL_SW4_CLK_OUT_DIS 0x08
480 #define KSZ8864_RMII_MGMT_CTRL_SW3_CLK_OUT_DIS 0x04
483 #define KSZ8864_PORTn_STAT0_HP_MDIX 0x80
484 #define KSZ8864_PORTn_STAT0_POLRVS 0x20
485 #define KSZ8864_PORTn_STAT0_TX_FLOW_CTRL_EN 0x10
486 #define KSZ8864_PORTn_STAT0_RX_FLOW_CTRL_EN 0x08
487 #define KSZ8864_PORTn_STAT0_OP_SPEED 0x04
488 #define KSZ8864_PORTn_STAT0_OP_DUPLEX 0x02
491 #define KSZ8864_PORTn_PSCS_VCT_10M_SHORT 0x80
492 #define KSZ8864_PORTn_PSCS_VCT_RESULT 0x60
493 #define KSZ8864_PORTn_PSCS_VCT_EN 0x10
494 #define KSZ8864_PORTn_PSCS_FORCE_LNK 0x08
495 #define KSZ8864_PORTn_PSCS_PWRSAVE 0x04
496 #define KSZ8864_PORTn_PSCS_REMOTE_LOOPBACK 0x02
497 #define KSZ8864_PORTn_PSCS_VCT_FAULT_COUNT_MSB 0x01
500 #define KSZ8864_PORTn_LINKMD_VCT_FAULT_COUNT_LSB 0xFF
503 #define KSZ8864_PORTn_CTRL5_AN_DIS 0x80
504 #define KSZ8864_PORTn_CTRL5_FORCED_SPEED 0x40
505 #define KSZ8864_PORTn_CTRL5_FORCED_DUPLEX 0x20
506 #define KSZ8864_PORTn_CTRL5_ADV_FLOW_CTRL 0x10
507 #define KSZ8864_PORTn_CTRL5_ADV_100BT_FD 0x08
508 #define KSZ8864_PORTn_CTRL5_ADV_100BT_HD 0x04
509 #define KSZ8864_PORTn_CTRL5_ADV_10BT_FD 0x02
510 #define KSZ8864_PORTn_CTRL5_ADV_10BT_HD 0x01
513 #define KSZ8864_PORTn_CTRL6_LED_OFF 0x80
514 #define KSZ8864_PORTn_CTRL6_TX_DIS 0x40
515 #define KSZ8864_PORTn_CTRL6_RESTART_AN 0x20
516 #define KSZ8864_PORTn_CTRL6_POWER_DOWN 0x08
517 #define KSZ8864_PORTn_CTRL6_AUTO_MDIX_DIS 0x04
518 #define KSZ8864_PORTn_CTRL6_FORCED_MDI 0x02
519 #define KSZ8864_PORTn_CTRL6_MAC_LOOPBACK 0x01
522 #define KSZ8864_PORTn_STAT1_MDIX_STATUS 0x80
523 #define KSZ8864_PORTn_STAT1_AN_DONE 0x40
524 #define KSZ8864_PORTn_STAT1_LINK_GOOD 0x20
525 #define KSZ8864_PORTn_STAT1_LP_FLOW_CTRL_CAPABLE 0x10
526 #define KSZ8864_PORTn_STAT1_LP_100BTX_FD_CAPABLE 0x08
527 #define KSZ8864_PORTn_STAT1_LP_100BTX_HF_CAPABLE 0x04
528 #define KSZ8864_PORTn_STAT1_LP_10BT_FD_CAPABLE 0x02
529 #define KSZ8864_PORTn_STAT1_LP_10BT_HD_CAPABLE 0x01
532 #define KSZ8864_PORTn_CTRL7_STAT2_PHY_LOOPBACK 0x80
533 #define KSZ8864_PORTn_CTRL7_STAT2_PHY_ISOLATE 0x20
534 #define KSZ8864_PORTn_CTRL7_STAT2_SOFT_RESET 0x10
535 #define KSZ8864_PORTn_CTRL7_STAT2_FORCE_LINK 0x08
536 #define KSZ8864_PORTn_CTRL7_STAT2_OP_MODE 0x07
537 #define KSZ8864_PORTn_CTRL7_STAT2_OP_MODE_AN 0x01
538 #define KSZ8864_PORTn_CTRL7_STAT2_OP_MODE_10BT_HD 0x02
539 #define KSZ8864_PORTn_CTRL7_STAT2_OP_MODE_100BTX_HD 0x03
540 #define KSZ8864_PORTn_CTRL7_STAT2_OP_MODE_10BT_FD 0x05
541 #define KSZ8864_PORTn_CTRL7_STAT2_OP_MODE_100BTX_FD 0x06
544 #define KSZ8864_INDIRECT_CTRL0_WRITE 0x00
545 #define KSZ8864_INDIRECT_CTRL0_READ 0x10
546 #define KSZ8864_INDIRECT_CTRL0_TABLE_SEL 0x0C
547 #define KSZ8864_INDIRECT_CTRL0_TABLE_SEL_STATIC_MAC 0x00
548 #define KSZ8864_INDIRECT_CTRL0_TABLE_SEL_VLAN 0x04
549 #define KSZ8864_INDIRECT_CTRL0_TABLE_SEL_DYNAMIC_MAC 0x08
550 #define KSZ8864_INDIRECT_CTRL0_TABLE_SEL_MIB_COUNTER 0x0C
551 #define KSZ8864_INDIRECT_CTRL0_ADDR_H 0x03
554 #define KSZ8864_INDIRECT_CTRL1_ADDR_L 0xFF
557 #define KSZ8864_INT_STAT_PORT2 0x04
558 #define KSZ8864_INT_STAT_PORT1 0x02
561 #define KSZ8864_INT_MASK_PORT2 0x04
562 #define KSZ8864_INT_MASK_PORT1 0x02
565 #define KSZ8864_GLOBAL_CTRL12_TAG3 0xC0
566 #define KSZ8864_GLOBAL_CTRL12_TAG2 0x30
567 #define KSZ8864_GLOBAL_CTRL12_TAG1 0x0C
568 #define KSZ8864_GLOBAL_CTRL12_TAG0 0x03
571 #define KSZ8864_GLOBAL_CTRL13_TAG7 0xC0
572 #define KSZ8864_GLOBAL_CTRL13_TAG6 0x30
573 #define KSZ8864_GLOBAL_CTRL13_TAG5 0x0C
574 #define KSZ8864_GLOBAL_CTRL13_TAG4 0x03
577 #define KSZ8864_GLOBAL_CTRL14_PRI_2Q 0xC0
580 #define KSZ8864_GLOBAL_CTRL15_UNKNOWN_UNICAST_FWD 0x20
581 #define KSZ8864_GLOBAL_CTRL15_UNKNOWN_UNICAST_FWD_MAP 0x1F
582 #define KSZ8864_GLOBAL_CTRL15_UNKNOWN_UNICAST_FWD_MAP_FILT 0x00
583 #define KSZ8864_GLOBAL_CTRL15_UNKNOWN_UNICAST_FWD_MAP_PORT1 0x02
584 #define KSZ8864_GLOBAL_CTRL15_UNKNOWN_UNICAST_FWD_MAP_PORT2 0x04
585 #define KSZ8864_GLOBAL_CTRL15_UNKNOWN_UNICAST_FWD_MAP_PORT3 0x08
586 #define KSZ8864_GLOBAL_CTRL15_UNKNOWN_UNICAST_FWD_MAP_PORT4 0x10
587 #define KSZ8864_GLOBAL_CTRL15_UNKNOWN_UNICAST_FWD_MAP_ALL 0x1E
590 #define KSZ8864_GLOBAL_CTRL16_CHIP_OUT_DRIVE_STRENGTH 0xC0
591 #define KSZ8864_GLOBAL_CTRL16_CHIP_OUT_DRIVE_STRENGTH_4MA 0x00
592 #define KSZ8864_GLOBAL_CTRL16_CHIP_OUT_DRIVE_STRENGTH_8MA 0x40
593 #define KSZ8864_GLOBAL_CTRL16_CHIP_OUT_DRIVE_STRENGTH_10MA 0x80
594 #define KSZ8864_GLOBAL_CTRL16_CHIP_OUT_DRIVE_STRENGTH_14MA 0xC0
595 #define KSZ8864_GLOBAL_CTRL16_UNKNOWN_MCAST_FWD 0x20
596 #define KSZ8864_GLOBAL_CTRL16_UNKNOWN_MCAST_FWD_MAP 0x1F
597 #define KSZ8864_GLOBAL_CTRL16_UNKNOWN_MCAST_FWD_MAP_FILT 0x00
598 #define KSZ8864_GLOBAL_CTRL16_UNKNOWN_MCAST_FWD_MAP_PORT1 0x02
599 #define KSZ8864_GLOBAL_CTRL16_UNKNOWN_MCAST_FWD_MAP_PORT2 0x04
600 #define KSZ8864_GLOBAL_CTRL16_UNKNOWN_MCAST_FWD_MAP_PORT3 0x08
601 #define KSZ8864_GLOBAL_CTRL16_UNKNOWN_MCAST_FWD_MAP_PORT4 0x10
602 #define KSZ8864_GLOBAL_CTRL16_UNKNOWN_MCAST_FWD_MAP_ALL 0x1E
605 #define KSZ8864_GLOBAL_CTRL17_UNKNOWN_VID_FWD 0x20
606 #define KSZ8864_GLOBAL_CTRL17_UNKNOWN_VID_FWD_MAP 0x1F
607 #define KSZ8864_GLOBAL_CTRL17_UNKNOWN_VID_FWD_MAP_FILT 0x00
608 #define KSZ8864_GLOBAL_CTRL17_UNKNOWN_VID_FWD_MAP_PORT1 0x02
609 #define KSZ8864_GLOBAL_CTRL17_UNKNOWN_VID_FWD_MAP_PORT2 0x04
610 #define KSZ8864_GLOBAL_CTRL17_UNKNOWN_VID_FWD_MAP_PORT3 0x08
611 #define KSZ8864_GLOBAL_CTRL17_UNKNOWN_VID_FWD_MAP_PORT4 0x10
612 #define KSZ8864_GLOBAL_CTRL17_UNKNOWN_VID_FWD_MAP_ALL 0x1E
615 #define KSZ8864_GLOBAL_CTRL18_SELF_ADDR_FILTER_EN 0x40
616 #define KSZ8864_GLOBAL_CTRL18_UNKNOWN_IP_MCAST_FWD 0x20
617 #define KSZ8864_GLOBAL_CTRL18_UNKNOWN_IP_MCAST_FWD_MAP 0x1F
618 #define KSZ8864_GLOBAL_CTRL18_UNKNOWN_IP_MCAST_FWD_MAP_FILT 0x00
619 #define KSZ8864_GLOBAL_CTRL18_UNKNOWN_IP_MCAST_FWD_MAP_PORT1 0x02
620 #define KSZ8864_GLOBAL_CTRL18_UNKNOWN_IP_MCAST_FWD_MAP_PORT2 0x04
621 #define KSZ8864_GLOBAL_CTRL18_UNKNOWN_IP_MCAST_FWD_MAP_PORT3 0x08
622 #define KSZ8864_GLOBAL_CTRL18_UNKNOWN_IP_MCAST_FWD_MAP_PORT4 0x10
623 #define KSZ8864_GLOBAL_CTRL18_UNKNOWN_IP_MCAST_FWD_MAP_ALL 0x1E
626 #define KSZ8864_GLOBAL_CTRL19_IG_RATE_LIMIT_PERIOD 0x30
627 #define KSZ8864_GLOBAL_CTRL19_IG_RATE_LIMIT_PERIOD_16MS 0x00
628 #define KSZ8864_GLOBAL_CTRL19_IG_RATE_LIMIT_PERIOD_64MS 0x10
629 #define KSZ8864_GLOBAL_CTRL19_IG_RATE_LIMIT_PERIOD_256MS 0x20
630 #define KSZ8864_GLOBAL_CTRL19_QUEUE_BASED_EG_RATE_LIMITE_EN 0x08
631 #define KSZ8864_GLOBAL_CTRL19_INSERT_SRC_PORT_PVID_TAG_EN 0x04
634 #define KSZ8864_ID_REVISION_ID 0xF0
635 #define KSZ8864_ID_REVISION_ID_CNX_REV_A2 0x40
636 #define KSZ8864_ID_REVISION_ID_RMNUB_REV_B2 0x40
637 #define KSZ8864_ID_REVISION_ID_CNX_REV_A3 0x50
638 #define KSZ8864_ID_REVISION_ID_CNX_REV_A4 0x60
641 #define KSZ8864_PORTn_CTRL9_FOUR_QUEUE_SPLIT_EN 0x02
642 #define KSZ8864_PORTn_CTRL9_DROPPING_TAG_EN 0x01
645 #define KSZ8864_PORTn_CTRL10_PORT_TX_QUEUE3_RATIO_EN 0x80
646 #define KSZ8864_PORTn_CTRL10_PORT_TX_QUEUE3_RATIO 0x7F
649 #define KSZ8864_PORTn_CTRL11_PORT_TX_QUEUE2_RATIO_EN 0x80
650 #define KSZ8864_PORTn_CTRL11_PORT_TX_QUEUE2_RATIO 0x7F
653 #define KSZ8864_PORTn_CTRL12_PORT_TX_QUEUE1_RATIO_EN 0x80
654 #define KSZ8864_PORTn_CTRL12_PORT_TX_QUEUE1_RATIO 0x7F
657 #define KSZ8864_PORTn_CTRL13_PORT_TX_QUEUE0_RATIO_EN 0x80
658 #define KSZ8864_PORTn_CTRL13_PORT_TX_QUEUE0_RATIO 0x7F
661 #define KSZ8864_PORTn_RATE_LIMIT_CTRL_LIMIT_EN 0x10
662 #define KSZ8864_PORTn_RATE_LIMIT_CTRL_LIMIT_MODE 0x0C
663 #define KSZ8864_PORTn_RATE_LIMIT_CTRL_COUNT_IFG 0x02
664 #define KSZ8864_PORTn_RATE_LIMIT_CTRL_COUNT_PRE 0x01
667 #define KSZ8864_TEST_PORT3_CTRL1_SW3_HALF_DUPLEX_MODE 0x80
668 #define KSZ8864_TEST_PORT3_CTRL1_SW3_FLOW_CONTROL_EN 0x40
669 #define KSZ8864_TEST_PORT3_CTRL1_SW3_SPEED 0x20
670 #define KSZ8864_TEST_PORT3_CTRL1_SW3_SPEED_100 0x00
671 #define KSZ8864_TEST_PORT3_CTRL1_SW3_SPEED_10 0x20
674 #define KSZ8864_TEST_PORT3_CTRL2_SW3_MII_IF_MODE 0x40
675 #define KSZ8864_TEST_PORT3_CTRL2_SW3_MII_IF_MODE_PHY 0x00
676 #define KSZ8864_TEST_PORT3_CTRL2_SW3_MII_IF_MODE_MAC 0x40
679 #define KSZ8864_TEST4_SW4_RMII_INV_SMTXC 0x40
680 #define KSZ8864_TEST4_SW4_RMII_INV_SMRXC 0x10
688 #if defined(__CCRX__)
690 #elif defined(__CWCC__) || defined(_WIN32)
691 #pragma pack(push, 1)
701 #if defined(_CPU_BIG_ENDIAN) && !defined(__ICCRX__)
705 uint8_t override : 1;
707 uint8_t forwardPorts : 4;
729 #if defined(_CPU_BIG_ENDIAN) && !defined(__ICCRX__)
731 uint8_t override : 1;
733 uint8_t forwardPorts : 4;
752 #if defined(_CPU_BIG_ENDIAN) && !defined(__ICCRX__)
753 uint8_t macEmpty : 1;
754 uint8_t numValidEntriesH : 7;
755 uint8_t numValidEntriesL : 3;
756 uint8_t timestamp : 2;
757 uint8_t sourcePort : 3;
758 uint8_t dataNotReady : 1;
774 #if defined(__CCRX__)
776 #elif defined(__CWCC__) || defined(_WIN32)
832 bool_t enable, uint32_t forwardPorts);
void ksz8864WritePhyReg(NetInterface *interface, uint8_t port, uint8_t address, uint16_t data)
Write PHY register.
bool_t ksz8864GetLinkState(NetInterface *interface, uint8_t port)
Get link state.
void ksz8864EventHandler(NetInterface *interface)
KSZ8864 event handler.
void ksz8864WriteSwitchReg(NetInterface *interface, uint8_t address, uint8_t data)
Write switch register.
void ksz8864DumpSwitchReg(NetInterface *interface)
Dump switch registers for debugging purpose.
void ksz8864SetAgingTime(NetInterface *interface, uint32_t agingTime)
Set aging time for dynamic filtering entries.
void ksz8864EnableRsvdMcastTable(NetInterface *interface, bool_t enable)
Enable reserved multicast table.
void ksz8864FlushStaticFdbTable(NetInterface *interface)
Flush static MAC table.
void ksz8864DisableIrq(NetInterface *interface)
Disable interrupts.
void ksz8864SetPortState(NetInterface *interface, uint8_t port, SwitchPortState state)
Set port state.
void ksz8864InitHook(NetInterface *interface)
KSZ8864 custom configuration.
error_t ksz8864DeleteStaticFdbEntry(NetInterface *interface, const SwitchFdbEntry *entry)
Remove an entry from the static MAC table.
uint32_t ksz8864GetLinkSpeed(NetInterface *interface, uint8_t port)
Get link speed.
void ksz8864EnableMldSnooping(NetInterface *interface, bool_t enable)
Enable MLD snooping.
error_t ksz8864GetStaticFdbEntry(NetInterface *interface, uint_t index, SwitchFdbEntry *entry)
Read an entry from the static MAC table.
void ksz8864FlushDynamicFdbTable(NetInterface *interface, uint8_t port)
Flush dynamic MAC table.
uint8_t ksz8864ReadSwitchReg(NetInterface *interface, uint8_t address)
Read switch register.
void ksz8864EnableIrq(NetInterface *interface)
Enable interrupts.
uint16_t ksz8864ReadPhyReg(NetInterface *interface, uint8_t port, uint8_t address)
Read PHY register.
error_t ksz8864GetDynamicFdbEntry(NetInterface *interface, uint_t index, SwitchFdbEntry *entry)
Read an entry from the dynamic MAC table.
void ksz8864DumpPhyReg(NetInterface *interface, uint8_t port)
Dump PHY registers for debugging purpose.
error_t ksz8864TagFrame(NetInterface *interface, NetBuffer *buffer, size_t *offset, NetTxAncillary *ancillary)
Add tail tag to Ethernet frame.
void ksz8864SetUnknownMcastFwdPorts(NetInterface *interface, bool_t enable, uint32_t forwardPorts)
Set forward ports for unknown multicast packets.
const SwitchDriver ksz8864SwitchDriver
KSZ8864 Ethernet switch driver.
error_t ksz8864AddStaticFdbEntry(NetInterface *interface, const SwitchFdbEntry *entry)
Add a new entry to the static MAC table.
void ksz8864EnableIgmpSnooping(NetInterface *interface, bool_t enable)
Enable IGMP snooping.
error_t ksz8864Init(NetInterface *interface)
KSZ8864 Ethernet switch initialization.
void ksz8864Tick(NetInterface *interface)
KSZ8864 timer handler.
error_t ksz8864UntagFrame(NetInterface *interface, uint8_t **frame, size_t *length, NetRxAncillary *ancillary)
Decode tail tag from incoming Ethernet frame.
NicDuplexMode ksz8864GetDuplexMode(NetInterface *interface, uint8_t port)
Get duplex mode.
SwitchPortState ksz8864GetPortState(NetInterface *interface, uint8_t port)
Get port state.
Network interface controller abstraction layer.
NicDuplexMode
Duplex mode.
SwitchPortState
Switch port state.
Static MAC table entry (read operation)
Static MAC table entry (write operation)
Structure describing a buffer that spans multiple chunks.
Forwarding database entry.