lldp_ext_dot3.h
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1 /**
2  * @file lldp_ext_dot3.h
3  * @brief IEEE 802.3 LLDP extension
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.4.0
29  **/
30 
31 #ifndef _LLDP_EXT_DOT3_H
32 #define _LLDP_EXT_DOT3_H
33 
34 //Dependencies
35 #include "core/net.h"
36 #include "lldp/lldp.h"
37 
38 //C++ guard
39 #ifdef __cplusplus
40 extern "C" {
41 #endif
42 
43 
44 /**
45  * @brief IEEE 802.3 subtypes
46  **/
47 
48 typedef enum
49 {
50  LLDP_DOT3_SUBTYPE_RESERVED = 0, ///<Reserved
51  LLDP_DOT3_SUBTYPE_MAC_PHY_CONFIG_STATUS = 1, ///<MAC/PHY Configuration/Status
52  LLDP_DOT3_SUBTYPE_POWER_VIA_MDI = 2, ///<Power Via MDI
53  LLDP_DOT3_SUBTYPE_LINK_AGGREGATION = 3, ///<Link Aggregation
54  LLDP_DOT3_SUBTYPE_MAX_FRAME_SIZE = 4, ///<Maximum Frame Size
55  LLDP_DOT3_SUBTYPE_POWER_VIA_MDI_MEAS = 8 ///<Power Via MDI Measurements
57 
58 
59 /**
60  * @brief Auto-negotiation support/status flags
61  **/
62 
63 typedef enum
64 {
65  LLDP_DOT3_AN_FLAG_SUPPORT = 0x01, ///<Auto-negotiation support
66  LLDP_DOT3_AN_FLAG_STATUS = 0x02 ///<Auto-negotiation status
68 
69 
70 /**
71  * @brief PMD auto-negotiation advertised capability
72  **/
73 
74 typedef enum
75 {
76  LLDP_DOT3_PMD_AN_ADV_CAP_OTHER = 0x8000, ///<Other or unknown
77  LLDP_DOT3_PMD_AN_ADV_CAP_10BT_HD = 0x4000, ///<10BASE-T half-duplex mode
78  LLDP_DOT3_PMD_AN_ADV_CAP_10BT_FD = 0x2000, ///<10BASE-T full-duplex mode
79  LLDP_DOT3_PMD_AN_ADV_CAP_100BT4 = 0x1000, ///<100BASE-T4
80  LLDP_DOT3_PMD_AN_ADV_CAP_100BT_HD = 0x0800, ///<100BASE-TX half-duplex mode
81  LLDP_DOT3_PMD_AN_ADV_CAP_100BT_FD = 0x0400, ///<100BASE-TX full-duplex mode
82  LLDP_DOT3_PMD_AN_ADV_CAP_100BT2_HD = 0x0200, ///<100BASE-T2 half-duplex mode
83  LLDP_DOT3_PMD_AN_ADV_CAP_100BT2_FD = 0x0100, ///<100BASE-T2 full-duplex mode
84  LLDP_DOT3_PMD_AN_ADV_CAP_PAUSE = 0x0080, ///<PAUSE for full-duplex links
85  LLDP_DOT3_PMD_AN_ADV_CAP_ASYM_PAUSE = 0x0040, ///<Asymmetric PAUSE for full-duplex links
86  LLDP_DOT3_PMD_AN_ADV_CAP_SYM_PAUSE = 0x0020, ///<Symmetric PAUSE for full-duplex links
87  LLDP_DOT3_PMD_AN_ADV_CAP_ASYM_SYM_PAUSE = 0x0010, ///<Asymmetric and Symmetric PAUSE for full-duplex links
88  LLDP_DOT3_PMD_AN_ADV_CAP_1000BX_HD = 0x0008, ///<1000BASE-X, -LX, -SX, -CX half-duplex mode
89  LLDP_DOT3_PMD_AN_ADV_CAP_1000BX_FD = 0x0004, ///<1000BASE-X, -LX, -SX, -CX full-duplex mode
90  LLDP_DOT3_PMD_AN_ADV_CAP_1000BT_HD = 0x0002, ///<1000BASE-T half-duplex mode
91  LLDP_DOT3_PMD_AN_ADV_CAP_1000BT_FD = 0x0001 ///<1000BASE-T full-duplex mode
93 
94 
95 /**
96  * @brief Operational MAU types
97  **/
98 
99 typedef enum
100 {
101  LLDP_DOT3_MAU_TYPE_INVALID = 0, ///<Invalid
102  LLDP_DOT3_MAU_TYPE_10BT_HD = 10, ///<dot3MauType10BaseTHD
103  LLDP_DOT3_MAU_TYPE_10BT_FD = 11, ///<dot3MauType10BaseTFD
104  LLDP_DOT3_MAU_TYPE_100BT4 = 14, ///<dot3MauType100BaseT4
105  LLDP_DOT3_MAU_TYPE_100BTX_HD = 15, ///<dot3MauType100BaseTXHD
106  LLDP_DOT3_MAU_TYPE_100BTX_FD = 16, ///<dot3MauType100BaseTXFD
107  LLDP_DOT3_MAU_TYPE_100BT2_HD = 19, ///<dot3MauType100BaseT2HD
108  LLDP_DOT3_MAU_TYPE_100BT2_FD = 20, ///<dot3MauType100BaseT2FD
109  LLDP_DOT3_MAU_TYPE_1000BX_HD = 21, ///<dot3MauType1000BaseXHD
110  LLDP_DOT3_MAU_TYPE_1000BX_FD = 22, ///<dot3MauType1000BaseXFD
111  LLDP_DOT3_MAU_TYPE_1000BT_HD = 29, ///<dot3MauType1000BaseTHD
112  LLDP_DOT3_MAU_TYPE_1000BT_FD = 30, ///<dot3MauType1000BaseTFD
113  LLDP_DOT3_MAU_TYPE_100BT1 = 105, ///<dot3MauType100baseT1
114  LLDP_DOT3_MAU_TYPE_10BT1L = 141 ///<dot3MauType10baseT1L
116 
117 
118 /**
119  * @brief MDI power capability/status flags
120  **/
121 
122 typedef enum
123 {
124  LLDP_DOT3_MDI_POWER_FLAG_PORT_CLASS = 0x01, ///<Port class
125  LLDP_DOT3_MDI_POWER_FLAG_PORT_CLASS_PD = 0x00, ///<Port class - PD
126  LLDP_DOT3_MDI_POWER_FLAG_PORT_CLASS_PSE = 0x01, ///<Port class - PSE
127  LLDP_DOT3_MDI_POWER_FLAG_PSE_MDI_POWER_SUPPORT = 0x02, ///<PSE MDI power support
128  LLDP_DOT3_MDI_POWER_FLAG_PSE_MDI_POWER_STATE = 0x04, ///<PSE MDI power state
129  LLDP_DOT3_MDI_POWER_FLAG_PSE_PAIRS_CTRL_ABILITY = 0x08, ///<PSE pairs control ability
131 
132 
133 /**
134  * @brief PSE power pair
135  **/
136 
137 typedef enum
138 {
141  LLDP_DOT3_PSE_POWER_PAIR_ALT_A = 1, ///<Alternative A
142  LLDP_DOT3_PSE_POWER_PAIR_ALT_B = 2 ///<Alternative B
144 
145 
146 /**
147  * @brief power class
148  **/
149 
150 typedef enum
151 {
152  LLDP_DOT3_POWER_CLASS_0 = 1, ///<Class 0 PD
153  LLDP_DOT3_POWER_CLASS_1 = 2, ///<Class 1 PD
154  LLDP_DOT3_POWER_CLASS_2 = 3, ///<Class 2 PD
155  LLDP_DOT3_POWER_CLASS_3 = 4, ///<Class 3 PD
156  LLDP_DOT3_POWER_CLASS_4 = 5 ///<Class 4 and above PD
158 
159 
160 /**
161  * @brief power type
162  **/
163 
164 typedef enum
165 {
166  LLDP_DOT3_POWER_TYPE_2_PSE = 0, ///<Type 2 PSE
167  LLDP_DOT3_POWER_TYPE_2_PD = 1, ///<Type 2 PD
168  LLDP_DOT3_POWER_TYPE_1_PSE = 2, ///<Type 1 PSE
169  LLDP_DOT3_POWER_TYPE_1_PD = 3 ///<Type 1 PD
171 
172 
173 /**
174  * @brief power source
175  **/
176 
177 typedef enum
178 {
179  LLDP_DOT3_PD_POWER_SOURCE_UNKNOWN = 0, ///<Unknown (PD device type)
180  LLDP_DOT3_PD_POWER_SOURCE_PSE = 1, ///<PSE (PD device type)
181  LLDP_DOT3_PD_POWER_SOURCE_RESERVED = 2, ///<Reserved (PD device type)
182  LLDP_DOT3_PD_POWER_SOURCE_PSE_AND_LOCAL = 3, ///<PSE and local (PD device type)
183  LLDP_DOT3_PSE_POWER_SOURCE_UNKNOWN = 0, ///<Unknown (PSE device type)
184  LLDP_DOT3_PSE_POWER_SOURCE_PRIMARY = 1, ///<Primary power source (PSE device type)
185  LLDP_DOT3_PSE_POWER_SOURCE_BACKUP = 2, ///<Backup source (PSE device type)
186  LLDP_DOT3_PSE_POWER_SOURCE_RESERVED = 3 ///<Reserved (PSE device type)
188 
189 
190 /**
191  * @brief Power priority
192  **/
193 
194 typedef enum
195 {
199  LLDP_DOT3_POWER_PRIORITY_LOW = 3 ///<Low
201 
202 
203 /**
204  * @brief Power status
205  **/
206 
207 typedef enum
208 {
248 
249 
250 /**
251  * @brief System setup
252  **/
253 
254 typedef enum
255 {
266 
267 
268 /**
269  * @brief Autoclass field
270  **/
271 
272 typedef enum
273 {
279 
280 
281 /**
282  * @brief Power down field
283  **/
284 
285 typedef enum
286 {
288  LLDP_DOT3_POWER_DOWN_TIME = 0x03FFFF
290 
291 
292 /**
293  * @brief Link aggregation capability/status flags
294  **/
295 
296 typedef enum
297 {
298  LLDP_DOT3_LINK_AGGREGATION_FLAG_CAP = 0x01, ///<Aggregation capability
299  LLDP_DOT3_LINK_AGGREGATION_FLAG_STATUS = 0x02, ///<Aggregation status
301 
302 
303 //CC-RX, CodeWarrior or Win32 compiler?
304 #if defined(__CCRX__)
305  #pragma pack
306 #elif defined(__CWCC__) || defined(_WIN32)
307  #pragma pack(push, 1)
308 #endif
309 
310 
311 /**
312  * @brief MAC/PHY Configuration/Status TLV
313  **/
314 
316 {
317  uint8_t autoNegSupportStatus; //0
318  uint16_t pmdAutoNegAdvCap; //1-2
319  uint16_t operationalMauType; //3-4
321 
322 
323 /**
324  * @brief Power Via MDI TLV
325  **/
326 
327 typedef __packed_struct
328 {
329  uint8_t mdiPowerSupport; //0
330  uint8_t psePowerPair; //1
331  uint8_t powerClass; //2
333 
334 
335 /**
336  * @brief Link Aggregation TLV
337  **/
338 
339 typedef __packed_struct
340 {
341  uint8_t aggregationStatus; //0
342  uint32_t aggregatedPortId; //2-5
344 
345 
346 /**
347  * @brief Maximum Frame Size TLV
348  **/
349 
350 typedef __packed_struct
351 {
352  uint16_t maxFrameSize; //0-1
354 
355 
356 /**
357  * @brief Power Via MDI Measurements TLV
358  **/
359 
360 typedef __packed_struct
361 {
362  uint8_t measurements[20]; //0-19
363  uint16_t psePowerPriceIndex; //20-21
365 
366 
367 /**
368  * @brief DLL Classification extension
369  **/
370 
371 typedef __packed_struct
372 {
373 #if defined(_CPU_BIG_ENDIAN) && !defined(__ICCRX__)
374  uint8_t powerType : 2; //0
375  uint8_t powerSource : 2;
376  uint8_t reserved : 1;
377  uint8_t pd4pid : 1;
378  uint8_t powerPriority : 2;
379 #else
380  uint8_t powerPriority : 2; //0
381  uint8_t pd4pid : 1;
382  uint8_t reserved : 1;
383  uint8_t powerSource : 2;
384  uint8_t powerType : 2;
385 #endif
386  uint16_t pdRequestedPower; //1-2
387  uint16_t pseAllocatedPower; //3-4
389 
390 
391 /**
392  * @brief Type 3 and Type 4 extension
393  **/
394 
395 typedef __packed_struct
396 {
397  uint16_t pdRequestedPowerA; //0-1
398  uint16_t pdRequestedPowerB; //2-3
399  uint16_t pseAllocatedPowerA; //4-5
400  uint16_t pseAllocatedPowerB; //6-7
401  uint16_t powerStatus; //8-9
402  uint8_t systemSetup; //10
403  uint16_t pseMaxAvailablePower; //11-12
404  uint8_t autoclass; //13
405  uint8_t powerDown[3]; //14-16
407 
408 
409 //CC-RX, CodeWarrior or Win32 compiler?
410 #if defined(__CCRX__)
411  #pragma unpack
412 #elif defined(__CWCC__) || defined(_WIN32)
413  #pragma pack(pop)
414 #endif
415 
416 //IEEE 802.3 related functions
418  uint_t portIndex, uint8_t autoNegSupportStatus, uint16_t pmdAutoNegAdvCap,
419  uint16_t operationalMauType);
420 
422  uint_t portIndex, uint8_t mdiPowerSupport,
424  const LldpDot3DllClassExt *dllClassExt, const LldpDot3Type34Ext *type34Ext);
425 
427  uint_t portIndex, uint8_t aggregationStatus, uint32_t aggregatedPortId);
428 
430  uint_t portIndex, uint16_t maxFrameSize);
431 
433  uint_t portIndex, uint8_t measurements[20], uint16_t psePowerPriceIndex);
434 
437 
438 //C++ guard
439 #ifdef __cplusplus
440 }
441 #endif
442 
443 #endif
unsigned int uint_t
Definition: compiler_port.h:50
error_t
Error codes.
Definition: error.h:43
LLDP (Link Layer Discovery Protocol)
#define LldpAgentContext
Definition: lldp.h:40
LldpDot3MaxFrameSizeTlv
uint8_t pd4pid
error_t lldpDot3SetLocalPowerViaMdi(LldpAgentContext *context, uint_t portIndex, uint8_t mdiPowerSupport, LldpDot3PsePowerPair psePowerPair, LldpDot3PowerClass powerClass, const LldpDot3DllClassExt *dllClassExt, const LldpDot3Type34Ext *type34Ext)
Set power-via-MDI.
uint16_t operationalMauType
LldpDot3MauType
Operational MAU types.
@ LLDP_DOT3_MAU_TYPE_100BTX_HD
dot3MauType100BaseTXHD
@ LLDP_DOT3_MAU_TYPE_100BT1
dot3MauType100baseT1
@ LLDP_DOT3_MAU_TYPE_100BT4
dot3MauType100BaseT4
@ LLDP_DOT3_MAU_TYPE_100BTX_FD
dot3MauType100BaseTXFD
@ LLDP_DOT3_MAU_TYPE_1000BX_HD
dot3MauType1000BaseXHD
@ LLDP_DOT3_MAU_TYPE_100BT2_FD
dot3MauType100BaseT2FD
@ LLDP_DOT3_MAU_TYPE_INVALID
Invalid.
@ LLDP_DOT3_MAU_TYPE_10BT1L
dot3MauType10baseT1L
@ LLDP_DOT3_MAU_TYPE_100BT2_HD
dot3MauType100BaseT2HD
@ LLDP_DOT3_MAU_TYPE_10BT_HD
dot3MauType10BaseTHD
@ LLDP_DOT3_MAU_TYPE_1000BX_FD
dot3MauType1000BaseXFD
@ LLDP_DOT3_MAU_TYPE_1000BT_HD
dot3MauType1000BaseTHD
@ LLDP_DOT3_MAU_TYPE_1000BT_FD
dot3MauType1000BaseTFD
@ LLDP_DOT3_MAU_TYPE_10BT_FD
dot3MauType10BaseTFD
uint16_t powerStatus
uint8_t powerSource
uint16_t pseAllocatedPower
LldpDot3PowerDown
Power down field.
@ LLDP_DOT3_POWER_DOWN_REQUEST
@ LLDP_DOT3_POWER_DOWN_TIME
uint16_t pseMaxAvailablePower
uint32_t aggregatedPortId
LldpDot3Autoclass
Autoclass field.
@ LLDP_DOT3_AUTOCLASS_REQUEST
@ LLDP_DOT3_AUTOCLASS_PSE_SUPPORT
@ LLDP_DOT3_AUTOCLASS_COMPLETED
@ LLDP_DOT3_AUTOCLASS_RESERVED
uint8_t autoclass
LldpDot3Type34Ext
uint8_t powerDown[3]
LldpDot3PsePowerPair
PSE power pair.
@ LLDP_DOT3_PSE_POWER_PAIR_ALT_A
Alternative A.
@ LLDP_DOT3_PSE_POWER_PAIR_SPARE
Spare.
@ LLDP_DOT3_PSE_POWER_PAIR_SIGNAL
Signal.
@ LLDP_DOT3_PSE_POWER_PAIR_ALT_B
Alternative B.
uint8_t systemSetup
uint16_t psePowerPriceIndex
LldpDot3DllClassExt
LldpDot3PowerViaMdiMeasTlv
LldpDot3PowerStatus
Power status.
@ LLDP_DOT3_POWER_STATUS_DUAL_SIGN_POWER_CLASS_EXT_A_CLASS_2
@ LLDP_DOT3_POWER_STATUS_PD_POWERED_STATUS_2_PAIR_DUAL_SIGN_PD
@ LLDP_DOT3_POWER_STATUS_DUAL_SIGN_POWER_CLASS_EXT_B_CLASS_5
@ LLDP_DOT3_POWER_STATUS_PD_POWERED_STATUS
@ LLDP_DOT3_POWER_STATUS_DUAL_SIGN_POWER_CLASS_EXT_B_CLASS_4
@ LLDP_DOT3_POWER_STATUS_DUAL_SIGN_POWER_CLASS_EXT_A_2_PAIR_ONLY_PSE
@ LLDP_DOT3_POWER_STATUS_DUAL_SIGN_POWER_CLASS_EXT_B_SINGLE_SIGN_PD
@ LLDP_DOT3_POWER_STATUS_POWER_CLASS_EXT_CLASS_3
@ LLDP_DOT3_POWER_STATUS_POWER_CLASS_EXT_CLASS_1
@ LLDP_DOT3_POWER_STATUS_PSE_POWER_PAIRS_EXT_ALT_B
@ LLDP_DOT3_POWER_STATUS_DUAL_SIGN_POWER_CLASS_EXT_A_CLASS_4
@ LLDP_DOT3_POWER_STATUS_POWER_CLASS_EXT_DUAL_SIGN_PD
@ LLDP_DOT3_POWER_STATUS_DUAL_SIGN_POWER_CLASS_EXT_A_CLASS_3
@ LLDP_DOT3_POWER_STATUS_DUAL_SIGN_POWER_CLASS_EXT_A_CLASS_1
@ LLDP_DOT3_POWER_STATUS_POWER_CLASS_EXT_CLASS_4
@ LLDP_DOT3_POWER_STATUS_PD_POWERED_STATUS_SINGLE_SIGN_PD
@ LLDP_DOT3_POWER_STATUS_POWER_CLASS_EXT_CLASS_7
@ LLDP_DOT3_POWER_STATUS_PSE_POWERING_STATUS_4_PAIR_DUAL_SIGN_PD
@ LLDP_DOT3_POWER_STATUS_DUAL_SIGN_POWER_CLASS_EXT_B_CLASS_3
@ LLDP_DOT3_POWER_STATUS_PSE_POWERING_STATUS
@ LLDP_DOT3_POWER_STATUS_DUAL_SIGN_POWER_CLASS_EXT_B
@ LLDP_DOT3_POWER_STATUS_DUAL_SIGN_POWER_CLASS_EXT_A_CLASS_5
@ LLDP_DOT3_POWER_STATUS_DUAL_SIGN_POWER_CLASS_EXT_B_CLASS_2
@ LLDP_DOT3_POWER_STATUS_POWER_CLASS_EXT_CLASS_2
@ LLDP_DOT3_POWER_STATUS_PSE_POWER_PAIRS_EXT_BOTH
@ LLDP_DOT3_POWER_STATUS_POWER_CLASS_EXT
@ LLDP_DOT3_POWER_STATUS_DUAL_SIGN_POWER_CLASS_EXT_A
@ LLDP_DOT3_POWER_STATUS_DUAL_SIGN_POWER_CLASS_EXT_A_SINGLE_SIGN_PD
@ LLDP_DOT3_POWER_STATUS_PSE_POWER_PAIRS_EXT
@ LLDP_DOT3_POWER_STATUS_POWER_CLASS_EXT_CLASS_8
@ LLDP_DOT3_POWER_STATUS_DUAL_SIGN_POWER_CLASS_EXT_B_2_PAIR_ONLY_PSE
@ LLDP_DOT3_POWER_STATUS_PSE_POWERING_STATUS_4_PAIR_SINGLE_SIGN_PD
@ LLDP_DOT3_POWER_STATUS_PSE_POWER_PAIRS_EXT_ALT_A
@ LLDP_DOT3_POWER_STATUS_POWER_CLASS_EXT_CLASS_5
@ LLDP_DOT3_POWER_STATUS_DUAL_SIGN_POWER_CLASS_EXT_B_CLASS_1
@ LLDP_DOT3_POWER_STATUS_POWER_CLASS_EXT_CLASS_6
@ LLDP_DOT3_POWER_STATUS_PD_POWERED_STATUS_4_PAIR_DUAL_SIGN_PD
@ LLDP_DOT3_POWER_STATUS_PSE_POWERING_STATUS_2_PAIR
LldpDot3LinkAggregationFlag
Link aggregation capability/status flags.
@ LLDP_DOT3_LINK_AGGREGATION_FLAG_CAP
Aggregation capability.
@ LLDP_DOT3_LINK_AGGREGATION_FLAG_STATUS
Aggregation status.
LldpDot3SystemSetup
System setup.
@ LLDP_DOT3_SYSTEM_SETUP_PD_LOAD
@ LLDP_DOT3_SYSTEM_SETUP_POWER_TYPE_EXT
@ LLDP_DOT3_SYSTEM_SETUP_POWER_TYPE_EXT_TYPE_3_SINGLE_SIGN_PD
@ LLDP_DOT3_SYSTEM_SETUP_POWER_TYPE_EXT_TYPE_4_DUAL_SIGN_PD
@ LLDP_DOT3_SYSTEM_SETUP_POWER_TYPE_EXT_TYPE_4_SINGLE_SIGN_PD
@ LLDP_DOT3_SYSTEM_SETUP_POWER_TYPE_RESERVED
@ LLDP_DOT3_SYSTEM_SETUP_POWER_TYPE_EXT_TYPE_3_DUAL_SIGN_PD
@ LLDP_DOT3_SYSTEM_SETUP_POWER_TYPE_EXT_TYPE_3_PSE
@ LLDP_DOT3_SYSTEM_SETUP_POWER_TYPE_EXT_TYPE_4_PSE
uint8_t powerClass
LldpDot3PowerType
power type
@ LLDP_DOT3_POWER_TYPE_1_PD
Type 1 PD.
@ LLDP_DOT3_POWER_TYPE_2_PD
Type 2 PD.
@ LLDP_DOT3_POWER_TYPE_1_PSE
Type 1 PSE.
@ LLDP_DOT3_POWER_TYPE_2_PSE
Type 2 PSE.
error_t lldpDot3SetLocalMaxFrameSize(LldpAgentContext *context, uint_t portIndex, uint16_t maxFrameSize)
Set maximum frame size.
error_t lldpDot3SetLocalMacPhyConfigStatus(LldpAgentContext *context, uint_t portIndex, uint8_t autoNegSupportStatus, uint16_t pmdAutoNegAdvCap, uint16_t operationalMauType)
Set MAC/PHY configuration/status.
Definition: lldp_ext_dot3.c:57
LldpDot3AnFlags
Auto-negotiation support/status flags.
Definition: lldp_ext_dot3.h:64
@ LLDP_DOT3_AN_FLAG_STATUS
Auto-negotiation status.
Definition: lldp_ext_dot3.h:66
@ LLDP_DOT3_AN_FLAG_SUPPORT
Auto-negotiation support.
Definition: lldp_ext_dot3.h:65
LldpDot3MdiPowerFlags
MDI power capability/status flags.
@ LLDP_DOT3_MDI_POWER_FLAG_PSE_MDI_POWER_STATE
PSE MDI power state.
@ LLDP_DOT3_MDI_POWER_FLAG_PSE_MDI_POWER_SUPPORT
PSE MDI power support.
@ LLDP_DOT3_MDI_POWER_FLAG_PSE_PAIRS_CTRL_ABILITY
PSE pairs control ability.
@ LLDP_DOT3_MDI_POWER_FLAG_PORT_CLASS
Port class.
@ LLDP_DOT3_MDI_POWER_FLAG_PORT_CLASS_PD
Port class - PD.
@ LLDP_DOT3_MDI_POWER_FLAG_PORT_CLASS_PSE
Port class - PSE.
uint16_t pseAllocatedPowerA
uint16_t pdRequestedPowerB
LldpDot3LinkAggregationTlv
error_t lldpDot3SetLocalPowerViaMdiMeas(LldpAgentContext *context, uint_t portIndex, uint8_t measurements[20], uint16_t psePowerPriceIndex)
Set power-via-MDI measurements.
uint16_t pmdAutoNegAdvCap
LldpDot3PowerSource
power source
@ LLDP_DOT3_PD_POWER_SOURCE_RESERVED
Reserved (PD device type)
@ LLDP_DOT3_PD_POWER_SOURCE_PSE_AND_LOCAL
PSE and local (PD device type)
@ LLDP_DOT3_PD_POWER_SOURCE_PSE
PSE (PD device type)
@ LLDP_DOT3_PSE_POWER_SOURCE_PRIMARY
Primary power source (PSE device type)
@ LLDP_DOT3_PD_POWER_SOURCE_UNKNOWN
Unknown (PD device type)
@ LLDP_DOT3_PSE_POWER_SOURCE_UNKNOWN
Unknown (PSE device type)
@ LLDP_DOT3_PSE_POWER_SOURCE_RESERVED
Reserved (PSE device type)
@ LLDP_DOT3_PSE_POWER_SOURCE_BACKUP
Backup source (PSE device type)
error_t lldpDot3SetLocalLinkAggregation(LldpAgentContext *context, uint_t portIndex, uint8_t aggregationStatus, uint32_t aggregatedPortId)
Set Link aggregation.
LldpDot3PmdAnAdvCapability
PMD auto-negotiation advertised capability.
Definition: lldp_ext_dot3.h:75
@ LLDP_DOT3_PMD_AN_ADV_CAP_ASYM_PAUSE
Asymmetric PAUSE for full-duplex links.
Definition: lldp_ext_dot3.h:85
@ LLDP_DOT3_PMD_AN_ADV_CAP_1000BT_FD
1000BASE-T full-duplex mode
Definition: lldp_ext_dot3.h:91
@ LLDP_DOT3_PMD_AN_ADV_CAP_100BT2_FD
100BASE-T2 full-duplex mode
Definition: lldp_ext_dot3.h:83
@ LLDP_DOT3_PMD_AN_ADV_CAP_OTHER
Other or unknown.
Definition: lldp_ext_dot3.h:76
@ LLDP_DOT3_PMD_AN_ADV_CAP_10BT_FD
10BASE-T full-duplex mode
Definition: lldp_ext_dot3.h:78
@ LLDP_DOT3_PMD_AN_ADV_CAP_100BT_HD
100BASE-TX half-duplex mode
Definition: lldp_ext_dot3.h:80
@ LLDP_DOT3_PMD_AN_ADV_CAP_100BT_FD
100BASE-TX full-duplex mode
Definition: lldp_ext_dot3.h:81
@ LLDP_DOT3_PMD_AN_ADV_CAP_1000BX_HD
1000BASE-X, -LX, -SX, -CX half-duplex mode
Definition: lldp_ext_dot3.h:88
@ LLDP_DOT3_PMD_AN_ADV_CAP_10BT_HD
10BASE-T half-duplex mode
Definition: lldp_ext_dot3.h:77
@ LLDP_DOT3_PMD_AN_ADV_CAP_100BT2_HD
100BASE-T2 half-duplex mode
Definition: lldp_ext_dot3.h:82
@ LLDP_DOT3_PMD_AN_ADV_CAP_100BT4
100BASE-T4
Definition: lldp_ext_dot3.h:79
@ LLDP_DOT3_PMD_AN_ADV_CAP_SYM_PAUSE
Symmetric PAUSE for full-duplex links.
Definition: lldp_ext_dot3.h:86
@ LLDP_DOT3_PMD_AN_ADV_CAP_1000BT_HD
1000BASE-T half-duplex mode
Definition: lldp_ext_dot3.h:90
@ LLDP_DOT3_PMD_AN_ADV_CAP_PAUSE
PAUSE for full-duplex links.
Definition: lldp_ext_dot3.h:84
@ LLDP_DOT3_PMD_AN_ADV_CAP_ASYM_SYM_PAUSE
Asymmetric and Symmetric PAUSE for full-duplex links.
Definition: lldp_ext_dot3.h:87
@ LLDP_DOT3_PMD_AN_ADV_CAP_1000BX_FD
1000BASE-X, -LX, -SX, -CX full-duplex mode
Definition: lldp_ext_dot3.h:89
typedef __packed_struct
MAC/PHY Configuration/Status TLV.
LldpDot3PowerPriority
Power priority.
@ LLDP_DOT3_POWER_PRIORITY_HIGH
High.
@ LLDP_DOT3_POWER_PRIORITY_LOW
Low.
@ LLDP_DOT3_POWER_PRIORITY_UNKNOWN
Unknown.
@ LLDP_DOT3_POWER_PRIORITY_CRITICAL
Critical.
uint8_t reserved
LldpDot3PowerClass
power class
@ LLDP_DOT3_POWER_CLASS_4
Class 4 and above PD.
@ LLDP_DOT3_POWER_CLASS_0
Class 0 PD.
@ LLDP_DOT3_POWER_CLASS_3
Class 3 PD.
@ LLDP_DOT3_POWER_CLASS_2
Class 2 PD.
@ LLDP_DOT3_POWER_CLASS_1
Class 1 PD.
uint8_t psePowerPair
LldpDot3PowerViaMdiTlv
LldpDot3MacPhyConfigStatusTlv
uint16_t pdRequestedPower
uint16_t pseAllocatedPowerB
LldpDot3Subtype
IEEE 802.3 subtypes.
Definition: lldp_ext_dot3.h:49
@ LLDP_DOT3_SUBTYPE_POWER_VIA_MDI
Power Via MDI.
Definition: lldp_ext_dot3.h:52
@ LLDP_DOT3_SUBTYPE_LINK_AGGREGATION
Link Aggregation.
Definition: lldp_ext_dot3.h:53
@ LLDP_DOT3_SUBTYPE_POWER_VIA_MDI_MEAS
Power Via MDI Measurements.
Definition: lldp_ext_dot3.h:55
@ LLDP_DOT3_SUBTYPE_MAX_FRAME_SIZE
Maximum Frame Size.
Definition: lldp_ext_dot3.h:54
@ LLDP_DOT3_SUBTYPE_MAC_PHY_CONFIG_STATUS
MAC/PHY Configuration/Status.
Definition: lldp_ext_dot3.h:51
@ LLDP_DOT3_SUBTYPE_RESERVED
Reserved.
Definition: lldp_ext_dot3.h:50
error_t lldpDot3DeleteLocalTlv(LldpAgentContext *context, LldpDot3Subtype subtype)
Remove all IEEE 802.3 specific TLVs with specified subtype.
uint8_t powerType
uint8_t subtype
Definition: lldp_tlv.h:311
TCP/IP stack core.