s32k1_crypto_trng.c
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1 /**
2  * @file s32k1_crypto_trng.c
3  * @brief S32K1 true random number generator
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneCRYPTO Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.4.0
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL CRYPTO_TRACE_LEVEL
33 
34 //Dependencies
35 #include "fsl_device_registers.h"
36 #include "core/crypto.h"
39 #include "debug.h"
40 
41 //Check crypto library configuration
42 #if (S32K1_CRYPTO_TRNG_SUPPORT == ENABLED)
43 
44 //Global variables
45 static uint8_t buffer[16];
46 static size_t index;
47 
48 
49 /**
50  * @brief TRNG module initialization
51  * @return Error code
52  **/
53 
55 {
56  uint32_t status;
57 
58  //Mark the buffer as empty
59  index = sizeof(buffer);
60 
61  //Check for the previous CSEq command to complete
62  while((FTFC->FSTAT & FTFC_FSTAT_CCIF_MASK) == 0)
63  {
64  }
65 
66  //Clear error flags
67  FTFC->FSTAT = FTFC_FSTAT_FPVIOL_MASK | FTFC_FSTAT_ACCERR_MASK;
68 
69  //Start CSEq command
70  CSE_PRAM->RAMn[0].DATA_32 = CSEQ_CMD_INIT_RNG;
71 
72  //Wait for the CSEq command to complete
73  while((FTFC->FSTAT & FTFC_FSTAT_CCIF_MASK) == 0)
74  {
75  }
76 
77  //Retrieve status code
78  status = CSE_PRAM->RAMn[1].DATA_32 >> 16;
79 
80  //Return status code
81  return (status == CSEQ_ERC_NO_ERROR) ? NO_ERROR : ERROR_FAILURE;
82 }
83 
84 
85 /**
86  * @brief Get random data from the TRNG module
87  * @param[out] data Buffer where to store random data
88  * @param[in] length Number of random bytes to generate
89  **/
90 
92 {
93  size_t i;
94  uint32_t temp;
95  uint32_t status;
96 
97  //Initialize status code
98  status = CSEQ_ERC_NO_ERROR;
99 
100  //Acquire exclusive access to the RNG module
102 
103  //Generate random data
104  for(i = 0; i < length && status == CSEQ_ERC_NO_ERROR; i++)
105  {
106  //Generate a new 128-bit random value when necessary
107  if(index >= sizeof(buffer))
108  {
109  //Check for the previous CSEq command to complete
110  while((FTFC->FSTAT & FTFC_FSTAT_CCIF_MASK) == 0)
111  {
112  }
113 
114  //Clear error flags
115  FTFC->FSTAT = FTFC_FSTAT_FPVIOL_MASK | FTFC_FSTAT_ACCERR_MASK;
116 
117  //Start CSEq command
118  CSE_PRAM->RAMn[0].DATA_32 = CSEQ_CMD_RND;
119 
120  //Wait for the CSEq command to complete
121  while((FTFC->FSTAT & FTFC_FSTAT_CCIF_MASK) == 0)
122  {
123  }
124 
125  //Retrieve status code
126  status = CSE_PRAM->RAMn[1].DATA_32 >> 16;
127 
128  //Check status code
129  if(status == CSEQ_ERC_NO_ERROR)
130  {
131  //Save the 128-bit random value
132  temp = CSE_PRAM->RAMn[4].DATA_32;
133  STORE32BE(temp, buffer);
134  temp = CSE_PRAM->RAMn[5].DATA_32;
135  STORE32BE(temp, buffer + 4);
136  temp = CSE_PRAM->RAMn[6].DATA_32;
137  STORE32BE(temp, buffer + 8);
138  temp = CSE_PRAM->RAMn[7].DATA_32;
139  STORE32BE(temp, buffer + 12);
140  }
141 
142  //Rewind to the beginning of the buffer
143  index = 0;
144  }
145 
146  //Extract a random byte
147  data[i] = buffer[index++];
148  }
149 
150  //Release exclusive access to the RNG module
152 
153  //Return status code
154  return (status == CSEQ_ERC_NO_ERROR) ? NO_ERROR : ERROR_FAILURE;
155 }
156 
157 #endif
#define STORE32BE(a, p)
Definition: cpu_endian.h:286
General definitions for cryptographic algorithms.
Debugging facilities.
error_t
Error codes.
Definition: error.h:43
@ NO_ERROR
Success.
Definition: error.h:44
@ ERROR_FAILURE
Generic error code.
Definition: error.h:45
uint8_t data[]
Definition: ethernet.h:222
void osAcquireMutex(OsMutex *mutex)
Acquire ownership of the specified mutex object.
void osReleaseMutex(OsMutex *mutex)
Release ownership of the specified mutex object.
OsMutex s32k1CryptoMutex
Definition: s32k1_crypto.c:41
S32K1 hardware cryptographic accelerator (CSEq)
#define CSEQ_CMD_INIT_RNG
Definition: s32k1_crypto.h:47
#define CSEQ_CMD_RND
Definition: s32k1_crypto.h:49
#define CSEQ_ERC_NO_ERROR
Definition: s32k1_crypto.h:95
error_t trngGetRandomData(uint8_t *data, size_t length)
Get random data from the TRNG module.
error_t trngInit(void)
TRNG module initialization.
S32K1 true random number generator.
uint8_t length
Definition: tcp.h:368