sc598_eth1_driver.h
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1 /**
2  * @file sc598_eth1_driver.h
3  * @brief ADSP-SC598 Ethernet MAC driver (EMAC0 instance)
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2026 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.6.0
29  **/
30 
31 #ifndef _SC598_ETH1_DRIVER_H
32 #define _SC598_ETH1_DRIVER_H
33 
34 //Dependencies
35 #include "core/nic.h"
36 
37 //Number of TX buffers
38 #ifndef SC598_ETH1_TX_BUFFER_COUNT
39  #define SC598_ETH1_TX_BUFFER_COUNT 8
40 #elif (SC598_ETH1_TX_BUFFER_COUNT < 1)
41  #error SC598_ETH1_TX_BUFFER_COUNT parameter is not valid
42 #endif
43 
44 //TX buffer size
45 #ifndef SC598_ETH1_TX_BUFFER_SIZE
46  #define SC598_ETH1_TX_BUFFER_SIZE 1536
47 #elif (SC598_ETH1_TX_BUFFER_SIZE != 1536)
48  #error SC598_ETH1_TX_BUFFER_SIZE parameter is not valid
49 #endif
50 
51 //Number of RX buffers
52 #ifndef SC598_ETH1_RX_BUFFER_COUNT
53  #define SC598_ETH1_RX_BUFFER_COUNT 8
54 #elif (SC598_ETH1_RX_BUFFER_COUNT < 1)
55  #error SC598_ETH1_RX_BUFFER_COUNT parameter is not valid
56 #endif
57 
58 //RX buffer size
59 #ifndef SC598_ETH1_RX_BUFFER_SIZE
60  #define SC598_ETH1_RX_BUFFER_SIZE 1536
61 #elif (SC598_ETH1_RX_BUFFER_SIZE != 1536)
62  #error SC598_ETH1_RX_BUFFER_SIZE parameter is not valid
63 #endif
64 
65 //Ethernet interrupt priority
66 #ifndef SC598_ETH1_IRQ_PRIORITY
67  #define SC598_ETH1_IRQ_PRIORITY 0
68 #elif (SC598_ETH1_IRQ_PRIORITY < 0)
69  #error SC598_ETH1_IRQ_PRIORITY parameter is not valid
70 #endif
71 
72 //Name of the section where to place DMA buffers
73 #ifndef SC598_ETH1_RAM_SECTION
74  #define SC598_ETH1_RAM_SECTION ".l2_uncached_data"
75 #endif
76 
77 //EMAC0 peripheral ID
78 #define EMAC0_SPU_PID 105
79 
80 //Transmit normal descriptor (read format)
81 #define EMAC_TDES0_BUF1AP 0xFFFFFFFF
82 #define EMAC_TDES1_BUF2AP 0xFFFFFFFF
83 #define EMAC_TDES2_IOC 0x80000000
84 #define EMAC_TDES2_TTSE_TMWD 0x40000000
85 #define EMAC_TDES2_B2L 0x3FFF0000
86 #define EMAC_TDES2_VTIR 0x0000C000
87 #define EMAC_TDES2_HL_B1L 0x00003FFF
88 #define EMAC_TDES3_OWN 0x80000000
89 #define EMAC_TDES3_CTXT 0x40000000
90 #define EMAC_TDES3_FD 0x20000000
91 #define EMAC_TDES3_LD 0x10000000
92 #define EMAC_TDES3_CPC 0x0C000000
93 #define EMAC_TDES3_SAIC 0x03800000
94 #define EMAC_TDES3_SLOTNUM_THL 0x00780000
95 #define EMAC_TDES3_TSE 0x00040000
96 #define EMAC_TDES3_CIC 0x00030000
97 #define EMAC_TDES3_FL 0x00007FFF
98 #define EMAC_TDES3_TPL 0w0003FFFF
99 
100 //Transmit normal descriptor (write-back format)
101 #define EMAC_TDES0_TTSL 0xFFFFFFFF
102 #define EMAC_TDES1_TTSH 0xFFFFFFFF
103 #define EMAC_TDES3_OWN 0x80000000
104 #define EMAC_TDES3_CTXT 0x40000000
105 #define EMAC_TDES3_FD 0x20000000
106 #define EMAC_TDES3_LD 0x10000000
107 #define EMAC_TDES3_DE 0x08000000
108 #define EMAC_TDES3_TTSS 0x00020000
109 #define EMAC_TDES3_EUE 0x00010000
110 #define EMAC_TDES3_ES 0x00008000
111 #define EMAC_TDES3_JT 0x00004000
112 #define EMAC_TDES3_FF 0x00002000
113 #define EMAC_TDES3_PCE 0x00001000
114 #define EMAC_TDES3_LOC 0x00000800
115 #define EMAC_TDES3_NC 0x00000400
116 #define EMAC_TDES3_LC 0x00000200
117 #define EMAC_TDES3_EC 0x00000100
118 #define EMAC_TDES3_CC 0x000000F0
119 #define EMAC_TDES3_ED 0x00000008
120 #define EMAC_TDES3_UF 0x00000004
121 #define EMAC_TDES3_DB 0x00000002
122 #define EMAC_TDES3_IHE 0x00000001
123 
124 //Transmit context descriptor
125 #define EMAC_TDES0_TTSL 0xFFFFFFFF
126 #define EMAC_TDES1_TTSH 0xFFFFFFFF
127 #define EMAC_TDES2_IVT 0xFFFF0000
128 #define EMAC_TDES2_MSS 0x00003FFF
129 #define EMAC_TDES3_OWN 0x80000000
130 #define EMAC_TDES3_CTXT 0x40000000
131 #define EMAC_TDES3_OSTC 0x08000000
132 #define EMAC_TDES3_TCMSSV 0x04000000
133 #define EMAC_TDES3_CDE 0x00800000
134 #define EMAC_TDES3_IVTIR 0x000C0000
135 #define EMAC_TDES3_IVLTV 0x00020000
136 #define EMAC_TDES3_VLTV 0x00010000
137 #define EMAC_TDES3_VT 0x0000FFFF
138 
139 //Receive normal descriptor (read format)
140 #define EMAC_RDES0_BUF1AP 0xFFFFFFFF
141 #define EMAC_RDES2_BUF2AP 0xFFFFFFFF
142 #define EMAC_RDES3_OWN 0x80000000
143 #define EMAC_RDES3_IOC 0x40000000
144 #define EMAC_RDES3_BUF2V 0x02000000
145 #define EMAC_RDES3_BUF1V 0x01000000
146 
147 //Receive normal descriptor (write-back format)
148 #define EMAC_RDES0_IVT 0xFFFF0000
149 #define EMAC_RDES0_OVT 0x0000FFFF
150 #define EMAC_RDES1_OPC 0xFFFF0000
151 #define EMAC_RDES1_TD 0x00008000
152 #define EMAC_RDES1_TSA 0x00004000
153 #define EMAC_RDES1_PV 0x00002000
154 #define EMAC_RDES1_PFT 0x00001000
155 #define EMAC_RDES1_PMT 0x00000F00
156 #define EMAC_RDES1_IPCE 0x00000080
157 #define EMAC_RDES1_IPCB 0x00000040
158 #define EMAC_RDES1_IPV6 0x00000020
159 #define EMAC_RDES1_IPV4 0x00000010
160 #define EMAC_RDES1_IPHE 0x00000008
161 #define EMAC_RDES1_PT 0x00000007
162 #define EMAC_RDES2_L3L4FM 0xE0000000
163 #define EMAC_RDES2_L4FM 0x10000000
164 #define EMAC_RDES2_L3FM 0x08000000
165 #define EMAC_RDES2_MADRM 0x07F80000
166 #define EMAC_RDES2_HF 0x00040000
167 #define EMAC_RDES2_DAF_RXPI 0x00020000
168 #define EMAC_RDES2_SAF_RXPD 0x00010000
169 #define EMAC_RDES2_OTS 0x00008000
170 #define EMAC_RDES2_ITS 0x00004000
171 #define EMAC_RDES2_RX_PARSER 0x00003800
172 #define EMAC_RDES2_ARPRN 0x00000400
173 #define EMAC_RDES2_HL 0x000003FF
174 #define EMAC_RDES3_OWN 0x80000000
175 #define EMAC_RDES3_CTXT 0x40000000
176 #define EMAC_RDES3_FD 0x20000000
177 #define EMAC_RDES3_LD 0x10000000
178 #define EMAC_RDES3_RS2V 0x08000000
179 #define EMAC_RDES3_RS1V 0x04000000
180 #define EMAC_RDES3_RS0V 0x02000000
181 #define EMAC_RDES3_CE 0x01000000
182 #define EMAC_RDES3_GP 0x00800000
183 #define EMAC_RDES3_RWT 0x00400000
184 #define EMAC_RDES3_OE 0x00200000
185 #define EMAC_RDES3_RE 0x00100000
186 #define EMAC_RDES3_DE 0x00080000
187 #define EMAC_RDES3_LT 0x00070000
188 #define EMAC_RDES3_ES 0x00008000
189 #define EMAC_RDES3_PL 0x00007FFF
190 
191 //Receive context descriptor
192 #define EMAC_RDES0_RTSL 0xFFFFFFFF
193 #define EMAC_RDES1_RTSH 0xFFFFFFFF
194 #define EMAC_RDES3_OWN 0x80000000
195 #define EMAC_RDES3_CTXT 0x40000000
196 
197 //C++ guard
198 #ifdef __cplusplus
199 extern "C" {
200 #endif
201 
202 
203 /**
204  * @brief Transmit descriptor
205  **/
206 
207 typedef struct
208 {
209  uint32_t tdes0;
210  uint32_t tdes1;
211  uint32_t tdes2;
212  uint32_t tdes3;
214 
215 
216 /**
217  * @brief Receive descriptor
218  **/
219 
220 typedef struct
221 {
222  uint32_t rdes0;
223  uint32_t rdes1;
224  uint32_t rdes2;
225  uint32_t rdes3;
227 
228 
229 //ADSP-SC598 Ethernet MAC driver (EMAC0 instance)
230 extern const NicDriver sc598Eth1Driver;
231 
232 //ADSP-SC598 Ethernet MAC related functions
234 void sc598Eth1InitGpio(NetInterface *interface);
235 void sc598Eth1ResetPhy(NetInterface *interface);
236 void sc598Eth1InitDmaDesc(NetInterface *interface);
237 
238 void sc598Eth1Tick(NetInterface *interface);
239 
240 void sc598Eth1EnableIrq(NetInterface *interface);
241 void sc598Eth1DisableIrq(NetInterface *interface);
242 void sc598Eth1IrqHandler(uint32_t id, void *param);
243 void sc598Eth1EventHandler(NetInterface *interface);
244 
246  const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary);
247 
249 
252 
253 void sc598Eth1WritePhyReg(uint8_t opcode, uint8_t phyAddr,
254  uint8_t regAddr, uint16_t data);
255 
256 uint16_t sc598Eth1ReadPhyReg(uint8_t opcode, uint8_t phyAddr,
257  uint8_t regAddr);
258 
259 uint32_t sc598Eth1CalcCrc(const void *data, size_t length);
260 
261 //C++ guard
262 #ifdef __cplusplus
263 }
264 #endif
265 
266 #endif
void sc598Eth1InitDmaDesc(NetInterface *interface)
Initialize DMA descriptor lists.
uint8_t opcode
Definition: dns_common.h:191
error_t sc598Eth1UpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
Receive descriptor.
void sc598Eth1EventHandler(NetInterface *interface)
ADSP-SC598 Ethernet MAC event handler.
void sc598Eth1EnableIrq(NetInterface *interface)
Enable interrupts.
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:89
uint8_t data[]
Definition: ethernet.h:224
error_t sc598Eth1UpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
uint32_t sc598Eth1CalcCrc(const void *data, size_t length)
CRC calculation.
void sc598Eth1IrqHandler(uint32_t id, void *param)
ADSP-SC598 Ethernet MAC interrupt service routine.
void sc598Eth1InitGpio(NetInterface *interface)
GPIO configuration.
Transmit descriptor.
error_t sc598Eth1Init(NetInterface *interface)
ADSP-SC598 Ethernet MAC initialization.
void sc598Eth1ResetPhy(NetInterface *interface)
Reset PHY transceiver.
error_t
Error codes.
Definition: error.h:43
void sc598Eth1WritePhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
#define NetInterface
Definition: net.h:40
#define NetTxAncillary
Definition: net_misc.h:36
uint8_t length
Definition: tcp.h:375
error_t sc598Eth1SendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary)
Send a packet.
uint16_t sc598Eth1ReadPhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
void sc598Eth1DisableIrq(NetInterface *interface)
Disable interrupts.
uint16_t regAddr
Network interface controller abstraction layer.
const NicDriver sc598Eth1Driver
ADSP-SC598 Ethernet MAC driver (EMAC0 instance)
error_t sc598Eth1ReceivePacket(NetInterface *interface)
Receive a packet.
NIC driver.
Definition: nic.h:286
void sc598Eth1Tick(NetInterface *interface)
ADSP-SC598 Ethernet MAC timer handler.