dp83825_driver.c
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1 /**
2  * @file dp83825_driver.c
3  * @brief DP83825 Ethernet PHY driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2024 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.4.0
29  **/
30 
31 //Switch to the appropriate trace level
32 #define TRACE_LEVEL NIC_TRACE_LEVEL
33 
34 //Dependencies
35 #include "core/net.h"
37 #include "debug.h"
38 
39 
40 /**
41  * @brief DP83825 Ethernet PHY driver
42  **/
43 
45 {
51 };
52 
53 
54 /**
55  * @brief DP83825 PHY transceiver initialization
56  * @param[in] interface Underlying network interface
57  * @return Error code
58  **/
59 
61 {
62  uint16_t value;
63 
64  //Debug message
65  TRACE_INFO("Initializing DP83825...\r\n");
66 
67  //Undefined PHY address?
68  if(interface->phyAddr >= 32)
69  {
70  //Use the default address
71  interface->phyAddr = DP83825_PHY_ADDR;
72  }
73 
74  //Initialize serial management interface
75  if(interface->smiDriver != NULL)
76  {
77  interface->smiDriver->init();
78  }
79 
80  //Initialize external interrupt line driver
81  if(interface->extIntDriver != NULL)
82  {
83  interface->extIntDriver->init();
84  }
85 
86  //Reset PHY transceiver
88 
89  //Wait for the reset to complete
91  {
92  }
93 
94  //Dump PHY registers for debugging purpose
95  dp83825DumpPhyReg(interface);
96 
97  //Configure PWR_DOWN/INT pin as an interrupt output
101 
102  //The PHY will generate interrupts when link status changes are detected
104 
105  //Perform custom configuration
106  dp83825InitHook(interface);
107 
108  //Force the TCP/IP stack to poll the link state at startup
109  interface->phyEvent = TRUE;
110  //Notify the TCP/IP stack of the event
112 
113  //Successful initialization
114  return NO_ERROR;
115 }
116 
117 
118 /**
119  * @brief DP83825 custom configuration
120  * @param[in] interface Underlying network interface
121  **/
122 
123 __weak_func void dp83825InitHook(NetInterface *interface)
124 {
125 }
126 
127 
128 /**
129  * @brief DP83825 timer handler
130  * @param[in] interface Underlying network interface
131  **/
132 
133 void dp83825Tick(NetInterface *interface)
134 {
135  uint16_t value;
136  bool_t linkState;
137 
138  //No external interrupt line driver?
139  if(interface->extIntDriver == NULL)
140  {
141  //Read basic status register
142  value = dp83825ReadPhyReg(interface, DP83825_BMSR);
143  //Retrieve current link state
144  linkState = (value & DP83825_BMSR_LINK_STATUS) ? TRUE : FALSE;
145 
146  //Link up event?
147  if(linkState && !interface->linkState)
148  {
149  //Set event flag
150  interface->phyEvent = TRUE;
151  //Notify the TCP/IP stack of the event
153  }
154  //Link down event?
155  else if(!linkState && interface->linkState)
156  {
157  //Set event flag
158  interface->phyEvent = TRUE;
159  //Notify the TCP/IP stack of the event
161  }
162  }
163 }
164 
165 
166 /**
167  * @brief Enable interrupts
168  * @param[in] interface Underlying network interface
169  **/
170 
172 {
173  //Enable PHY transceiver interrupts
174  if(interface->extIntDriver != NULL)
175  {
176  interface->extIntDriver->enableIrq();
177  }
178 }
179 
180 
181 /**
182  * @brief Disable interrupts
183  * @param[in] interface Underlying network interface
184  **/
185 
187 {
188  //Disable PHY transceiver interrupts
189  if(interface->extIntDriver != NULL)
190  {
191  interface->extIntDriver->disableIrq();
192  }
193 }
194 
195 
196 /**
197  * @brief DP83825 event handler
198  * @param[in] interface Underlying network interface
199  **/
200 
202 {
203  uint16_t status;
204 
205  //Read status register to acknowledge the interrupt
206  status = dp83825ReadPhyReg(interface, DP83825_MISR1);
207 
208  //Link status change?
209  if((status & DP83825_MISR1_LINK_INT) != 0)
210  {
211  //Read PHY status register
212  status = dp83825ReadPhyReg(interface, DP83825_PHYSTS);
213 
214  //Link is up?
215  if((status & DP83825_PHYSTS_LINK_STATUS) != 0)
216  {
217  //Check current speed
218  if((status & DP83825_PHYSTS_SPEED_STATUS) != 0)
219  {
220  interface->linkSpeed = NIC_LINK_SPEED_10MBPS;
221  }
222  else
223  {
224  interface->linkSpeed = NIC_LINK_SPEED_100MBPS;
225  }
226 
227  //Check duplex mode
228  if((status & DP83825_PHYSTS_DUPLEX_STATUS) != 0)
229  {
230  interface->duplexMode = NIC_FULL_DUPLEX_MODE;
231  }
232  else
233  {
234  interface->duplexMode = NIC_HALF_DUPLEX_MODE;
235  }
236 
237  //Update link state
238  interface->linkState = TRUE;
239 
240  //Adjust MAC configuration parameters for proper operation
241  interface->nicDriver->updateMacConfig(interface);
242  }
243  else
244  {
245  //Update link state
246  interface->linkState = FALSE;
247  }
248 
249  //Process link state change event
250  nicNotifyLinkChange(interface);
251  }
252 }
253 
254 
255 /**
256  * @brief Write PHY register
257  * @param[in] interface Underlying network interface
258  * @param[in] address PHY register address
259  * @param[in] data Register value
260  **/
261 
262 void dp83825WritePhyReg(NetInterface *interface, uint8_t address,
263  uint16_t data)
264 {
265  //Write the specified PHY register
266  if(interface->smiDriver != NULL)
267  {
268  interface->smiDriver->writePhyReg(SMI_OPCODE_WRITE,
269  interface->phyAddr, address, data);
270  }
271  else
272  {
273  interface->nicDriver->writePhyReg(SMI_OPCODE_WRITE,
274  interface->phyAddr, address, data);
275  }
276 }
277 
278 
279 /**
280  * @brief Read PHY register
281  * @param[in] interface Underlying network interface
282  * @param[in] address PHY register address
283  * @return Register value
284  **/
285 
286 uint16_t dp83825ReadPhyReg(NetInterface *interface, uint8_t address)
287 {
288  uint16_t data;
289 
290  //Read the specified PHY register
291  if(interface->smiDriver != NULL)
292  {
293  data = interface->smiDriver->readPhyReg(SMI_OPCODE_READ,
294  interface->phyAddr, address);
295  }
296  else
297  {
298  data = interface->nicDriver->readPhyReg(SMI_OPCODE_READ,
299  interface->phyAddr, address);
300  }
301 
302  //Return the value of the PHY register
303  return data;
304 }
305 
306 
307 /**
308  * @brief Dump PHY registers for debugging purpose
309  * @param[in] interface Underlying network interface
310  **/
311 
313 {
314  uint8_t i;
315 
316  //Loop through PHY registers
317  for(i = 0; i < 32; i++)
318  {
319  //Display current PHY register
320  TRACE_DEBUG("%02" PRIu8 ": 0x%04" PRIX16 "\r\n", i,
321  dp83825ReadPhyReg(interface, i));
322  }
323 
324  //Terminate with a line feed
325  TRACE_DEBUG("\r\n");
326 }
327 
328 
329 /**
330  * @brief Write MMD register
331  * @param[in] interface Underlying network interface
332  * @param[in] devAddr Device address
333  * @param[in] regAddr Register address
334  * @param[in] data MMD register value
335  **/
336 
337 void dp83825WriteMmdReg(NetInterface *interface, uint8_t devAddr,
338  uint16_t regAddr, uint16_t data)
339 {
340  //Select register operation
343 
344  //Write MMD register address
346 
347  //Select data operation
350 
351  //Write the content of the MMD register
353 }
354 
355 
356 /**
357  * @brief Read MMD register
358  * @param[in] interface Underlying network interface
359  * @param[in] devAddr Device address
360  * @param[in] regAddr Register address
361  * @return MMD register value
362  **/
363 
364 uint16_t dp83825ReadMmdReg(NetInterface *interface, uint8_t devAddr,
365  uint16_t regAddr)
366 {
367  //Select register operation
370 
371  //Write MMD register address
373 
374  //Select data operation
377 
378  //Read the content of the MMD register
379  return dp83825ReadPhyReg(interface, DP83825_ADDAR);
380 }
int bool_t
Definition: compiler_port.h:53
Debugging facilities.
#define TRACE_DEBUG(...)
Definition: debug.h:107
#define TRACE_INFO(...)
Definition: debug.h:95
void dp83825WriteMmdReg(NetInterface *interface, uint8_t devAddr, uint16_t regAddr, uint16_t data)
Write MMD register.
void dp83825EventHandler(NetInterface *interface)
DP83825 event handler.
void dp83825Tick(NetInterface *interface)
DP83825 timer handler.
uint16_t dp83825ReadMmdReg(NetInterface *interface, uint8_t devAddr, uint16_t regAddr)
Read MMD register.
void dp83825WritePhyReg(NetInterface *interface, uint8_t address, uint16_t data)
Write PHY register.
__weak_func void dp83825InitHook(NetInterface *interface)
DP83825 custom configuration.
void dp83825DumpPhyReg(NetInterface *interface)
Dump PHY registers for debugging purpose.
uint16_t dp83825ReadPhyReg(NetInterface *interface, uint8_t address)
Read PHY register.
void dp83825EnableIrq(NetInterface *interface)
Enable interrupts.
void dp83825DisableIrq(NetInterface *interface)
Disable interrupts.
error_t dp83825Init(NetInterface *interface)
DP83825 PHY transceiver initialization.
const PhyDriver dp83825PhyDriver
DP83825 Ethernet PHY driver.
DP83825 Ethernet PHY driver.
#define DP83825_PHYSTS
#define DP83825_MISR1_LINK_INT_EN
#define DP83825_PHYSCR_INT_OE
#define DP83825_PHY_ADDR
#define DP83825_PHYSTS_SPEED_STATUS
#define DP83825_BMCR
#define DP83825_ADDAR
#define DP83825_MISR1
#define DP83825_PHYSTS_LINK_STATUS
#define DP83825_REGCR_CMD_DATA_NO_POST_INC
#define DP83825_PHYSTS_DUPLEX_STATUS
#define DP83825_BMCR_RESET
#define DP83825_REGCR_DEVAD
#define DP83825_MISR1_LINK_INT
#define DP83825_REGCR_CMD_ADDR
#define DP83825_BMSR
#define DP83825_PHYSCR
#define DP83825_REGCR
#define DP83825_BMSR_LINK_STATUS
#define DP83825_PHYSCR_INT_EN
error_t
Error codes.
Definition: error.h:43
@ NO_ERROR
Success.
Definition: error.h:44
uint8_t data[]
Definition: ethernet.h:222
Ipv6Addr address[]
Definition: ipv6.h:316
uint16_t regAddr
TCP/IP stack core.
#define NetInterface
Definition: net.h:36
#define netEvent
Definition: net_legacy.h:196
void nicNotifyLinkChange(NetInterface *interface)
Process link state change notification.
Definition: nic.c:548
#define SMI_OPCODE_WRITE
Definition: nic.h:66
#define SMI_OPCODE_READ
Definition: nic.h:67
@ NIC_FULL_DUPLEX_MODE
Definition: nic.h:125
@ NIC_HALF_DUPLEX_MODE
Definition: nic.h:124
@ NIC_LINK_SPEED_100MBPS
Definition: nic.h:112
@ NIC_LINK_SPEED_10MBPS
Definition: nic.h:111
#define TRUE
Definition: os_port.h:50
#define FALSE
Definition: os_port.h:46
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
Ethernet PHY driver.
Definition: nic.h:308
uint8_t value[]
Definition: tcp.h:369