sam9x60_eth1_driver.h
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1 /**
2  * @file sam9x60_eth1_driver.h
3  * @brief SAM9X60 Ethernet MAC driver (EMAC0 instance)
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2023 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.3.2
29  **/
30 
31 #ifndef _SAM9X60_ETH1_DRIVER_H
32 #define _SAM9X60_ETH1_DRIVER_H
33 
34 //Number of TX buffers
35 #ifndef SAM9X60_ETH1_TX_BUFFER_COUNT
36  #define SAM9X60_ETH1_TX_BUFFER_COUNT 8
37 #elif (SAM9X60_ETH1_TX_BUFFER_COUNT < 1)
38  #error SAM9X60_ETH1_TX_BUFFER_COUNT parameter is not valid
39 #endif
40 
41 //TX buffer size
42 #ifndef SAM9X60_ETH1_TX_BUFFER_SIZE
43  #define SAM9X60_ETH1_TX_BUFFER_SIZE 1536
44 #elif (SAM9X60_ETH1_TX_BUFFER_SIZE != 1536)
45  #error SAM9X60_ETH1_TX_BUFFER_SIZE parameter is not valid
46 #endif
47 
48 //Number of RX buffers
49 #ifndef SAM9X60_ETH1_RX_BUFFER_COUNT
50  #define SAM9X60_ETH1_RX_BUFFER_COUNT 96
51 #elif (SAM9X60_ETH1_RX_BUFFER_COUNT < 12)
52  #error SAM9X60_ETH1_RX_BUFFER_COUNT parameter is not valid
53 #endif
54 
55 //RX buffer size
56 #ifndef SAM9X60_ETH1_RX_BUFFER_SIZE
57  #define SAM9X60_ETH1_RX_BUFFER_SIZE 128
58 #elif (SAM9X60_ETH1_RX_BUFFER_SIZE != 128)
59  #error SAM9X60_ETH1_RX_BUFFER_SIZE parameter is not valid
60 #endif
61 
62 //Ethernet interrupt priority
63 #ifndef SAM9X60_ETH1_IRQ_PRIORITY
64  #define SAM9X60_ETH1_IRQ_PRIORITY 0
65 #elif (SAM9X60_ETH1_IRQ_PRIORITY < 0)
66  #error SAM9X60_ETH1_IRQ_PRIORITY parameter is not valid
67 #endif
68 
69 //Name of the section where to place DMA buffers
70 #ifndef SAM9X60_ETH1_RAM_SECTION
71  #define SAM9X60_ETH1_RAM_SECTION ".region_nocache"
72 #endif
73 
74 //RMII signals
75 #define EMAC0_RMII_MASK (PIO_PB10A_E0_TX1 | PIO_PB9A_E0_TX0 | \
76  PIO_PB7A_E0_TXEN | PIO_PB6A_E0_MDC | PIO_PB5A_E0_MDIO | PIO_PB4A_E0_TXCK | \
77  PIO_PB3A_E0_RXDV | PIO_PB2A_E0_RXER | PIO_PB1A_E0_RX1 | PIO_PB0A_E0_RX0)
78 
79 //TX buffer descriptor flags
80 #define EMAC_TX_USED 0x80000000
81 #define EMAC_TX_WRAP 0x40000000
82 #define EMAC_TX_ERROR 0x20000000
83 #define EMAC_TX_UNDERRUN 0x10000000
84 #define EMAC_TX_EXHAUSTED 0x08000000
85 #define EMAC_TX_NO_CRC 0x00010000
86 #define EMAC_TX_LAST 0x00008000
87 #define EMAC_TX_LENGTH 0x000007FF
88 
89 //RX buffer descriptor flags
90 #define EMAC_RX_ADDRESS 0xFFFFFFFC
91 #define EMAC_RX_WRAP 0x00000002
92 #define EMAC_RX_OWNERSHIP 0x00000001
93 #define EMAC_RX_BROADCAST 0x80000000
94 #define EMAC_RX_MULTICAST_HASH 0x40000000
95 #define EMAC_RX_UNICAST_HASH 0x20000000
96 #define EMAC_RX_EXT_ADDR 0x10000000
97 #define EMAC_RX_SAR1 0x04000000
98 #define EMAC_RX_SAR2 0x02000000
99 #define EMAC_RX_SAR3 0x01000000
100 #define EMAC_RX_SAR4 0x00800000
101 #define EMAC_RX_TYPE_ID 0x00400000
102 #define EMAC_RX_VLAN_TAG 0x00200000
103 #define EMAC_RX_PRIORITY_TAG 0x00100000
104 #define EMAC_RX_VLAN_PRIORITY 0x000E0000
105 #define EMAC_RX_CFI 0x00010000
106 #define EMAC_RX_EOF 0x00008000
107 #define EMAC_RX_SOF 0x00004000
108 #define EMAC_RX_OFFSET 0x00003000
109 #define EMAC_RX_LENGTH 0x00000FFF
110 
111 //C++ guard
112 #ifdef __cplusplus
113 extern "C" {
114 #endif
115 
116 
117 /**
118  * @brief Transmit buffer descriptor
119  **/
120 
121 typedef struct
122 {
123  uint32_t address;
124  uint32_t status;
126 
127 
128 /**
129  * @brief Receive buffer descriptor
130  **/
131 
132 typedef struct
133 {
134  uint32_t address;
135  uint32_t status;
137 
138 
139 //SAM9X60 Ethernet MAC driver (EMAC0 instance)
140 extern const NicDriver sam9x60Eth1Driver;
141 
142 //SAM9X60 Ethernet MAC related functions
144 void sam9x60Eth1InitGpio(NetInterface *interface);
145 void sam9x60Eth1InitBufferDesc(NetInterface *interface);
146 
147 void sam9x60Eth1Tick(NetInterface *interface);
148 
149 void sam9x60Eth1EnableIrq(NetInterface *interface);
150 void sam9x60Eth1DisableIrq(NetInterface *interface);
151 void sam9x60Eth1IrqHandler(void);
152 void sam9x60Eth1EventHandler(NetInterface *interface);
153 
155  const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary);
156 
158 
161 
162 void sam9x60Eth1WritePhyReg(uint8_t opcode, uint8_t phyAddr,
163  uint8_t regAddr, uint16_t data);
164 
165 uint16_t sam9x60Eth1ReadPhyReg(uint8_t opcode, uint8_t phyAddr,
166  uint8_t regAddr);
167 
168 //Wrapper for the interrupt service routine
169 void emacIrqWrapper(void);
170 
171 //C++ guard
172 #ifdef __cplusplus
173 }
174 #endif
175 
176 #endif
uint8_t opcode
Definition: dns_common.h:186
error_t
Error codes.
Definition: error.h:43
uint8_t data[]
Definition: ethernet.h:220
uint16_t regAddr
#define NetInterface
Definition: net.h:36
#define NetTxAncillary
Definition: net_misc.h:36
void sam9x60Eth1WritePhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
void sam9x60Eth1InitGpio(NetInterface *interface)
GPIO configuration.
void sam9x60Eth1DisableIrq(NetInterface *interface)
Disable interrupts.
const NicDriver sam9x60Eth1Driver
SAM9X60 Ethernet MAC driver (EMAC0 instance)
void emacIrqWrapper(void)
error_t sam9x60Eth1UpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
error_t sam9x60Eth1UpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
void sam9x60Eth1EnableIrq(NetInterface *interface)
Enable interrupts.
void sam9x60Eth1IrqHandler(void)
SAM9X60 Ethernet MAC interrupt service routine.
error_t sam9x60Eth1ReceivePacket(NetInterface *interface)
Receive a packet.
void sam9x60Eth1EventHandler(NetInterface *interface)
SAM9X60 Ethernet MAC event handler.
void sam9x60Eth1Tick(NetInterface *interface)
SAM9X60 Ethernet MAC timer handler.
error_t sam9x60Eth1Init(NetInterface *interface)
SAM9X60 Ethernet MAC initialization.
uint16_t sam9x60Eth1ReadPhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
void sam9x60Eth1InitBufferDesc(NetInterface *interface)
Initialize buffer descriptors.
error_t sam9x60Eth1SendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary)
Send a packet.
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:89
NIC driver.
Definition: nic.h:283
Receive buffer descriptor.
Transmit buffer descriptor.