ADSP-SC594 Ethernet MAC driver (EMAC0 instance) More...

#include "core/nic.h"

Data Structures
struct	Sc594Eth1TxDmaDesc
	Enhanced TX DMA descriptor. More...

struct	Sc594Eth1RxDmaDesc
	Enhanced RX DMA descriptor. More...

Macros
#define	SC594_ETH1_TX_BUFFER_COUNT 8

#define	SC594_ETH1_TX_BUFFER_SIZE 1536

#define	SC594_ETH1_RX_BUFFER_COUNT 8

#define	SC594_ETH1_RX_BUFFER_SIZE 1536

#define	SC594_ETH1_IRQ_PRIORITY 0

#define	SC594_ETH1_RAM_SECTION ".l2_uncached_data"

#define	EMAC0_SPU_PID 105

#define	ENUM_EMAC_SMI_ADDR_CR_DIV42 (0 << BITP_EMAC_SMI_ADDR_CR)

#define	ENUM_EMAC_SMI_ADDR_CR_DIV62 (1 << BITP_EMAC_SMI_ADDR_CR)

#define	ENUM_EMAC_SMI_ADDR_CR_DIV16 (2 << BITP_EMAC_SMI_ADDR_CR)

#define	ENUM_EMAC_SMI_ADDR_CR_DIV26 (3 << BITP_EMAC_SMI_ADDR_CR)

#define	ENUM_EMAC_DMA_BUSMODE_RPBL_1 (1 << BITP_EMAC_DMA0_BUSMODE_RPBL)

#define	ENUM_EMAC_DMA_BUSMODE_RPBL_2 (2 << BITP_EMAC_DMA0_BUSMODE_RPBL)

#define	ENUM_EMAC_DMA_BUSMODE_RPBL_4 (4 << BITP_EMAC_DMA0_BUSMODE_RPBL)

#define	ENUM_EMAC_DMA_BUSMODE_RPBL_8 (8 << BITP_EMAC_DMA0_BUSMODE_RPBL)

#define	ENUM_EMAC_DMA_BUSMODE_RPBL_16 (16 << BITP_EMAC_DMA0_BUSMODE_RPBL)

#define	ENUM_EMAC_DMA_BUSMODE_RPBL_32 (32 << BITP_EMAC_DMA0_BUSMODE_RPBL)

#define	ENUM_EMAC_DMA_BUSMODE_PBL_1 (1 << BITP_EMAC_DMA0_BUSMODE_PBL)

#define	ENUM_EMAC_DMA_BUSMODE_PBL_2 (2 << BITP_EMAC_DMA0_BUSMODE_PBL)

#define	ENUM_EMAC_DMA_BUSMODE_PBL_4 (4 << BITP_EMAC_DMA0_BUSMODE_PBL)

#define	ENUM_EMAC_DMA_BUSMODE_PBL_8 (8 << BITP_EMAC_DMA0_BUSMODE_PBL)

#define	ENUM_EMAC_DMA_BUSMODE_PBL_16 (16 << BITP_EMAC_DMA0_BUSMODE_PBL)

#define	ENUM_EMAC_DMA_BUSMODE_PBL_32 (32 << BITP_EMAC_DMA0_BUSMODE_PBL)

#define	EMAC_TDES0_OWN 0x80000000

#define	EMAC_TDES0_IC 0x40000000

#define	EMAC_TDES0_LS 0x20000000

#define	EMAC_TDES0_FS 0x10000000

#define	EMAC_TDES0_DC 0x08000000

#define	EMAC_TDES0_DP 0x04000000

#define	EMAC_TDES0_TTSE 0x02000000

#define	EMAC_TDES0_CRCR 0x01000000

#define	EMAC_TDES0_CIC 0x00C00000

#define	EMAC_TDES0_TER 0x00200000

#define	EMAC_TDES0_TCH 0x00100000

#define	EMAC_TDES0_VLIC 0x000C0000

#define	EMAC_TDES0_TTSS 0x00020000

#define	EMAC_TDES0_IHE 0x00010000

#define	EMAC_TDES0_ES 0x00008000

#define	EMAC_TDES0_JT 0x00004000

#define	EMAC_TDES0_FF 0x00002000

#define	EMAC_TDES0_IPE 0x00001000

#define	EMAC_TDES0_LCA 0x00000800

#define	EMAC_TDES0_NC 0x00000400

#define	EMAC_TDES0_LCO 0x00000200

#define	EMAC_TDES0_EC 0x00000100

#define	EMAC_TDES0_VF 0x00000080

#define	EMAC_TDES0_CC 0x00000078

#define	EMAC_TDES0_ED 0x00000004

#define	EMAC_TDES0_UF 0x00000002

#define	EMAC_TDES0_DB 0x00000001

#define	EMAC_TDES1_SAIC 0xE0000000

#define	EMAC_TDES1_TBS2 0x1FFF0000

#define	EMAC_TDES1_TBS1 0x00001FFF

#define	EMAC_TDES2_TBAP1 0xFFFFFFFF

#define	EMAC_TDES3_TBAP2 0xFFFFFFFF

#define	EMAC_TDES6_TTSL 0xFFFFFFFF

#define	EMAC_TDES7_TTSH 0xFFFFFFFF

#define	EMAC_RDES0_OWN 0x80000000

#define	EMAC_RDES0_AFM 0x40000000

#define	EMAC_RDES0_FL 0x3FFF0000

#define	EMAC_RDES0_ES 0x00008000

#define	EMAC_RDES0_DE 0x00004000

#define	EMAC_RDES0_SAF 0x00002000

#define	EMAC_RDES0_LE 0x00001000

#define	EMAC_RDES0_OE 0x00000800

#define	EMAC_RDES0_VLAN 0x00000400

#define	EMAC_RDES0_FS 0x00000200

#define	EMAC_RDES0_LS 0x00000100

#define	EMAC_RDES0_TSV 0x00000080

#define	EMAC_RDES0_LCO 0x00000040

#define	EMAC_RDES0_FT 0x00000020

#define	EMAC_RDES0_RWT 0x00000010

#define	EMAC_RDES0_RE 0x00000008

#define	EMAC_RDES0_DBE 0x00000004

#define	EMAC_RDES0_CE 0x00000002

#define	EMAC_RDES0_ESA 0x00000001

#define	EMAC_RDES1_DIC 0x80000000

#define	EMAC_RDES1_RBS2 0x1FFF0000

#define	EMAC_RDES1_RER 0x00008000

#define	EMAC_RDES1_RCH 0x00004000

#define	EMAC_RDES1_RBS1 0x00001FFF

#define	EMAC_RDES2_RBAP1 0xFFFFFFFF

#define	EMAC_RDES3_RBAP2 0xFFFFFFFF

#define	EMAC_RDES4_L4FM 0x02000000

#define	EMAC_RDES4_L3FM 0x01000000

#define	EMAC_RDES4_VLANTP 0x001C0000

#define	EMAC_RDES4_AVTPR 0x00020000

#define	EMAC_RDES4_AVPR 0x00010000

#define	EMAC_RDES4_TD 0x00004000

#define	EMAC_RDES4_PV 0x00002000

#define	EMAC_RDES4_PFT 0x00001000

#define	EMAC_RDES4_PMT 0x00000F00

#define	EMAC_RDES4_IPV6PR 0x00000080

#define	EMAC_RDES4_IPV4PR 0x00000040

#define	EMAC_RDES4_IPCB 0x00000020

#define	EMAC_RDES4_IPPE 0x00000010

#define	EMAC_RDES4_IPHE 0x00000008

#define	EMAC_RDES4_IPPT 0x00000007

#define	EMAC_RDES6_RTSL 0xFFFFFFFF

#define	EMAC_RDES7_RTSH 0xFFFFFFFF

Functions
error_t	sc594Eth1Init (NetInterface *interface)
	ADSP-SC594 Ethernet MAC initialization. More...

void	sc594Eth1InitGpio (NetInterface *interface)
	GPIO configuration. More...

void	sc594Eth1ResetPhy (NetInterface *interface)
	Reset PHY transceiver. More...

void	sc594Eth1InitDmaDesc (NetInterface *interface)
	Initialize DMA descriptor lists. More...

void	sc594Eth1Tick (NetInterface *interface)
	ADSP-SC594 Ethernet MAC timer handler. More...

void	sc594Eth1EnableIrq (NetInterface *interface)
	Enable interrupts. More...

void	sc594Eth1DisableIrq (NetInterface *interface)
	Disable interrupts. More...

void	sc594Eth1IrqHandler (uint32_t id, void *param)
	ADSP-SC594 Ethernet MAC interrupt service routine. More...

void	sc594Eth1EventHandler (NetInterface *interface)
	ADSP-SC594 Ethernet MAC event handler. More...

error_t	sc594Eth1SendPacket (NetInterface interface, const NetBuffer buffer, size_t offset, NetTxAncillary *ancillary)
	Send a packet. More...

error_t	sc594Eth1ReceivePacket (NetInterface *interface)
	Receive a packet. More...

error_t	sc594Eth1UpdateMacAddrFilter (NetInterface *interface)
	Configure MAC address filtering. More...

error_t	sc594Eth1UpdateMacConfig (NetInterface *interface)
	Adjust MAC configuration parameters for proper operation. More...

void	sc594Eth1WritePhyReg (uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
	Write PHY register. More...

uint16_t	sc594Eth1ReadPhyReg (uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
	Read PHY register. More...

uint32_t	sc594Eth1CalcCrc (const void *data, size_t length)
	CRC calculation. More...

Variables
const NicDriver	sc594Eth1Driver
	ADSP-SC594 Ethernet MAC driver (EMAC0 instance) More...

Detailed Description

ADSP-SC594 Ethernet MAC driver (EMAC0 instance)

License

SPDX-License-Identifier: GPL-2.0-or-later

This file is part of CycloneTCP Open.

This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

Author: Oryx Embedded SARL (www.oryx-embedded.com)

Version: 2.6.0

Definition in file sc594_eth1_driver.h.

Macro Definition Documentation

◆ EMAC0_SPU_PID

#define EMAC0_SPU_PID 105

Definition at line 78 of file sc594_eth1_driver.h.

◆ EMAC_RDES0_AFM

#define EMAC_RDES0_AFM 0x40000000

Definition at line 139 of file sc594_eth1_driver.h.

◆ EMAC_RDES0_CE

#define EMAC_RDES0_CE 0x00000002

Definition at line 155 of file sc594_eth1_driver.h.

◆ EMAC_RDES0_DBE

#define EMAC_RDES0_DBE 0x00000004

Definition at line 154 of file sc594_eth1_driver.h.

◆ EMAC_RDES0_DE

#define EMAC_RDES0_DE 0x00004000

Definition at line 142 of file sc594_eth1_driver.h.

◆ EMAC_RDES0_ES

#define EMAC_RDES0_ES 0x00008000

Definition at line 141 of file sc594_eth1_driver.h.

◆ EMAC_RDES0_ESA

#define EMAC_RDES0_ESA 0x00000001

Definition at line 156 of file sc594_eth1_driver.h.

◆ EMAC_RDES0_FL

#define EMAC_RDES0_FL 0x3FFF0000

Definition at line 140 of file sc594_eth1_driver.h.

◆ EMAC_RDES0_FS

#define EMAC_RDES0_FS 0x00000200

Definition at line 147 of file sc594_eth1_driver.h.

◆ EMAC_RDES0_FT

#define EMAC_RDES0_FT 0x00000020

Definition at line 151 of file sc594_eth1_driver.h.

◆ EMAC_RDES0_LCO

#define EMAC_RDES0_LCO 0x00000040

Definition at line 150 of file sc594_eth1_driver.h.

◆ EMAC_RDES0_LE

#define EMAC_RDES0_LE 0x00001000

Definition at line 144 of file sc594_eth1_driver.h.

◆ EMAC_RDES0_LS

#define EMAC_RDES0_LS 0x00000100

Definition at line 148 of file sc594_eth1_driver.h.

◆ EMAC_RDES0_OE

#define EMAC_RDES0_OE 0x00000800

Definition at line 145 of file sc594_eth1_driver.h.

◆ EMAC_RDES0_OWN

#define EMAC_RDES0_OWN 0x80000000

Definition at line 138 of file sc594_eth1_driver.h.

◆ EMAC_RDES0_RE

#define EMAC_RDES0_RE 0x00000008

Definition at line 153 of file sc594_eth1_driver.h.

◆ EMAC_RDES0_RWT

#define EMAC_RDES0_RWT 0x00000010

Definition at line 152 of file sc594_eth1_driver.h.

◆ EMAC_RDES0_SAF

#define EMAC_RDES0_SAF 0x00002000

Definition at line 143 of file sc594_eth1_driver.h.

◆ EMAC_RDES0_TSV

#define EMAC_RDES0_TSV 0x00000080

Definition at line 149 of file sc594_eth1_driver.h.

◆ EMAC_RDES0_VLAN

#define EMAC_RDES0_VLAN 0x00000400

Definition at line 146 of file sc594_eth1_driver.h.

◆ EMAC_RDES1_DIC

#define EMAC_RDES1_DIC 0x80000000

Definition at line 157 of file sc594_eth1_driver.h.

◆ EMAC_RDES1_RBS1

#define EMAC_RDES1_RBS1 0x00001FFF

Definition at line 161 of file sc594_eth1_driver.h.

◆ EMAC_RDES1_RBS2

#define EMAC_RDES1_RBS2 0x1FFF0000

Definition at line 158 of file sc594_eth1_driver.h.

◆ EMAC_RDES1_RCH

#define EMAC_RDES1_RCH 0x00004000

Definition at line 160 of file sc594_eth1_driver.h.

◆ EMAC_RDES1_RER

#define EMAC_RDES1_RER 0x00008000

Definition at line 159 of file sc594_eth1_driver.h.

◆ EMAC_RDES2_RBAP1

#define EMAC_RDES2_RBAP1 0xFFFFFFFF

Definition at line 162 of file sc594_eth1_driver.h.

◆ EMAC_RDES3_RBAP2

#define EMAC_RDES3_RBAP2 0xFFFFFFFF

Definition at line 163 of file sc594_eth1_driver.h.

◆ EMAC_RDES4_AVPR

#define EMAC_RDES4_AVPR 0x00010000

Definition at line 168 of file sc594_eth1_driver.h.

◆ EMAC_RDES4_AVTPR

#define EMAC_RDES4_AVTPR 0x00020000

Definition at line 167 of file sc594_eth1_driver.h.

◆ EMAC_RDES4_IPCB

#define EMAC_RDES4_IPCB 0x00000020

Definition at line 175 of file sc594_eth1_driver.h.

◆ EMAC_RDES4_IPHE

#define EMAC_RDES4_IPHE 0x00000008

Definition at line 177 of file sc594_eth1_driver.h.

◆ EMAC_RDES4_IPPE

#define EMAC_RDES4_IPPE 0x00000010

Definition at line 176 of file sc594_eth1_driver.h.

◆ EMAC_RDES4_IPPT

#define EMAC_RDES4_IPPT 0x00000007

Definition at line 178 of file sc594_eth1_driver.h.

◆ EMAC_RDES4_IPV4PR

#define EMAC_RDES4_IPV4PR 0x00000040

Definition at line 174 of file sc594_eth1_driver.h.

◆ EMAC_RDES4_IPV6PR

#define EMAC_RDES4_IPV6PR 0x00000080

Definition at line 173 of file sc594_eth1_driver.h.

◆ EMAC_RDES4_L3FM

#define EMAC_RDES4_L3FM 0x01000000

Definition at line 165 of file sc594_eth1_driver.h.

◆ EMAC_RDES4_L4FM

#define EMAC_RDES4_L4FM 0x02000000

Definition at line 164 of file sc594_eth1_driver.h.

◆ EMAC_RDES4_PFT

#define EMAC_RDES4_PFT 0x00001000

Definition at line 171 of file sc594_eth1_driver.h.

◆ EMAC_RDES4_PMT

#define EMAC_RDES4_PMT 0x00000F00

Definition at line 172 of file sc594_eth1_driver.h.

◆ EMAC_RDES4_PV

#define EMAC_RDES4_PV 0x00002000

Definition at line 170 of file sc594_eth1_driver.h.

◆ EMAC_RDES4_TD

#define EMAC_RDES4_TD 0x00004000

Definition at line 169 of file sc594_eth1_driver.h.

◆ EMAC_RDES4_VLANTP

#define EMAC_RDES4_VLANTP 0x001C0000

Definition at line 166 of file sc594_eth1_driver.h.

◆ EMAC_RDES6_RTSL

#define EMAC_RDES6_RTSL 0xFFFFFFFF

Definition at line 179 of file sc594_eth1_driver.h.

◆ EMAC_RDES7_RTSH

#define EMAC_RDES7_RTSH 0xFFFFFFFF

Definition at line 180 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_CC

#define EMAC_TDES0_CC 0x00000078

Definition at line 125 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_CIC

#define EMAC_TDES0_CIC 0x00C00000

Definition at line 110 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_CRCR

#define EMAC_TDES0_CRCR 0x01000000

Definition at line 109 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_DB

#define EMAC_TDES0_DB 0x00000001

Definition at line 128 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_DC

#define EMAC_TDES0_DC 0x08000000

Definition at line 106 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_DP

#define EMAC_TDES0_DP 0x04000000

Definition at line 107 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_EC

#define EMAC_TDES0_EC 0x00000100

Definition at line 123 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_ED

#define EMAC_TDES0_ED 0x00000004

Definition at line 126 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_ES

#define EMAC_TDES0_ES 0x00008000

Definition at line 116 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_FF

#define EMAC_TDES0_FF 0x00002000

Definition at line 118 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_FS

#define EMAC_TDES0_FS 0x10000000

Definition at line 105 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_IC

#define EMAC_TDES0_IC 0x40000000

Definition at line 103 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_IHE

#define EMAC_TDES0_IHE 0x00010000

Definition at line 115 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_IPE

#define EMAC_TDES0_IPE 0x00001000

Definition at line 119 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_JT

#define EMAC_TDES0_JT 0x00004000

Definition at line 117 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_LCA

#define EMAC_TDES0_LCA 0x00000800

Definition at line 120 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_LCO

#define EMAC_TDES0_LCO 0x00000200

Definition at line 122 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_LS

#define EMAC_TDES0_LS 0x20000000

Definition at line 104 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_NC

#define EMAC_TDES0_NC 0x00000400

Definition at line 121 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_OWN

#define EMAC_TDES0_OWN 0x80000000

Definition at line 102 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_TCH

#define EMAC_TDES0_TCH 0x00100000

Definition at line 112 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_TER

#define EMAC_TDES0_TER 0x00200000

Definition at line 111 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_TTSE

#define EMAC_TDES0_TTSE 0x02000000

Definition at line 108 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_TTSS

#define EMAC_TDES0_TTSS 0x00020000

Definition at line 114 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_UF

#define EMAC_TDES0_UF 0x00000002

Definition at line 127 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_VF

#define EMAC_TDES0_VF 0x00000080

Definition at line 124 of file sc594_eth1_driver.h.

◆ EMAC_TDES0_VLIC

#define EMAC_TDES0_VLIC 0x000C0000

Definition at line 113 of file sc594_eth1_driver.h.

◆ EMAC_TDES1_SAIC

#define EMAC_TDES1_SAIC 0xE0000000

Definition at line 129 of file sc594_eth1_driver.h.

◆ EMAC_TDES1_TBS1

#define EMAC_TDES1_TBS1 0x00001FFF

Definition at line 131 of file sc594_eth1_driver.h.

◆ EMAC_TDES1_TBS2

#define EMAC_TDES1_TBS2 0x1FFF0000

Definition at line 130 of file sc594_eth1_driver.h.

◆ EMAC_TDES2_TBAP1

#define EMAC_TDES2_TBAP1 0xFFFFFFFF

Definition at line 132 of file sc594_eth1_driver.h.

◆ EMAC_TDES3_TBAP2

#define EMAC_TDES3_TBAP2 0xFFFFFFFF

Definition at line 133 of file sc594_eth1_driver.h.

◆ EMAC_TDES6_TTSL

#define EMAC_TDES6_TTSL 0xFFFFFFFF

Definition at line 134 of file sc594_eth1_driver.h.

◆ EMAC_TDES7_TTSH

#define EMAC_TDES7_TTSH 0xFFFFFFFF

Definition at line 135 of file sc594_eth1_driver.h.

◆ ENUM_EMAC_DMA_BUSMODE_PBL_1

#define ENUM_EMAC_DMA_BUSMODE_PBL_1 (1 << BITP_EMAC_DMA0_BUSMODE_PBL)

Definition at line 94 of file sc594_eth1_driver.h.

◆ ENUM_EMAC_DMA_BUSMODE_PBL_16

#define ENUM_EMAC_DMA_BUSMODE_PBL_16 (16 << BITP_EMAC_DMA0_BUSMODE_PBL)

Definition at line 98 of file sc594_eth1_driver.h.

◆ ENUM_EMAC_DMA_BUSMODE_PBL_2

#define ENUM_EMAC_DMA_BUSMODE_PBL_2 (2 << BITP_EMAC_DMA0_BUSMODE_PBL)

Definition at line 95 of file sc594_eth1_driver.h.

◆ ENUM_EMAC_DMA_BUSMODE_PBL_32

#define ENUM_EMAC_DMA_BUSMODE_PBL_32 (32 << BITP_EMAC_DMA0_BUSMODE_PBL)

Definition at line 99 of file sc594_eth1_driver.h.

◆ ENUM_EMAC_DMA_BUSMODE_PBL_4

#define ENUM_EMAC_DMA_BUSMODE_PBL_4 (4 << BITP_EMAC_DMA0_BUSMODE_PBL)

Definition at line 96 of file sc594_eth1_driver.h.

◆ ENUM_EMAC_DMA_BUSMODE_PBL_8

#define ENUM_EMAC_DMA_BUSMODE_PBL_8 (8 << BITP_EMAC_DMA0_BUSMODE_PBL)

Definition at line 97 of file sc594_eth1_driver.h.

◆ ENUM_EMAC_DMA_BUSMODE_RPBL_1

#define ENUM_EMAC_DMA_BUSMODE_RPBL_1 (1 << BITP_EMAC_DMA0_BUSMODE_RPBL)

Definition at line 87 of file sc594_eth1_driver.h.

◆ ENUM_EMAC_DMA_BUSMODE_RPBL_16

#define ENUM_EMAC_DMA_BUSMODE_RPBL_16 (16 << BITP_EMAC_DMA0_BUSMODE_RPBL)

Definition at line 91 of file sc594_eth1_driver.h.

◆ ENUM_EMAC_DMA_BUSMODE_RPBL_2

#define ENUM_EMAC_DMA_BUSMODE_RPBL_2 (2 << BITP_EMAC_DMA0_BUSMODE_RPBL)

Definition at line 88 of file sc594_eth1_driver.h.

◆ ENUM_EMAC_DMA_BUSMODE_RPBL_32

#define ENUM_EMAC_DMA_BUSMODE_RPBL_32 (32 << BITP_EMAC_DMA0_BUSMODE_RPBL)

Definition at line 92 of file sc594_eth1_driver.h.

◆ ENUM_EMAC_DMA_BUSMODE_RPBL_4

#define ENUM_EMAC_DMA_BUSMODE_RPBL_4 (4 << BITP_EMAC_DMA0_BUSMODE_RPBL)

Definition at line 89 of file sc594_eth1_driver.h.

◆ ENUM_EMAC_DMA_BUSMODE_RPBL_8

#define ENUM_EMAC_DMA_BUSMODE_RPBL_8 (8 << BITP_EMAC_DMA0_BUSMODE_RPBL)

Definition at line 90 of file sc594_eth1_driver.h.

◆ ENUM_EMAC_SMI_ADDR_CR_DIV16

#define ENUM_EMAC_SMI_ADDR_CR_DIV16 (2 << BITP_EMAC_SMI_ADDR_CR)

Definition at line 83 of file sc594_eth1_driver.h.

◆ ENUM_EMAC_SMI_ADDR_CR_DIV26

#define ENUM_EMAC_SMI_ADDR_CR_DIV26 (3 << BITP_EMAC_SMI_ADDR_CR)

Definition at line 84 of file sc594_eth1_driver.h.

◆ ENUM_EMAC_SMI_ADDR_CR_DIV42

#define ENUM_EMAC_SMI_ADDR_CR_DIV42 (0 << BITP_EMAC_SMI_ADDR_CR)

Definition at line 81 of file sc594_eth1_driver.h.

◆ ENUM_EMAC_SMI_ADDR_CR_DIV62

#define ENUM_EMAC_SMI_ADDR_CR_DIV62 (1 << BITP_EMAC_SMI_ADDR_CR)

Definition at line 82 of file sc594_eth1_driver.h.

◆ SC594_ETH1_IRQ_PRIORITY

#define SC594_ETH1_IRQ_PRIORITY 0

Definition at line 67 of file sc594_eth1_driver.h.

◆ SC594_ETH1_RAM_SECTION

#define SC594_ETH1_RAM_SECTION ".l2_uncached_data"

Definition at line 74 of file sc594_eth1_driver.h.

◆ SC594_ETH1_RX_BUFFER_COUNT

#define SC594_ETH1_RX_BUFFER_COUNT 8

Definition at line 53 of file sc594_eth1_driver.h.

◆ SC594_ETH1_RX_BUFFER_SIZE

#define SC594_ETH1_RX_BUFFER_SIZE 1536

Definition at line 60 of file sc594_eth1_driver.h.

◆ SC594_ETH1_TX_BUFFER_COUNT

#define SC594_ETH1_TX_BUFFER_COUNT 8

Definition at line 39 of file sc594_eth1_driver.h.

◆ SC594_ETH1_TX_BUFFER_SIZE

#define SC594_ETH1_TX_BUFFER_SIZE 1536

Definition at line 46 of file sc594_eth1_driver.h.

Function Documentation

◆ sc594Eth1CalcCrc()

uint32_t sc594Eth1CalcCrc	(	const void *	data,
		size_t	length
	)

CRC calculation.

Parameters

[in]	data	Pointer to the data over which to calculate the CRC
[in]	length	Number of bytes to process

Returns: Resulting CRC value

Definition at line 924 of file sc594_eth1_driver.c.

◆ sc594Eth1DisableIrq()

void sc594Eth1DisableIrq ( NetInterface * interface )

Disable interrupts.

Parameters

[in] interface Underlying network interface

Definition at line 427 of file sc594_eth1_driver.c.

◆ sc594Eth1EnableIrq()

void sc594Eth1EnableIrq ( NetInterface * interface )

Enable interrupts.

Parameters

[in] interface Underlying network interface

Definition at line 399 of file sc594_eth1_driver.c.

◆ sc594Eth1EventHandler()

void sc594Eth1EventHandler ( NetInterface * interface )

ADSP-SC594 Ethernet MAC event handler.

Parameters

[in] interface Underlying network interface

Definition at line 509 of file sc594_eth1_driver.c.

◆ sc594Eth1Init()

error_t sc594Eth1Init ( NetInterface * interface )

ADSP-SC594 Ethernet MAC initialization.

Parameters

[in] interface Underlying network interface

Returns: Error code

Definition at line 119 of file sc594_eth1_driver.c.

◆ sc594Eth1InitDmaDesc()

void sc594Eth1InitDmaDesc ( NetInterface * interface )

Initialize DMA descriptor lists.

Parameters

[in] interface Underlying network interface

Definition at line 290 of file sc594_eth1_driver.c.

◆ sc594Eth1InitGpio()

void sc594Eth1InitGpio ( NetInterface * interface )

GPIO configuration.

Parameters

[in] interface Underlying network interface

Definition at line 221 of file sc594_eth1_driver.c.

◆ sc594Eth1IrqHandler()

void sc594Eth1IrqHandler	(	uint32_t	id,
		void *	param
	)

ADSP-SC594 Ethernet MAC interrupt service routine.

Parameters

id	Interrupt identifier
param	Unused parameter

Definition at line 456 of file sc594_eth1_driver.c.

◆ sc594Eth1ReadPhyReg()

uint16_t sc594Eth1ReadPhyReg	(	uint8_t	opcode,
		uint8_t	phyAddr,
		uint8_t	regAddr
	)

Read PHY register.

Parameters

[in]	opcode	Access type (2 bits)
[in]	phyAddr	PHY address (5 bits)
[in]	regAddr	Register address (5 bits)

Returns: Register value

Definition at line 878 of file sc594_eth1_driver.c.

◆ sc594Eth1ReceivePacket()

error_t sc594Eth1ReceivePacket ( NetInterface * interface )

Receive a packet.

Parameters

[in] interface Underlying network interface

Returns: Error code

Definition at line 598 of file sc594_eth1_driver.c.

◆ sc594Eth1ResetPhy()

void sc594Eth1ResetPhy ( NetInterface * interface )

Reset PHY transceiver.

Parameters

[in] interface Underlying network interface

Definition at line 280 of file sc594_eth1_driver.c.

◆ sc594Eth1SendPacket()

error_t sc594Eth1SendPacket	(	NetInterface *	interface,
		const NetBuffer *	buffer,
		size_t	offset,
		NetTxAncillary *	ancillary
	)

Send a packet.

Parameters

[in]	interface	Underlying network interface
[in]	buffer	Multi-part buffer containing the data to send
[in]	offset	Offset to the first data byte
[in]	ancillary	Additional options passed to the stack along with the packet

Returns: Error code

Definition at line 534 of file sc594_eth1_driver.c.

◆ sc594Eth1Tick()

void sc594Eth1Tick ( NetInterface * interface )

ADSP-SC594 Ethernet MAC timer handler.

This routine is periodically called by the TCP/IP stack to handle periodic operations such as polling the link state

Parameters

[in] interface Underlying network interface

Definition at line 374 of file sc594_eth1_driver.c.

◆ sc594Eth1UpdateMacAddrFilter()

error_t sc594Eth1UpdateMacAddrFilter ( NetInterface * interface )

Configure MAC address filtering.

Parameters

[in] interface Underlying network interface

Returns: Error code

Definition at line 670 of file sc594_eth1_driver.c.

◆ sc594Eth1UpdateMacConfig()

error_t sc594Eth1UpdateMacConfig ( NetInterface * interface )

Adjust MAC configuration parameters for proper operation.

Parameters

[in] interface Underlying network interface

Returns: Error code

Definition at line 784 of file sc594_eth1_driver.c.

◆ sc594Eth1WritePhyReg()

void sc594Eth1WritePhyReg	(	uint8_t	opcode,
		uint8_t	phyAddr,
		uint8_t	regAddr,
		uint16_t	data
	)

Write PHY register.

Parameters

[in]	opcode	Access type (2 bits)
[in]	phyAddr	PHY address (5 bits)
[in]	regAddr	Register address (5 bits)
[in]	data	Register value

Definition at line 836 of file sc594_eth1_driver.c.

Variable Documentation

◆ sc594Eth1Driver

const NicDriver sc594Eth1Driver

extern

ADSP-SC594 Ethernet MAC driver (EMAC0 instance)

Definition at line 92 of file sc594_eth1_driver.c.

Data Structures

Macros

Functions

Variables

Detailed Description

License

Macro Definition Documentation

◆ EMAC0_SPU_PID

◆ EMAC_RDES0_AFM

◆ EMAC_RDES0_CE

◆ EMAC_RDES0_DBE

◆ EMAC_RDES0_DE

◆ EMAC_RDES0_ES

◆ EMAC_RDES0_ESA

◆ EMAC_RDES0_FL

◆ EMAC_RDES0_FS

◆ EMAC_RDES0_FT

◆ EMAC_RDES0_LCO

◆ EMAC_RDES0_LE

◆ EMAC_RDES0_LS

◆ EMAC_RDES0_OE

◆ EMAC_RDES0_OWN

◆ EMAC_RDES0_RE

◆ EMAC_RDES0_RWT

◆ EMAC_RDES0_SAF

◆ EMAC_RDES0_TSV

◆ EMAC_RDES0_VLAN

◆ EMAC_RDES1_DIC

◆ EMAC_RDES1_RBS1

◆ EMAC_RDES1_RBS2

◆ EMAC_RDES1_RCH

◆ EMAC_RDES1_RER

◆ EMAC_RDES2_RBAP1

◆ EMAC_RDES3_RBAP2

◆ EMAC_RDES4_AVPR

◆ EMAC_RDES4_AVTPR

◆ EMAC_RDES4_IPCB

◆ EMAC_RDES4_IPHE

◆ EMAC_RDES4_IPPE

◆ EMAC_RDES4_IPPT

◆ EMAC_RDES4_IPV4PR

◆ EMAC_RDES4_IPV6PR

◆ EMAC_RDES4_L3FM

◆ EMAC_RDES4_L4FM

◆ EMAC_RDES4_PFT

◆ EMAC_RDES4_PMT

◆ EMAC_RDES4_PV

◆ EMAC_RDES4_TD

◆ EMAC_RDES4_VLANTP

◆ EMAC_RDES6_RTSL

◆ EMAC_RDES7_RTSH

◆ EMAC_TDES0_CC

◆ EMAC_TDES0_CIC

◆ EMAC_TDES0_CRCR

◆ EMAC_TDES0_DB

◆ EMAC_TDES0_DC

◆ EMAC_TDES0_DP

◆ EMAC_TDES0_EC

◆ EMAC_TDES0_ED

◆ EMAC_TDES0_ES

◆ EMAC_TDES0_FF

◆ EMAC_TDES0_FS

◆ EMAC_TDES0_IC

◆ EMAC_TDES0_IHE

◆ EMAC_TDES0_IPE

◆ EMAC_TDES0_JT

◆ EMAC_TDES0_LCA

◆ EMAC_TDES0_LCO

◆ EMAC_TDES0_LS

◆ EMAC_TDES0_NC

◆ EMAC_TDES0_OWN

◆ EMAC_TDES0_TCH

◆ EMAC_TDES0_TER

◆ EMAC_TDES0_TTSE

◆ EMAC_TDES0_TTSS

◆ EMAC_TDES0_UF

◆ EMAC_TDES0_VF

◆ EMAC_TDES0_VLIC

◆ EMAC_TDES1_SAIC

◆ EMAC_TDES1_TBS1