32 #define TRACE_LEVEL NIC_TRACE_LEVEL
35 #include "stm32f4xx.h"
37 #ifndef USE_STDPERIPH_DRIVER
38 #include "stm32f4xx_hal.h"
49 #if defined(__ICCARM__)
52 #pragma data_alignment = 4
55 #pragma data_alignment = 4
58 #pragma data_alignment = 4
61 #pragma data_alignment = 4
124 TRACE_INFO(
"Initializing STM32F4 Ethernet MAC...\r\n");
127 nicDriverInterface = interface;
132 #ifdef USE_STDPERIPH_DRIVER
134 RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_ETH_MAC |
135 RCC_AHB1Periph_ETH_MAC_Tx | RCC_AHB1Periph_ETH_MAC_Rx, ENABLE);
138 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_ETH_MAC, ENABLE);
139 RCC_AHB1PeriphResetCmd(RCC_AHB1Periph_ETH_MAC, DISABLE);
142 __HAL_RCC_ETHMAC_CLK_ENABLE();
143 __HAL_RCC_ETHMACTX_CLK_ENABLE();
144 __HAL_RCC_ETHMACRX_CLK_ENABLE();
147 __HAL_RCC_ETHMAC_FORCE_RESET();
148 __HAL_RCC_ETHMAC_RELEASE_RESET();
152 ETH->DMABMR |= ETH_DMABMR_SR;
154 while((ETH->DMABMR & ETH_DMABMR_SR) != 0)
159 ETH->MACMIIAR = ETH_MACMIIAR_CR_Div102;
162 if(interface->phyDriver != NULL)
165 error = interface->phyDriver->init(interface);
167 else if(interface->switchDriver != NULL)
170 error = interface->switchDriver->init(interface);
193 ETH->DMAOMR = ETH_DMAOMR_RSF | ETH_DMAOMR_TSF;
196 ETH->DMABMR = ETH_DMABMR_AAB | ETH_DMABMR_USP | ETH_DMABMR_RDP_32Beat |
197 ETH_DMABMR_RTPR_1_1 | ETH_DMABMR_PBL_32Beat | ETH_DMABMR_EDE;
204 ETH->MMCTIMR = ETH_MMCTIMR_TGFM | ETH_MMCTIMR_TGFMSCM | ETH_MMCTIMR_TGFSCM;
208 ETH->MMCRIMR = ETH_MMCRIMR_RGUFM | ETH_MMCRIMR_RFAEM | ETH_MMCRIMR_RFCEM;
211 ETH->MACIMR = ETH_MACIMR_TSTIM | ETH_MACIMR_PMTIM;
213 ETH->DMAIER = ETH_DMAIER_NISE | ETH_DMAIER_RIE | ETH_DMAIER_TIE;
223 ETH->MACCR |= ETH_MACCR_TE | ETH_MACCR_RE;
225 ETH->DMAOMR |= ETH_DMAOMR_ST | ETH_DMAOMR_SR;
243 #if defined(USE_STM324xG_EVAL)
244 GPIO_InitTypeDef GPIO_InitStructure;
247 __HAL_RCC_SYSCFG_CLK_ENABLE();
250 __HAL_RCC_GPIOA_CLK_ENABLE();
251 __HAL_RCC_GPIOB_CLK_ENABLE();
252 __HAL_RCC_GPIOC_CLK_ENABLE();
253 __HAL_RCC_GPIOG_CLK_ENABLE();
254 __HAL_RCC_GPIOH_CLK_ENABLE();
255 __HAL_RCC_GPIOI_CLK_ENABLE();
258 GPIO_InitStructure.Pin = GPIO_PIN_8;
259 GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
260 GPIO_InitStructure.Pull = GPIO_NOPULL;
261 GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
262 GPIO_InitStructure.Alternate = GPIO_AF0_MCO;
263 HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
266 HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1);
269 SYSCFG->PMC &= ~SYSCFG_PMC_MII_RMII_SEL;
272 GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
273 GPIO_InitStructure.Pull = GPIO_NOPULL;
274 GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
275 GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
278 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
279 HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
282 GPIO_InitStructure.Pin = GPIO_PIN_8;
283 HAL_GPIO_Init(GPIOB, &GPIO_InitStructure);
287 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5;
288 HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
291 GPIO_InitStructure.Pin = GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14;
292 HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
296 GPIO_InitStructure.Pin = GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_6 | GPIO_PIN_7;
297 HAL_GPIO_Init(GPIOH, &GPIO_InitStructure);
300 GPIO_InitStructure.Pin = GPIO_PIN_10;
301 HAL_GPIO_Init(GPIOI, &GPIO_InitStructure);
304 #elif defined(USE_STM324x9I_EVAL)
305 GPIO_InitTypeDef GPIO_InitStructure;
308 __HAL_RCC_SYSCFG_CLK_ENABLE();
311 __HAL_RCC_GPIOA_CLK_ENABLE();
312 __HAL_RCC_GPIOB_CLK_ENABLE();
313 __HAL_RCC_GPIOC_CLK_ENABLE();
314 __HAL_RCC_GPIOG_CLK_ENABLE();
315 __HAL_RCC_GPIOH_CLK_ENABLE();
316 __HAL_RCC_GPIOI_CLK_ENABLE();
319 GPIO_InitStructure.Pin = GPIO_PIN_8;
320 GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
321 GPIO_InitStructure.Pull = GPIO_NOPULL;
322 GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
323 GPIO_InitStructure.Alternate = GPIO_AF0_MCO;
324 HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
327 HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1);
330 SYSCFG->PMC &= ~SYSCFG_PMC_MII_RMII_SEL;
333 GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
334 GPIO_InitStructure.Pull = GPIO_NOPULL;
335 GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
336 GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
343 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
344 HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
347 GPIO_InitStructure.Pin = GPIO_PIN_8;
348 HAL_GPIO_Init(GPIOB, &GPIO_InitStructure);
352 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5;
353 HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
356 GPIO_InitStructure.Pin = GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14;
357 HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
364 GPIO_InitStructure.Pin = GPIO_PIN_6 | GPIO_PIN_7;
365 HAL_GPIO_Init(GPIOH, &GPIO_InitStructure);
372 #elif defined(USE_STM32F469I_EVAL)
373 GPIO_InitTypeDef GPIO_InitStructure;
376 __HAL_RCC_SYSCFG_CLK_ENABLE();
379 __HAL_RCC_GPIOA_CLK_ENABLE();
380 __HAL_RCC_GPIOC_CLK_ENABLE();
381 __HAL_RCC_GPIOE_CLK_ENABLE();
382 __HAL_RCC_GPIOG_CLK_ENABLE();
383 __HAL_RCC_GPIOH_CLK_ENABLE();
384 __HAL_RCC_GPIOI_CLK_ENABLE();
387 GPIO_InitStructure.Pin = GPIO_PIN_8;
388 GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
389 GPIO_InitStructure.Pull = GPIO_NOPULL;
390 GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
391 GPIO_InitStructure.Alternate = GPIO_AF0_MCO;
392 HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
395 HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_1);
398 SYSCFG->PMC &= ~SYSCFG_PMC_MII_RMII_SEL;
401 GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
402 GPIO_InitStructure.Pull = GPIO_NOPULL;
403 GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
404 GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
411 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
412 HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
416 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_3 | GPIO_PIN_4 | GPIO_PIN_5;
417 HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
420 GPIO_InitStructure.Pin = GPIO_PIN_2;
421 HAL_GPIO_Init(GPIOE, &GPIO_InitStructure);
424 GPIO_InitStructure.Pin = GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14;
425 HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
432 GPIO_InitStructure.Pin = GPIO_PIN_6 | GPIO_PIN_7;
433 HAL_GPIO_Init(GPIOH, &GPIO_InitStructure);
440 #elif defined(USE_STM32F4_DISCO)
441 GPIO_InitTypeDef GPIO_InitStructure;
444 __HAL_RCC_SYSCFG_CLK_ENABLE();
447 __HAL_RCC_GPIOA_CLK_ENABLE();
448 __HAL_RCC_GPIOB_CLK_ENABLE();
449 __HAL_RCC_GPIOC_CLK_ENABLE();
450 __HAL_RCC_GPIOE_CLK_ENABLE();
453 SYSCFG->PMC |= SYSCFG_PMC_MII_RMII_SEL;
456 GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
457 GPIO_InitStructure.Pull = GPIO_NOPULL;
458 GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
459 GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
462 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
463 HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
466 GPIO_InitStructure.Pin = GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13;
467 HAL_GPIO_Init(GPIOB, &GPIO_InitStructure);
470 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
471 HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
474 GPIO_InitStructure.Pin = GPIO_PIN_2;
475 GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
476 GPIO_InitStructure.Pull = GPIO_NOPULL;
477 GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_LOW;
478 HAL_GPIO_Init(GPIOE, &GPIO_InitStructure);
481 HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2, GPIO_PIN_RESET);
483 HAL_GPIO_WritePin(GPIOE, GPIO_PIN_2, GPIO_PIN_SET);
487 #elif defined(USE_STM32F4XX_NUCLEO_144)
488 GPIO_InitTypeDef GPIO_InitStructure;
491 __HAL_RCC_SYSCFG_CLK_ENABLE();
494 __HAL_RCC_GPIOA_CLK_ENABLE();
495 __HAL_RCC_GPIOB_CLK_ENABLE();
496 __HAL_RCC_GPIOC_CLK_ENABLE();
497 __HAL_RCC_GPIOG_CLK_ENABLE();
500 SYSCFG->PMC |= SYSCFG_PMC_MII_RMII_SEL;
503 GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
504 GPIO_InitStructure.Pull = GPIO_NOPULL;
505 GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
506 GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
509 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
510 HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
513 GPIO_InitStructure.Pin = GPIO_PIN_13;
514 HAL_GPIO_Init(GPIOB, &GPIO_InitStructure);
517 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
518 HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
521 GPIO_InitStructure.Pin = GPIO_PIN_11 | GPIO_PIN_13;
522 HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
525 #elif defined(USE_MCBSTM32F400)
526 GPIO_InitTypeDef GPIO_InitStructure;
529 __HAL_RCC_SYSCFG_CLK_ENABLE();
532 __HAL_RCC_GPIOA_CLK_ENABLE();
533 __HAL_RCC_GPIOC_CLK_ENABLE();
534 __HAL_RCC_GPIOG_CLK_ENABLE();
537 SYSCFG->PMC |= SYSCFG_PMC_MII_RMII_SEL;
540 GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
541 GPIO_InitStructure.Pull = GPIO_NOPULL;
542 GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
543 GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
546 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
547 HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
550 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
551 HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
554 GPIO_InitStructure.Pin = GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14;
555 HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
558 #elif defined(USE_STM32_E407)
559 GPIO_InitTypeDef GPIO_InitStructure;
562 __HAL_RCC_SYSCFG_CLK_ENABLE();
565 __HAL_RCC_GPIOA_CLK_ENABLE();
566 __HAL_RCC_GPIOC_CLK_ENABLE();
567 __HAL_RCC_GPIOG_CLK_ENABLE();
570 SYSCFG->PMC |= SYSCFG_PMC_MII_RMII_SEL;
573 GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
574 GPIO_InitStructure.Pull = GPIO_NOPULL;
575 GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
576 GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
579 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
580 HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
583 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
584 HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
587 GPIO_InitStructure.Pin = GPIO_PIN_11 | GPIO_PIN_13 | GPIO_PIN_14;
588 HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
591 GPIO_InitStructure.Pin = GPIO_PIN_6;
592 GPIO_InitStructure.Mode = GPIO_MODE_OUTPUT_PP;
593 GPIO_InitStructure.Pull = GPIO_NOPULL;
594 GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_LOW;
595 HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
598 HAL_GPIO_WritePin(GPIOG, GPIO_PIN_6, GPIO_PIN_RESET);
600 HAL_GPIO_WritePin(GPIOG, GPIO_PIN_6, GPIO_PIN_SET);
604 #elif defined(USE_STM32_P407)
605 GPIO_InitTypeDef GPIO_InitStructure;
608 __HAL_RCC_SYSCFG_CLK_ENABLE();
611 __HAL_RCC_GPIOA_CLK_ENABLE();
612 __HAL_RCC_GPIOB_CLK_ENABLE();
613 __HAL_RCC_GPIOC_CLK_ENABLE();
614 __HAL_RCC_GPIOG_CLK_ENABLE();
617 SYSCFG->PMC |= SYSCFG_PMC_MII_RMII_SEL;
620 GPIO_InitStructure.Mode = GPIO_MODE_AF_PP;
621 GPIO_InitStructure.Pull = GPIO_NOPULL;
622 GPIO_InitStructure.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
623 GPIO_InitStructure.Alternate = GPIO_AF11_ETH;
626 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_2 | GPIO_PIN_7;
627 HAL_GPIO_Init(GPIOA, &GPIO_InitStructure);
630 GPIO_InitStructure.Pin = GPIO_PIN_11;
631 HAL_GPIO_Init(GPIOB, &GPIO_InitStructure);
634 GPIO_InitStructure.Pin = GPIO_PIN_1 | GPIO_PIN_4 | GPIO_PIN_5;
635 HAL_GPIO_Init(GPIOC, &GPIO_InitStructure);
638 GPIO_InitStructure.Pin = GPIO_PIN_13 | GPIO_PIN_14;
639 HAL_GPIO_Init(GPIOG, &GPIO_InitStructure);
721 if(interface->phyDriver != NULL)
724 interface->phyDriver->tick(interface);
726 else if(interface->switchDriver != NULL)
729 interface->switchDriver->tick(interface);
746 NVIC_EnableIRQ(ETH_IRQn);
749 if(interface->phyDriver != NULL)
752 interface->phyDriver->enableIrq(interface);
754 else if(interface->switchDriver != NULL)
757 interface->switchDriver->enableIrq(interface);
774 NVIC_DisableIRQ(ETH_IRQn);
777 if(interface->phyDriver != NULL)
780 interface->phyDriver->disableIrq(interface);
782 else if(interface->switchDriver != NULL)
785 interface->switchDriver->disableIrq(interface);
813 if((status & ETH_DMASR_TS) != 0)
816 ETH->DMASR = ETH_DMASR_TS;
827 if((status & ETH_DMASR_RS) != 0)
830 ETH->DMASR = ETH_DMASR_RS;
833 nicDriverInterface->nicEvent =
TRUE;
839 ETH->DMASR = ETH_DMASR_NIS;
910 ETH->DMASR = ETH_DMASR_TBUS;
990 ETH->DMASR = ETH_DMASR_RBUS;
1011 uint32_t hashTable[2];
1019 if(interface->promiscuous)
1022 ETH->MACFFR = ETH_MACFFR_PM;
1027 ETH->MACA0LR = interface->macAddr.w[0] | (interface->macAddr.w[1] << 16);
1028 ETH->MACA0HR = interface->macAddr.w[2];
1044 entry = &interface->macAddrFilter[i];
1057 k = (crc >> 26) & 0x3F;
1060 hashTable[k / 32] |= (1 << (k % 32));
1068 unicastMacAddr[j++] = entry->
addr;
1078 ETH->MACA1LR = unicastMacAddr[0].w[0] | (unicastMacAddr[0].w[1] << 16);
1079 ETH->MACA1HR = unicastMacAddr[0].w[2] | ETH_MACA1HR_AE;
1092 ETH->MACA2LR = unicastMacAddr[1].w[0] | (unicastMacAddr[1].w[1] << 16);
1093 ETH->MACA2HR = unicastMacAddr[1].w[2] | ETH_MACA2HR_AE;
1106 ETH->MACA3LR = unicastMacAddr[2].w[0] | (unicastMacAddr[2].w[1] << 16);
1107 ETH->MACA3HR = unicastMacAddr[2].w[2] | ETH_MACA3HR_AE;
1118 if(interface->acceptAllMulticast)
1121 ETH->MACFFR = ETH_MACFFR_HPF | ETH_MACFFR_PAM;
1126 ETH->MACFFR = ETH_MACFFR_HPF | ETH_MACFFR_HM;
1129 ETH->MACHTLR = hashTable[0];
1130 ETH->MACHTHR = hashTable[1];
1133 TRACE_DEBUG(
" MACHTLR = %08" PRIX32
"\r\n", ETH->MACHTLR);
1134 TRACE_DEBUG(
" MACHTHR = %08" PRIX32
"\r\n", ETH->MACHTHR);
1154 config = ETH->MACCR;
1159 config |= ETH_MACCR_FES;
1163 config &= ~ETH_MACCR_FES;
1169 config |= ETH_MACCR_DM;
1173 config &= ~ETH_MACCR_DM;
1177 ETH->MACCR = config;
1201 temp = ETH->MACMIIAR & ETH_MACMIIAR_CR;
1203 temp |= ETH_MACMIIAR_MW | ETH_MACMIIAR_MB;
1205 temp |= (phyAddr << 11) & ETH_MACMIIAR_PA;
1207 temp |= (
regAddr << 6) & ETH_MACMIIAR_MR;
1210 ETH->MACMIIDR =
data & ETH_MACMIIDR_MD;
1213 ETH->MACMIIAR = temp;
1215 while((ETH->MACMIIAR & ETH_MACMIIAR_MB) != 0)
1244 temp = ETH->MACMIIAR & ETH_MACMIIAR_CR;
1246 temp |= ETH_MACMIIAR_MB;
1248 temp |= (phyAddr << 11) & ETH_MACMIIAR_PA;
1250 temp |= (
regAddr << 6) & ETH_MACMIIAR_MR;
1253 ETH->MACMIIAR = temp;
1255 while((ETH->MACMIIAR & ETH_MACMIIAR_MB) != 0)
1260 data = ETH->MACMIIDR & ETH_MACMIIDR_MD;
1288 p = (uint8_t *)
data;
1293 for(i = 0; i <
length; i++)
1296 for(j = 0; j < 8; j++)
1299 if((((crc >> 31) ^ (
p[i] >> j)) & 0x01) != 0)
1301 crc = (crc << 1) ^ 0x04C11DB7;
__attribute__((naked))
AVR32 Ethernet MAC interrupt wrapper.
@ ERROR_FAILURE
Generic error code.
const MacAddr MAC_UNSPECIFIED_ADDR
#define macIsMulticastAddr(macAddr)
#define MAC_ADDR_FILTER_SIZE
size_t netBufferGetLength(const NetBuffer *buffer)
Get the actual length of a multi-part buffer.
size_t netBufferRead(void *dest, const NetBuffer *src, size_t srcOffset, size_t length)
Read data from a multi-part buffer.
const NetRxAncillary NET_DEFAULT_RX_ANCILLARY
void nicProcessPacket(NetInterface *interface, uint8_t *packet, size_t length, NetRxAncillary *ancillary)
Handle a packet received by the network controller.
@ NIC_TYPE_ETHERNET
Ethernet interface.
bool_t osSetEventFromIsr(OsEvent *event)
Set an event object to the signaled state from an interrupt service routine.
void osSetEvent(OsEvent *event)
Set the specified event object to the signaled state.
#define ETH_MACCR_RESERVED15
error_t stm32f4xxEthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary)
Send a packet.
uint32_t stm32f4xxEthCalcCrc(const void *data, size_t length)
CRC calculation.
void stm32f4xxEthDisableIrq(NetInterface *interface)
Disable interrupts.
void stm32f4xxEthInitDmaDesc(NetInterface *interface)
Initialize DMA descriptor lists.
error_t stm32f4xxEthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
uint16_t stm32f4xxEthReadPhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
error_t stm32f4xxEthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
error_t stm32f4xxEthReceivePacket(NetInterface *interface)
Receive a packet.
error_t stm32f4xxEthInit(NetInterface *interface)
STM32F4 Ethernet MAC initialization.
void stm32f4xxEthEnableIrq(NetInterface *interface)
Enable interrupts.
void stm32f4xxEthTick(NetInterface *interface)
STM32F4 Ethernet MAC timer handler.
void ETH_IRQHandler(void)
STM32F4 Ethernet MAC interrupt service routine.
void stm32f4xxEthEventHandler(NetInterface *interface)
STM32F4 Ethernet MAC event handler.
const NicDriver stm32f4xxEthDriver
STM32F4 Ethernet MAC driver.
void stm32f4xxEthWritePhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
__weak_func void stm32f4xxEthInitGpio(NetInterface *interface)
GPIO configuration.
STM32F4 Ethernet MAC driver.
#define STM32F4XX_ETH_TX_BUFFER_SIZE
#define STM32F4XX_ETH_IRQ_SUB_PRIORITY
#define STM32F4XX_ETH_IRQ_PRIORITY_GROUPING
#define STM32F4XX_ETH_IRQ_GROUP_PRIORITY
#define STM32F4XX_ETH_RX_BUFFER_COUNT
#define STM32F4XX_ETH_RX_BUFFER_SIZE
#define STM32F4XX_ETH_TX_BUFFER_COUNT
uint_t refCount
Reference count for the current entry.
Structure describing a buffer that spans multiple chunks.
Enhanced RX DMA descriptor.
Enhanced TX DMA descriptor.