avr32_eth_driver.h
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1 /**
2  * @file avr32_eth_driver.h
3  * @brief AVR32 Ethernet MAC driver
4  *
5  * @section License
6  *
7  * SPDX-License-Identifier: GPL-2.0-or-later
8  *
9  * Copyright (C) 2010-2025 Oryx Embedded SARL. All rights reserved.
10  *
11  * This file is part of CycloneTCP Open.
12  *
13  * This program is free software; you can redistribute it and/or
14  * modify it under the terms of the GNU General Public License
15  * as published by the Free Software Foundation; either version 2
16  * of the License, or (at your option) any later version.
17  *
18  * This program is distributed in the hope that it will be useful,
19  * but WITHOUT ANY WARRANTY; without even the implied warranty of
20  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21  * GNU General Public License for more details.
22  *
23  * You should have received a copy of the GNU General Public License
24  * along with this program; if not, write to the Free Software Foundation,
25  * Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
26  *
27  * @author Oryx Embedded SARL (www.oryx-embedded.com)
28  * @version 2.5.4
29  **/
30 
31 #ifndef _AVR32_ETH_DRIVER_H
32 #define _AVR32_ETH_DRIVER_H
33 
34 //Dependencies
35 #include "core/nic.h"
36 
37 //Number of TX buffers
38 #ifndef AVR32_ETH_TX_BUFFER_COUNT
39  #define AVR32_ETH_TX_BUFFER_COUNT 2
40 #elif (AVR32_ETH_TX_BUFFER_COUNT < 1)
41  #error AVR32_ETH_TX_BUFFER_COUNT parameter is not valid
42 #endif
43 
44 //TX buffer size
45 #ifndef AVR32_ETH_TX_BUFFER_SIZE
46  #define AVR32_ETH_TX_BUFFER_SIZE 1536
47 #elif (AVR32_ETH_TX_BUFFER_SIZE != 1536)
48  #error AVR32_ETH_TX_BUFFER_SIZE parameter is not valid
49 #endif
50 
51 //Number of RX buffers
52 #ifndef AVR32_ETH_RX_BUFFER_COUNT
53  #define AVR32_ETH_RX_BUFFER_COUNT 48
54 #elif (AVR32_ETH_RX_BUFFER_COUNT < 12)
55  #error AVR32_ETH_RX_BUFFER_COUNT parameter is not valid
56 #endif
57 
58 //RX buffer size
59 #ifndef AVR32_ETH_RX_BUFFER_SIZE
60  #define AVR32_ETH_RX_BUFFER_SIZE 128
61 #elif (AVR32_ETH_RX_BUFFER_SIZE != 128)
62  #error AVR32_ETH_RX_BUFFER_SIZE parameter is not valid
63 #endif
64 
65 //Ethernet interrupt priority
66 #ifndef AVR32_ETH_IRQ_PRIORITY
67  #define AVR32_ETH_IRQ_PRIORITY 2
68 #elif (AVR32_ETH_IRQ_PRIORITY < 0 || AVR32_ETH_IRQ_PRIORITY > 3)
69  #error AVR32_ETH_IRQ_PRIORITY parameter is not valid
70 #endif
71 
72 //RMII pin definition
73 #define MACB_RMII_EREFCK_MASK (1 << (AVR32_MACB_TX_CLK_0_PIN - 32))
74 #define MACB_RMII_ETXEN_MASK (1 << (AVR32_MACB_TX_EN_0_PIN - 32))
75 #define MACB_RMII_ETX0_MASK (1 << (AVR32_MACB_TXD_0_PIN - 32))
76 #define MACB_RMII_ETX1_MASK (1 << (AVR32_MACB_TXD_1_PIN - 32))
77 #define MACB_RMII_ERX0_MASK (1 << (AVR32_MACB_RXD_0_PIN - 32))
78 #define MACB_RMII_ERX1_MASK (1 << (AVR32_MACB_RXD_1_PIN - 32))
79 #define MACB_RMII_ERXER_MASK (1 << (AVR32_MACB_RX_ER_0_PIN - 32))
80 #define MACB_RMII_ECRSDV_MASK (1 << (AVR32_MACB_RX_DV_0_PIN - 32))
81 #define MACB_RMII_MDC_MASK (1 << (AVR32_MACB_MDC_0_PIN - 32))
82 #define MACB_RMII_MDIO_MASK (1 << (AVR32_MACB_MDIO_0_PIN - 32))
83 
84 //RMII signals
85 #define MACB_RMII_MASK (MACB_RMII_EREFCK_MASK | MACB_RMII_ETXEN_MASK | \
86  MACB_RMII_ETX0_MASK | MACB_RMII_ETX1_MASK | MACB_RMII_ERX0_MASK | MACB_RMII_ERX1_MASK | \
87  MACB_RMII_ERXER_MASK | MACB_RMII_ECRSDV_MASK | MACB_RMII_MDC_MASK | MACB_RMII_MDIO_MASK)
88 
89 //PHY maintenance register (MAN)
90 #define MACB_MAN_SOF_01 (1 << AVR32_MACB_MAN_SOF_OFFSET)
91 #define MACB_MAN_RW_01 (1 << AVR32_MACB_MAN_RW_OFFSET)
92 #define MACB_MAN_RW_10 (2 << AVR32_MACB_MAN_RW_OFFSET)
93 #define MACB_MAN_CODE_10 (2 << AVR32_MACB_MAN_CODE_OFFSET)
94 
95 //TX buffer descriptor flags
96 #define MACB_TX_USED 0x80000000
97 #define MACB_TX_WRAP 0x40000000
98 #define MACB_TX_ERROR 0x20000000
99 #define MACB_TX_UNDERRUN 0x10000000
100 #define MACB_TX_EXHAUSTED 0x08000000
101 #define MACB_TX_NO_CRC 0x00010000
102 #define MACB_TX_LAST 0x00008000
103 #define MACB_TX_LENGTH 0x000007FF
104 
105 //RX buffer descriptor flags
106 #define MACB_RX_ADDRESS 0xFFFFFFFC
107 #define MACB_RX_WRAP 0x00000002
108 #define MACB_RX_OWNERSHIP 0x00000001
109 #define MACB_RX_BROADCAST 0x80000000
110 #define MACB_RX_MULTICAST_HASH 0x40000000
111 #define MACB_RX_UNICAST_HASH 0x20000000
112 #define MACB_RX_EXT_ADDR 0x10000000
113 #define MACB_RX_SAR1 0x04000000
114 #define MACB_RX_SAR2 0x02000000
115 #define MACB_RX_SAR3 0x01000000
116 #define MACB_RX_SAR4 0x00800000
117 #define MACB_RX_TYPE_ID 0x00400000
118 #define MACB_RX_VLAN_TAG 0x00200000
119 #define MACB_RX_PRIORITY_TAG 0x00100000
120 #define MACB_RX_VLAN_PRIORITY 0x000E0000
121 #define MACB_RX_CFI 0x00010000
122 #define MACB_RX_EOF 0x00008000
123 #define MACB_RX_SOF 0x00004000
124 #define MACB_RX_OFFSET 0x00003000
125 #define MACB_RX_LENGTH 0x00000FFF
126 
127 //C++ guard
128 #ifdef __cplusplus
129 extern "C" {
130 #endif
131 
132 
133 /**
134  * @brief Transmit buffer descriptor
135  **/
136 
137 typedef struct
138 {
139  uint32_t address;
140  uint32_t status;
142 
143 
144 /**
145  * @brief Receive buffer descriptor
146  **/
147 
148 typedef struct
149 {
150  uint32_t address;
151  uint32_t status;
153 
154 
155 //AVR32 Ethernet MAC driver
156 extern const NicDriver avr32EthDriver;
157 
158 //AVR32 Ethernet MAC related functions
159 error_t avr32EthInit(NetInterface *interface);
160 void avr32EthInitGpio(NetInterface *interface);
161 void avr32EthInitBufferDesc(NetInterface *interface);
162 
163 void avr32EthTick(NetInterface *interface);
164 
165 void avr32EthEnableIrq(NetInterface *interface);
166 void avr32EthDisableIrq(NetInterface *interface);
169 void avr32EthEventHandler(NetInterface *interface);
170 
172  const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary);
173 
175 
178 
179 void avr32EthWritePhyReg(uint8_t opcode, uint8_t phyAddr,
180  uint8_t regAddr, uint16_t data);
181 
182 uint16_t avr32EthReadPhyReg(uint8_t opcode, uint8_t phyAddr,
183  uint8_t regAddr);
184 
185 //C++ guard
186 #ifdef __cplusplus
187 }
188 #endif
189 
190 #endif
uint8_t opcode
Definition: dns_common.h:191
int bool_t
Definition: compiler_port.h:61
error_t avr32EthUpdateMacConfig(NetInterface *interface)
Adjust MAC configuration parameters for proper operation.
Structure describing a buffer that spans multiple chunks.
Definition: net_mem.h:89
uint8_t data[]
Definition: ethernet.h:224
error_t avr32EthInit(NetInterface *interface)
AVR32 Ethernet MAC initialization.
void avr32EthDisableIrq(NetInterface *interface)
Disable interrupts.
const NicDriver avr32EthDriver
AVR32 Ethernet MAC driver.
Transmit buffer descriptor.
error_t
Error codes.
Definition: error.h:43
error_t avr32EthUpdateMacAddrFilter(NetInterface *interface)
Configure MAC address filtering.
void avr32EthEventHandler(NetInterface *interface)
AVR32 Ethernet MAC event handler.
Receive buffer descriptor.
uint16_t avr32EthReadPhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
Read PHY register.
#define NetInterface
Definition: net.h:36
bool_t avr32EthIrqHandler(void)
AVR32 Ethernet MAC interrupt service routine.
#define NetTxAncillary
Definition: net_misc.h:36
void avr32EthInitGpio(NetInterface *interface)
GPIO configuration.
error_t avr32EthSendPacket(NetInterface *interface, const NetBuffer *buffer, size_t offset, NetTxAncillary *ancillary)
Send a packet.
void avr32EthWritePhyReg(uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
Write PHY register.
void avr32EthTick(NetInterface *interface)
AVR32 Ethernet MAC timer handler.
uint16_t regAddr
Network interface controller abstraction layer.
void avr32EthIrqWrapper(void)
void avr32EthInitBufferDesc(NetInterface *interface)
Initialize buffer descriptors.
NIC driver.
Definition: nic.h:286
error_t avr32EthReceivePacket(NetInterface *interface)
Receive a packet.
void avr32EthEnableIrq(NetInterface *interface)
Enable interrupts.