32 #define TRACE_LEVEL NIC_TRACE_LEVEL
44 #if defined(__ICCARM__)
47 #pragma data_alignment = 16
50 #pragma data_alignment = 16
53 #pragma data_alignment = 16
56 #pragma data_alignment = 16
78 static uint_t txBufferIndex;
80 static uint_t rxBufferIndex;
120 TRACE_INFO(
"Initializing S32K148 Ethernet MAC...\r\n");
123 nicDriverInterface = interface;
129 SIM->MISCTRL0 &= ~(SIM_MISCTRL0_RMII_CLK_SEL_MASK |
130 SIM_MISCTRL0_RMII_CLK_OBE_MASK);
133 PCC->PCCn[PCC_ENET_INDEX] |= PCC_PCCn_CGC_MASK;
139 ENET->ECR = ENET_ECR_RESET_MASK;
141 while((ENET->ECR & ENET_ECR_RESET_MASK) != 0)
147 ENET_RCR_RMII_MODE_MASK | ENET_RCR_MII_MODE_MASK;
152 ENET->MSCR = ENET_MSCR_MII_SPEED(23);
155 if(interface->phyDriver != NULL)
158 error = interface->phyDriver->init(interface);
160 else if(interface->switchDriver != NULL)
163 error = interface->switchDriver->init(interface);
178 value = interface->macAddr.b[5];
179 value |= (interface->macAddr.b[4] << 8);
180 ENET->PAUR = ENET_PAUR_PADDR2(
value) | ENET_PAUR_TYPE(0x8808);
183 value = interface->macAddr.b[3];
184 value |= (interface->macAddr.b[2] << 8);
185 value |= (interface->macAddr.b[1] << 16);
186 value |= (interface->macAddr.b[0] << 24);
187 ENET->PALR = ENET_PALR_PADDR1(
value);
202 ENET->ECR = ENET_ECR_DBSWP_MASK | ENET_ECR_EN1588_MASK;
205 ENET->MIBC = ENET_MIBC_MIB_CLEAR_MASK;
212 ENET->EIR = 0xFFFFFFFF;
214 ENET->EIMR = ENET_EIMR_TXF_MASK | ENET_EIMR_RXF_MASK | ENET_EIMR_EBERR_MASK;
232 ENET->ECR |= ENET_ECR_ETHEREN_MASK;
234 ENET->RDAR = ENET_RDAR_RDAR_MASK;
245 #if defined(USE_S32K148_EVB_Q176)
255 PCC->PCCn[PCC_PORTA_INDEX] = PCC_PCCn_CGC_MASK;
256 PCC->PCCn[PCC_PORTB_INDEX] = PCC_PCCn_CGC_MASK;
257 PCC->PCCn[PCC_PORTC_INDEX] = PCC_PCCn_CGC_MASK;
258 PCC->PCCn[PCC_PORTD_INDEX] = PCC_PCCn_CGC_MASK;
261 PORTC->PCR[0] = PORT_PCR_MUX(4);
263 PORTC->PCR[1] = PORT_PCR_MUX(5);
265 PORTC->PCR[2] = PORT_PCR_MUX(5);
269 PORTC->PCR[17] = PORT_PCR_MUX(5);
271 PORTD->PCR[7] = PORT_PCR_MUX(5);
273 PORTD->PCR[11] = PORT_PCR_MUX(5);
275 PORTD->PCR[12] = PORT_PCR_MUX(5);
278 PORTB->PCR[4] = PORT_PCR_MUX(5) | PORT_PCR_PE_MASK | PORT_PCR_PS_MASK;
280 PORTB->PCR[5] = PORT_PCR_MUX(7);
283 PORTA->PCR[17] = PORT_PCR_MUX(1);
284 PTA->PDDR |= (1 << 17);
287 PTA->PCOR |= (1 << 17);
289 PTA->PSOR |= (1 << 17);
307 osMemset(txBufferDesc, 0,
sizeof(txBufferDesc));
308 osMemset(rxBufferDesc, 0,
sizeof(rxBufferDesc));
345 ENET->TDSR = (uint32_t) txBufferDesc;
347 ENET->RDSR = (uint32_t) rxBufferDesc;
365 if(interface->phyDriver != NULL)
368 interface->phyDriver->tick(interface);
370 else if(interface->switchDriver != NULL)
373 interface->switchDriver->tick(interface);
390 NVIC_EnableIRQ(ENET_TX_IRQn);
391 NVIC_EnableIRQ(ENET_RX_IRQn);
392 NVIC_EnableIRQ(ENET_ERR_IRQn);
395 if(interface->phyDriver != NULL)
398 interface->phyDriver->enableIrq(interface);
400 else if(interface->switchDriver != NULL)
403 interface->switchDriver->enableIrq(interface);
420 NVIC_DisableIRQ(ENET_TX_IRQn);
421 NVIC_DisableIRQ(ENET_RX_IRQn);
422 NVIC_DisableIRQ(ENET_ERR_IRQn);
425 if(interface->phyDriver != NULL)
428 interface->phyDriver->disableIrq(interface);
430 else if(interface->switchDriver != NULL)
433 interface->switchDriver->disableIrq(interface);
457 if((ENET->EIR & ENET_EIR_TXF_MASK) != 0)
460 ENET->EIR = ENET_EIR_TXF_MASK;
463 if((txBufferDesc[txBufferIndex][0] &
ENET_TBD0_R) == 0)
470 ENET->TDAR = ENET_TDAR_TDAR_MASK;
493 if((ENET->EIR & ENET_EIR_RXF_MASK) != 0)
496 ENET->EIMR &= ~ENET_EIMR_RXF_MASK;
499 nicDriverInterface->nicEvent =
TRUE;
524 if((ENET->EIR & ENET_EIR_EBERR_MASK) != 0)
527 ENET->EIMR &= ~ENET_EIMR_EBERR_MASK;
530 nicDriverInterface->nicEvent =
TRUE;
554 if((status & ENET_EIR_RXF_MASK) != 0)
557 ENET->EIR = ENET_EIR_RXF_MASK;
570 if((status & ENET_EIR_EBERR_MASK) != 0)
573 ENET->EIR = ENET_EIR_EBERR_MASK;
576 ENET->ECR &= ~ENET_ECR_ETHEREN_MASK;
580 ENET->ECR |= ENET_ECR_ETHEREN_MASK;
582 ENET->RDAR = ENET_RDAR_RDAR_MASK;
586 ENET->EIMR = ENET_EIMR_TXF_MASK | ENET_EIMR_RXF_MASK | ENET_EIMR_EBERR_MASK;
618 if((txBufferDesc[txBufferIndex][0] &
ENET_TBD0_R) != 0)
627 txBufferDesc[txBufferIndex][4] = 0;
650 ENET->TDAR = ENET_TDAR_TDAR_MASK;
653 if((txBufferDesc[txBufferIndex][0] &
ENET_TBD0_R) == 0)
677 if((rxBufferDesc[rxBufferIndex][0] &
ENET_RBD0_E) == 0)
680 if((rxBufferDesc[rxBufferIndex][0] &
ENET_RBD0_L) != 0)
713 rxBufferDesc[rxBufferIndex][4] = 0;
732 ENET->RDAR = ENET_RDAR_RDAR_MASK;
757 uint32_t unicastHashTable[2];
758 uint32_t multicastHashTable[2];
765 value = interface->macAddr.b[5];
766 value |= (interface->macAddr.b[4] << 8);
767 ENET->PAUR = ENET_PAUR_PADDR2(
value) | ENET_PAUR_TYPE(0x8808);
770 value = interface->macAddr.b[3];
771 value |= (interface->macAddr.b[2] << 8);
772 value |= (interface->macAddr.b[1] << 16);
773 value |= (interface->macAddr.b[0] << 24);
774 ENET->PALR = ENET_PALR_PADDR1(
value);
777 unicastHashTable[0] = 0;
778 unicastHashTable[1] = 0;
781 multicastHashTable[0] = 0;
782 multicastHashTable[1] = 0;
789 entry = &interface->macAddrFilter[i];
799 k = (crc >> 26) & 0x3F;
805 multicastHashTable[k / 32] |= (1 << (k % 32));
810 unicastHashTable[k / 32] |= (1 << (k % 32));
816 ENET->IALR = unicastHashTable[0];
817 ENET->IAUR = unicastHashTable[1];
820 ENET->GALR = multicastHashTable[0];
821 ENET->GAUR = multicastHashTable[1];
824 TRACE_DEBUG(
" IALR = %08" PRIX32
"\r\n", ENET->IALR);
825 TRACE_DEBUG(
" IAUR = %08" PRIX32
"\r\n", ENET->IAUR);
826 TRACE_DEBUG(
" GALR = %08" PRIX32
"\r\n", ENET->GALR);
827 TRACE_DEBUG(
" GAUR = %08" PRIX32
"\r\n", ENET->GAUR);
843 ENET->ECR &= ~ENET_ECR_ETHEREN_MASK;
849 ENET->RCR &= ~ENET_RCR_RMII_10T_MASK;
854 ENET->RCR |= ENET_RCR_RMII_10T_MASK;
861 ENET->TCR |= ENET_TCR_FDEN_MASK;
863 ENET->RCR &= ~ENET_RCR_DRT_MASK;
868 ENET->TCR &= ~ENET_TCR_FDEN_MASK;
870 ENET->RCR |= ENET_RCR_DRT_MASK;
877 ENET->ECR |= ENET_ECR_ETHEREN_MASK;
879 ENET->RDAR = ENET_RDAR_RDAR_MASK;
903 temp = ENET_MMFR_ST(1) | ENET_MMFR_OP(1) | ENET_MMFR_TA(2);
905 temp |= ENET_MMFR_PA(phyAddr);
909 temp |= ENET_MMFR_DATA(
data);
912 ENET->EIR = ENET_EIR_MII_MASK;
917 while((ENET->EIR & ENET_EIR_MII_MASK) == 0)
946 temp = ENET_MMFR_ST(1) | ENET_MMFR_OP(2) | ENET_MMFR_TA(2);
948 temp |= ENET_MMFR_PA(phyAddr);
953 ENET->EIR = ENET_EIR_MII_MASK;
958 while((ENET->EIR & ENET_EIR_MII_MASK) == 0)
963 data = ENET->MMFR & ENET_MMFR_DATA_MASK;
991 p = (uint8_t *)
data;
996 for(i = 0; i <
length; i++)
1001 for(j = 0; j < 8; j++)
1003 if((crc & 0x01) != 0)
1005 crc = (crc >> 1) ^ 0xEDB88320;