NXP S32K344 Ethernet MAC driver. More...

#include "core/nic.h"

Data Structures
struct	S32k344TxDmaDesc
	Transmit descriptor. More...

struct	S32k344RxDmaDesc
	Receive descriptor. More...

Macros
#define	S32K344_ETH_TX_BUFFER_COUNT 3

#define	S32K344_ETH_TX_BUFFER_SIZE 1536

#define	S32K344_ETH_RX_BUFFER_COUNT 6

#define	S32K344_ETH_RX_BUFFER_SIZE 1536

#define	S32K344_ETH_IRQ_PRIORITY_GROUPING 3

#define	S32K344_ETH_IRQ_GROUP_PRIORITY 12

#define	S32K344_ETH_IRQ_SUB_PRIORITY 0

#define	S32K344_ETH_RAM_SECTION "NonCacheable"

#define	S32K344_ETH_REMAP_ADDR(addr)

#define	EMAC_TDES0_BUF1AP 0xFFFFFFFF

#define	EMAC_TDES1_BUF2AP 0xFFFFFFFF

#define	EMAC_TDES2_IOC 0x80000000

#define	EMAC_TDES2_TTSE 0x40000000

#define	EMAC_TDES2_B2L 0x3FFF0000

#define	EMAC_TDES2_VTIR 0x0000C000

#define	EMAC_TDES2_B1L 0x00003FFF

#define	EMAC_TDES3_OWN 0x80000000

#define	EMAC_TDES3_CTXT 0x40000000

#define	EMAC_TDES3_FD 0x20000000

#define	EMAC_TDES3_LD 0x10000000

#define	EMAC_TDES3_CPC 0x0C000000

#define	EMAC_TDES3_SAIC 0x03800000

#define	EMAC_TDES3_SLOTNUM_THL 0x00780000

#define	EMAC_TDES3_TSE 0x00040000

#define	EMAC_TDES3_CIC 0x00030000

#define	EMAC_TDES3_FL 0x00007FFF

#define	EMAC_TDES3_TPL 0w0003FFFF

#define	EMAC_TDES0_TTSL 0xFFFFFFFF

#define	EMAC_TDES1_TTSH 0xFFFFFFFF

#define	EMAC_TDES3_OWN 0x80000000

#define	EMAC_TDES3_CTXT 0x40000000

#define	EMAC_TDES3_FD 0x20000000

#define	EMAC_TDES3_LD 0x10000000

#define	EMAC_TDES3_TTSS 0x00020000

#define	EMAC_TDES3_ES 0x00008000

#define	EMAC_TDES3_JT 0x00004000

#define	EMAC_TDES3_FF 0x00002000

#define	EMAC_TDES3_PCE 0x00001000

#define	EMAC_TDES3_LOC 0x00000800

#define	EMAC_TDES3_NC 0x00000400

#define	EMAC_TDES3_LC 0x00000200

#define	EMAC_TDES3_EC 0x00000100

#define	EMAC_TDES3_CC 0x000000F0

#define	EMAC_TDES3_ED 0x00000008

#define	EMAC_TDES3_UF 0x00000004

#define	EMAC_TDES3_DB 0x00000002

#define	EMAC_TDES3_IHE 0x00000001

#define	EMAC_TDES0_TTSL 0xFFFFFFFF

#define	EMAC_TDES1_TTSH 0xFFFFFFFF

#define	EMAC_TDES2_IVT 0xFFFF0000

#define	EMAC_TDES2_MSS 0x00003FFF

#define	EMAC_TDES3_OWN 0x80000000

#define	EMAC_TDES3_CTXT 0x40000000

#define	EMAC_TDES3_OSTC 0x08000000

#define	EMAC_TDES3_TCMSSV 0x04000000

#define	EMAC_TDES3_CDE 0x00800000

#define	EMAC_TDES3_IVLTV 0x00020000

#define	EMAC_TDES3_VLTV 0x00010000

#define	EMAC_TDES3_VT 0x0000FFFF

#define	EMAC_RDES0_BUF1AP 0xFFFFFFFF

#define	EMAC_RDES2_BUF2AP 0xFFFFFFFF

#define	EMAC_RDES3_OWN 0x80000000

#define	EMAC_RDES3_IOC 0x40000000

#define	EMAC_RDES3_BUF2V 0x02000000

#define	EMAC_RDES3_BUF1V 0x01000000

#define	EMAC_RDES0_IVT 0xFFFF0000

#define	EMAC_RDES0_OVT 0x0000FFFF

#define	EMAC_RDES1_OPC 0xFFFF0000

#define	EMAC_RDES1_TD 0x00008000

#define	EMAC_RDES1_TSA 0x00004000

#define	EMAC_RDES1_PV 0x00002000

#define	EMAC_RDES1_PFT 0x00001000

#define	EMAC_RDES1_PMT 0x00000F00

#define	EMAC_RDES1_IPCE 0x00000080

#define	EMAC_RDES1_IPCB 0x00000040

#define	EMAC_RDES1_IPV6 0x00000020

#define	EMAC_RDES1_IPV4 0x00000010

#define	EMAC_RDES1_IPHE 0x00000008

#define	EMAC_RDES1_PT 0x00000007

#define	EMAC_RDES2_L3L4FM 0xE0000000

#define	EMAC_RDES2_L4FM 0x10000000

#define	EMAC_RDES2_L3FM 0x08000000

#define	EMAC_RDES2_MADRM 0x07F80000

#define	EMAC_RDES2_HF 0x00040000

#define	EMAC_RDES2_DAF 0x00020000

#define	EMAC_RDES2_SAF 0x00010000

#define	EMAC_RDES2_OTS 0x00008000

#define	EMAC_RDES2_ITS 0x00004000

#define	EMAC_RDES2_ARPRN 0x00000400

#define	EMAC_RDES2_HL 0x000003FF

#define	EMAC_RDES3_OWN 0x80000000

#define	EMAC_RDES3_CTXT 0x40000000

#define	EMAC_RDES3_FD 0x20000000

#define	EMAC_RDES3_LD 0x10000000

#define	EMAC_RDES3_RS2V 0x08000000

#define	EMAC_RDES3_RS1V 0x04000000

#define	EMAC_RDES3_RS0V 0x02000000

#define	EMAC_RDES3_CE 0x01000000

#define	EMAC_RDES3_GP 0x00800000

#define	EMAC_RDES3_RWT 0x00400000

#define	EMAC_RDES3_OE 0x00200000

#define	EMAC_RDES3_RE 0x00100000

#define	EMAC_RDES3_DE 0x00080000

#define	EMAC_RDES3_LT 0x00070000

#define	EMAC_RDES3_ES 0x00008000

#define	EMAC_RDES3_PL 0x00007FFF

#define	EMAC_RDES0_RTSL 0xFFFFFFFF

#define	EMAC_RDES1_RTSH 0xFFFFFFFF

#define	EMAC_RDES3_OWN 0x80000000

#define	EMAC_RDES3_CTXT 0x40000000

Functions
error_t	s32k344EthInit (NetInterface *interface)
	S32K344 Ethernet MAC initialization. More...

void	s32k344EthInitGpio (NetInterface *interface)
	GPIO configuration. More...

void	s32k344EthInitRmiiClock (void)
	RMII clock configuration. More...

void	s32k344EthInitDmaDesc (NetInterface *interface)
	Initialize DMA descriptor lists. More...

void	s32k344EthTick (NetInterface *interface)
	S32K344 Ethernet MAC timer handler. More...

void	s32k344EthEnableIrq (NetInterface *interface)
	Enable interrupts. More...

void	s32k344EthDisableIrq (NetInterface *interface)
	Disable interrupts. More...

void	s32k344EthEventHandler (NetInterface *interface)
	S32K344 Ethernet MAC event handler. More...

error_t	s32k344EthSendPacket (NetInterface interface, const NetBuffer buffer, size_t offset, NetTxAncillary *ancillary)
	Send a packet. More...

error_t	s32k344EthReceivePacket (NetInterface *interface)
	Receive a packet. More...

error_t	s32k344EthUpdateMacAddrFilter (NetInterface *interface)
	Configure MAC address filtering. More...

error_t	s32k344EthUpdateMacConfig (NetInterface *interface)
	Adjust MAC configuration parameters for proper operation. More...

void	s32k344EthWritePhyReg (uint8_t opcode, uint8_t phyAddr, uint8_t regAddr, uint16_t data)
	Write PHY register. More...

uint16_t	s32k344EthReadPhyReg (uint8_t opcode, uint8_t phyAddr, uint8_t regAddr)
	Read PHY register. More...

uint32_t	s32k344EthCalcCrc (const void *data, size_t length)
	CRC calculation. More...

Variables
const NicDriver	s32k344EthDriver
	S32K344 Ethernet MAC driver. More...

Detailed Description

NXP S32K344 Ethernet MAC driver.

License

SPDX-License-Identifier: GPL-2.0-or-later

This file is part of CycloneTCP Open.

This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 2 of the License, or (at your option) any later version.

This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with this program; if not, write to the Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

Author: Oryx Embedded SARL (www.oryx-embedded.com)

Version: 2.6.0

Definition in file s32k344_eth_driver.h.

Macro Definition Documentation

◆ EMAC_RDES0_BUF1AP

#define EMAC_RDES0_BUF1AP 0xFFFFFFFF

Definition at line 155 of file s32k344_eth_driver.h.

◆ EMAC_RDES0_IVT

#define EMAC_RDES0_IVT 0xFFFF0000

Definition at line 163 of file s32k344_eth_driver.h.

◆ EMAC_RDES0_OVT

#define EMAC_RDES0_OVT 0x0000FFFF

Definition at line 164 of file s32k344_eth_driver.h.

◆ EMAC_RDES0_RTSL

#define EMAC_RDES0_RTSL 0xFFFFFFFF

Definition at line 206 of file s32k344_eth_driver.h.

◆ EMAC_RDES1_IPCB

#define EMAC_RDES1_IPCB 0x00000040

Definition at line 172 of file s32k344_eth_driver.h.

◆ EMAC_RDES1_IPCE

#define EMAC_RDES1_IPCE 0x00000080

Definition at line 171 of file s32k344_eth_driver.h.

◆ EMAC_RDES1_IPHE

#define EMAC_RDES1_IPHE 0x00000008

Definition at line 175 of file s32k344_eth_driver.h.

◆ EMAC_RDES1_IPV4

#define EMAC_RDES1_IPV4 0x00000010

Definition at line 174 of file s32k344_eth_driver.h.

◆ EMAC_RDES1_IPV6

#define EMAC_RDES1_IPV6 0x00000020

Definition at line 173 of file s32k344_eth_driver.h.

◆ EMAC_RDES1_OPC

#define EMAC_RDES1_OPC 0xFFFF0000

Definition at line 165 of file s32k344_eth_driver.h.

◆ EMAC_RDES1_PFT

#define EMAC_RDES1_PFT 0x00001000

Definition at line 169 of file s32k344_eth_driver.h.

◆ EMAC_RDES1_PMT

#define EMAC_RDES1_PMT 0x00000F00

Definition at line 170 of file s32k344_eth_driver.h.

◆ EMAC_RDES1_PT

#define EMAC_RDES1_PT 0x00000007

Definition at line 176 of file s32k344_eth_driver.h.

◆ EMAC_RDES1_PV

#define EMAC_RDES1_PV 0x00002000

Definition at line 168 of file s32k344_eth_driver.h.

◆ EMAC_RDES1_RTSH

#define EMAC_RDES1_RTSH 0xFFFFFFFF

Definition at line 207 of file s32k344_eth_driver.h.

◆ EMAC_RDES1_TD

#define EMAC_RDES1_TD 0x00008000

Definition at line 166 of file s32k344_eth_driver.h.

◆ EMAC_RDES1_TSA

#define EMAC_RDES1_TSA 0x00004000

Definition at line 167 of file s32k344_eth_driver.h.

◆ EMAC_RDES2_ARPRN

#define EMAC_RDES2_ARPRN 0x00000400

Definition at line 186 of file s32k344_eth_driver.h.

◆ EMAC_RDES2_BUF2AP

#define EMAC_RDES2_BUF2AP 0xFFFFFFFF

Definition at line 156 of file s32k344_eth_driver.h.

◆ EMAC_RDES2_DAF

#define EMAC_RDES2_DAF 0x00020000

Definition at line 182 of file s32k344_eth_driver.h.

◆ EMAC_RDES2_HF

#define EMAC_RDES2_HF 0x00040000

Definition at line 181 of file s32k344_eth_driver.h.

◆ EMAC_RDES2_HL

#define EMAC_RDES2_HL 0x000003FF

Definition at line 187 of file s32k344_eth_driver.h.

◆ EMAC_RDES2_ITS

#define EMAC_RDES2_ITS 0x00004000

Definition at line 185 of file s32k344_eth_driver.h.

◆ EMAC_RDES2_L3FM

#define EMAC_RDES2_L3FM 0x08000000

Definition at line 179 of file s32k344_eth_driver.h.

◆ EMAC_RDES2_L3L4FM

#define EMAC_RDES2_L3L4FM 0xE0000000

Definition at line 177 of file s32k344_eth_driver.h.

◆ EMAC_RDES2_L4FM

#define EMAC_RDES2_L4FM 0x10000000

Definition at line 178 of file s32k344_eth_driver.h.

◆ EMAC_RDES2_MADRM

#define EMAC_RDES2_MADRM 0x07F80000

Definition at line 180 of file s32k344_eth_driver.h.

◆ EMAC_RDES2_OTS

#define EMAC_RDES2_OTS 0x00008000

Definition at line 184 of file s32k344_eth_driver.h.

◆ EMAC_RDES2_SAF

#define EMAC_RDES2_SAF 0x00010000

Definition at line 183 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_BUF1V

#define EMAC_RDES3_BUF1V 0x01000000

Definition at line 160 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_BUF2V

#define EMAC_RDES3_BUF2V 0x02000000

Definition at line 159 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_CE

#define EMAC_RDES3_CE 0x01000000

Definition at line 195 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_CTXT [1/2]

#define EMAC_RDES3_CTXT 0x40000000

Definition at line 209 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_CTXT [2/2]

#define EMAC_RDES3_CTXT 0x40000000

Definition at line 209 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_DE

#define EMAC_RDES3_DE 0x00080000

Definition at line 200 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_ES

#define EMAC_RDES3_ES 0x00008000

Definition at line 202 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_FD

#define EMAC_RDES3_FD 0x20000000

Definition at line 190 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_GP

#define EMAC_RDES3_GP 0x00800000

Definition at line 196 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_IOC

#define EMAC_RDES3_IOC 0x40000000

Definition at line 158 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_LD

#define EMAC_RDES3_LD 0x10000000

Definition at line 191 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_LT

#define EMAC_RDES3_LT 0x00070000

Definition at line 201 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_OE

#define EMAC_RDES3_OE 0x00200000

Definition at line 198 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_OWN [1/3]

#define EMAC_RDES3_OWN 0x80000000

Definition at line 208 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_OWN [2/3]

#define EMAC_RDES3_OWN 0x80000000

Definition at line 208 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_OWN [3/3]

#define EMAC_RDES3_OWN 0x80000000

Definition at line 208 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_PL

#define EMAC_RDES3_PL 0x00007FFF

Definition at line 203 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_RE

#define EMAC_RDES3_RE 0x00100000

Definition at line 199 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_RS0V

#define EMAC_RDES3_RS0V 0x02000000

Definition at line 194 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_RS1V

#define EMAC_RDES3_RS1V 0x04000000

Definition at line 193 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_RS2V

#define EMAC_RDES3_RS2V 0x08000000

Definition at line 192 of file s32k344_eth_driver.h.

◆ EMAC_RDES3_RWT

#define EMAC_RDES3_RWT 0x00400000

Definition at line 197 of file s32k344_eth_driver.h.

◆ EMAC_TDES0_BUF1AP

#define EMAC_TDES0_BUF1AP 0xFFFFFFFF

Definition at line 99 of file s32k344_eth_driver.h.

◆ EMAC_TDES0_TTSL [1/2]

#define EMAC_TDES0_TTSL 0xFFFFFFFF

Definition at line 141 of file s32k344_eth_driver.h.

◆ EMAC_TDES0_TTSL [2/2]

#define EMAC_TDES0_TTSL 0xFFFFFFFF

Definition at line 141 of file s32k344_eth_driver.h.

◆ EMAC_TDES1_BUF2AP

#define EMAC_TDES1_BUF2AP 0xFFFFFFFF

Definition at line 100 of file s32k344_eth_driver.h.

◆ EMAC_TDES1_TTSH [1/2]

#define EMAC_TDES1_TTSH 0xFFFFFFFF

Definition at line 142 of file s32k344_eth_driver.h.

◆ EMAC_TDES1_TTSH [2/2]

#define EMAC_TDES1_TTSH 0xFFFFFFFF

Definition at line 142 of file s32k344_eth_driver.h.

◆ EMAC_TDES2_B1L

#define EMAC_TDES2_B1L 0x00003FFF

Definition at line 105 of file s32k344_eth_driver.h.

◆ EMAC_TDES2_B2L

#define EMAC_TDES2_B2L 0x3FFF0000

Definition at line 103 of file s32k344_eth_driver.h.

◆ EMAC_TDES2_IOC

#define EMAC_TDES2_IOC 0x80000000

Definition at line 101 of file s32k344_eth_driver.h.

◆ EMAC_TDES2_IVT

#define EMAC_TDES2_IVT 0xFFFF0000

Definition at line 143 of file s32k344_eth_driver.h.

◆ EMAC_TDES2_MSS

#define EMAC_TDES2_MSS 0x00003FFF

Definition at line 144 of file s32k344_eth_driver.h.

◆ EMAC_TDES2_TTSE

#define EMAC_TDES2_TTSE 0x40000000

Definition at line 102 of file s32k344_eth_driver.h.

◆ EMAC_TDES2_VTIR

#define EMAC_TDES2_VTIR 0x0000C000

Definition at line 104 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_CC

#define EMAC_TDES3_CC 0x000000F0

Definition at line 134 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_CDE

#define EMAC_TDES3_CDE 0x00800000

Definition at line 149 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_CIC

#define EMAC_TDES3_CIC 0x00030000

Definition at line 114 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_CPC

#define EMAC_TDES3_CPC 0x0C000000

Definition at line 110 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_CTXT [1/3]

#define EMAC_TDES3_CTXT 0x40000000

Definition at line 146 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_CTXT [2/3]

#define EMAC_TDES3_CTXT 0x40000000

Definition at line 146 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_CTXT [3/3]

#define EMAC_TDES3_CTXT 0x40000000

Definition at line 146 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_DB

#define EMAC_TDES3_DB 0x00000002

Definition at line 137 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_EC

#define EMAC_TDES3_EC 0x00000100

Definition at line 133 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_ED

#define EMAC_TDES3_ED 0x00000008

Definition at line 135 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_ES

#define EMAC_TDES3_ES 0x00008000

Definition at line 126 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_FD [1/2]

#define EMAC_TDES3_FD 0x20000000

Definition at line 123 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_FD [2/2]

#define EMAC_TDES3_FD 0x20000000

Definition at line 123 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_FF

#define EMAC_TDES3_FF 0x00002000

Definition at line 128 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_FL

#define EMAC_TDES3_FL 0x00007FFF

Definition at line 115 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_IHE

#define EMAC_TDES3_IHE 0x00000001

Definition at line 138 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_IVLTV

#define EMAC_TDES3_IVLTV 0x00020000

Definition at line 150 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_JT

#define EMAC_TDES3_JT 0x00004000

Definition at line 127 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_LC

#define EMAC_TDES3_LC 0x00000200

Definition at line 132 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_LD [1/2]

#define EMAC_TDES3_LD 0x10000000

Definition at line 124 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_LD [2/2]

#define EMAC_TDES3_LD 0x10000000

Definition at line 124 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_LOC

#define EMAC_TDES3_LOC 0x00000800

Definition at line 130 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_NC

#define EMAC_TDES3_NC 0x00000400

Definition at line 131 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_OSTC

#define EMAC_TDES3_OSTC 0x08000000

Definition at line 147 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_OWN [1/3]

#define EMAC_TDES3_OWN 0x80000000

Definition at line 145 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_OWN [2/3]

#define EMAC_TDES3_OWN 0x80000000

Definition at line 145 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_OWN [3/3]

#define EMAC_TDES3_OWN 0x80000000

Definition at line 145 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_PCE

#define EMAC_TDES3_PCE 0x00001000

Definition at line 129 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_SAIC

#define EMAC_TDES3_SAIC 0x03800000

Definition at line 111 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_SLOTNUM_THL

#define EMAC_TDES3_SLOTNUM_THL 0x00780000

Definition at line 112 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_TCMSSV

#define EMAC_TDES3_TCMSSV 0x04000000

Definition at line 148 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_TPL

#define EMAC_TDES3_TPL 0w0003FFFF

Definition at line 116 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_TSE

#define EMAC_TDES3_TSE 0x00040000

Definition at line 113 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_TTSS

#define EMAC_TDES3_TTSS 0x00020000

Definition at line 125 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_UF

#define EMAC_TDES3_UF 0x00000004

Definition at line 136 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_VLTV

#define EMAC_TDES3_VLTV 0x00010000

Definition at line 151 of file s32k344_eth_driver.h.

◆ EMAC_TDES3_VT

#define EMAC_TDES3_VT 0x0000FFFF

Definition at line 152 of file s32k344_eth_driver.h.

◆ S32K344_ETH_IRQ_GROUP_PRIORITY

#define S32K344_ETH_IRQ_GROUP_PRIORITY 12

Definition at line 74 of file s32k344_eth_driver.h.

◆ S32K344_ETH_IRQ_PRIORITY_GROUPING

#define S32K344_ETH_IRQ_PRIORITY_GROUPING 3

Definition at line 67 of file s32k344_eth_driver.h.

◆ S32K344_ETH_IRQ_SUB_PRIORITY

#define S32K344_ETH_IRQ_SUB_PRIORITY 0

Definition at line 81 of file s32k344_eth_driver.h.

◆ S32K344_ETH_RAM_SECTION

#define S32K344_ETH_RAM_SECTION "NonCacheable"

Definition at line 88 of file s32k344_eth_driver.h.

◆ S32K344_ETH_REMAP_ADDR

#define S32K344_ETH_REMAP_ADDR ( addr )

Value:

((uint32_t) (addr) >= 0x20000000U && (uint32_t) (addr) <= 0x2001FFFFU) ? \

((uint32_t) (addr) + 0x01000000U) : ((uint32_t) (addr))

Definition at line 93 of file s32k344_eth_driver.h.

◆ S32K344_ETH_RX_BUFFER_COUNT

#define S32K344_ETH_RX_BUFFER_COUNT 6

Definition at line 53 of file s32k344_eth_driver.h.

◆ S32K344_ETH_RX_BUFFER_SIZE

#define S32K344_ETH_RX_BUFFER_SIZE 1536

Definition at line 60 of file s32k344_eth_driver.h.

◆ S32K344_ETH_TX_BUFFER_COUNT

#define S32K344_ETH_TX_BUFFER_COUNT 3

Definition at line 39 of file s32k344_eth_driver.h.

◆ S32K344_ETH_TX_BUFFER_SIZE

#define S32K344_ETH_TX_BUFFER_SIZE 1536

Definition at line 46 of file s32k344_eth_driver.h.

Function Documentation

◆ s32k344EthCalcCrc()

uint32_t s32k344EthCalcCrc	(	const void *	data,
		size_t	length
	)

CRC calculation.

Parameters

[in]	data	Pointer to the data over which to calculate the CRC
[in]	length	Number of bytes to process

Returns: Resulting CRC value

Definition at line 1246 of file s32k344_eth_driver.c.

◆ s32k344EthDisableIrq()

void s32k344EthDisableIrq ( NetInterface * interface )

Disable interrupts.

Parameters

[in] interface Underlying network interface

Definition at line 735 of file s32k344_eth_driver.c.

◆ s32k344EthEnableIrq()

void s32k344EthEnableIrq ( NetInterface * interface )

Enable interrupts.

Parameters

[in] interface Underlying network interface

Definition at line 707 of file s32k344_eth_driver.c.

◆ s32k344EthEventHandler()

void s32k344EthEventHandler ( NetInterface * interface )

S32K344 Ethernet MAC event handler.

Parameters

[in] interface Underlying network interface

Definition at line 815 of file s32k344_eth_driver.c.

◆ s32k344EthInit()

error_t s32k344EthInit ( NetInterface * interface )

S32K344 Ethernet MAC initialization.

Parameters

[in] interface Underlying network interface

Returns: Error code

Definition at line 118 of file s32k344_eth_driver.c.

◆ s32k344EthInitDmaDesc()

void s32k344EthInitDmaDesc ( NetInterface * interface )

Initialize DMA descriptor lists.

Parameters

[in] interface Underlying network interface

Definition at line 631 of file s32k344_eth_driver.c.

◆ s32k344EthInitGpio()

void s32k344EthInitGpio ( NetInterface * interface )

GPIO configuration.

Parameters

[in] interface Underlying network interface

Definition at line 262 of file s32k344_eth_driver.c.

◆ s32k344EthInitRmiiClock()

void s32k344EthInitRmiiClock ( void )

RMII clock configuration.

Parameters

[in] interface Underlying network interface

Definition at line 550 of file s32k344_eth_driver.c.

◆ s32k344EthReadPhyReg()

uint16_t s32k344EthReadPhyReg	(	uint8_t	opcode,
		uint8_t	phyAddr,
		uint8_t	regAddr
	)

Read PHY register.

Parameters

[in]	opcode	Access type (2 bits)
[in]	phyAddr	PHY address (5 bits)
[in]	regAddr	Register address (5 bits)

Returns: Register value

Definition at line 1197 of file s32k344_eth_driver.c.

◆ s32k344EthReceivePacket()

error_t s32k344EthReceivePacket ( NetInterface * interface )

Receive a packet.

Parameters

[in] interface Underlying network interface

Returns: Error code

Definition at line 905 of file s32k344_eth_driver.c.

◆ s32k344EthSendPacket()

error_t s32k344EthSendPacket	(	NetInterface *	interface,
		const NetBuffer *	buffer,
		size_t	offset,
		NetTxAncillary *	ancillary
	)

Send a packet.

Parameters

[in]	interface	Underlying network interface
[in]	buffer	Multi-part buffer containing the data to send
[in]	offset	Offset to the first data byte
[in]	ancillary	Additional options passed to the stack along with the packet

Returns: Error code

Definition at line 840 of file s32k344_eth_driver.c.

◆ s32k344EthTick()

void s32k344EthTick ( NetInterface * interface )

S32K344 Ethernet MAC timer handler.

This routine is periodically called by the TCP/IP stack to handle periodic operations such as polling the link state

Parameters

[in] interface Underlying network interface

Definition at line 682 of file s32k344_eth_driver.c.

◆ s32k344EthUpdateMacAddrFilter()

error_t s32k344EthUpdateMacAddrFilter ( NetInterface * interface )

Configure MAC address filtering.

Parameters

[in] interface Underlying network interface

Returns: Error code

Definition at line 980 of file s32k344_eth_driver.c.

◆ s32k344EthUpdateMacConfig()

error_t s32k344EthUpdateMacConfig ( NetInterface * interface )

Adjust MAC configuration parameters for proper operation.

Parameters

[in] interface Underlying network interface

Returns: Error code

Definition at line 1111 of file s32k344_eth_driver.c.

◆ s32k344EthWritePhyReg()

void s32k344EthWritePhyReg	(	uint8_t	opcode,
		uint8_t	phyAddr,
		uint8_t	regAddr,
		uint16_t	data
	)

Write PHY register.

Parameters

[in]	opcode	Access type (2 bits)
[in]	phyAddr	PHY address (5 bits)
[in]	regAddr	Register address (5 bits)
[in]	data	Register value

Definition at line 1154 of file s32k344_eth_driver.c.

Variable Documentation

◆ s32k344EthDriver

const NicDriver s32k344EthDriver

extern

S32K344 Ethernet MAC driver.

Definition at line 91 of file s32k344_eth_driver.c.

Data Structures

Macros

Functions

Variables

Detailed Description

License

Macro Definition Documentation

◆ EMAC_RDES0_BUF1AP

◆ EMAC_RDES0_IVT

◆ EMAC_RDES0_OVT

◆ EMAC_RDES0_RTSL

◆ EMAC_RDES1_IPCB

◆ EMAC_RDES1_IPCE

◆ EMAC_RDES1_IPHE

◆ EMAC_RDES1_IPV4

◆ EMAC_RDES1_IPV6

◆ EMAC_RDES1_OPC

◆ EMAC_RDES1_PFT

◆ EMAC_RDES1_PMT

◆ EMAC_RDES1_PT

◆ EMAC_RDES1_PV

◆ EMAC_RDES1_RTSH

◆ EMAC_RDES1_TD

◆ EMAC_RDES1_TSA

◆ EMAC_RDES2_ARPRN

◆ EMAC_RDES2_BUF2AP

◆ EMAC_RDES2_DAF

◆ EMAC_RDES2_HF

◆ EMAC_RDES2_HL

◆ EMAC_RDES2_ITS

◆ EMAC_RDES2_L3FM

◆ EMAC_RDES2_L3L4FM

◆ EMAC_RDES2_L4FM

◆ EMAC_RDES2_MADRM

◆ EMAC_RDES2_OTS

◆ EMAC_RDES2_SAF

◆ EMAC_RDES3_BUF1V

◆ EMAC_RDES3_BUF2V

◆ EMAC_RDES3_CE

◆ EMAC_RDES3_CTXT [1/2]

◆ EMAC_RDES3_CTXT [2/2]

◆ EMAC_RDES3_DE

◆ EMAC_RDES3_ES

◆ EMAC_RDES3_FD

◆ EMAC_RDES3_GP

◆ EMAC_RDES3_IOC

◆ EMAC_RDES3_LD

◆ EMAC_RDES3_LT

◆ EMAC_RDES3_OE

◆ EMAC_RDES3_OWN [1/3]

◆ EMAC_RDES3_OWN [2/3]

◆ EMAC_RDES3_OWN [3/3]

◆ EMAC_RDES3_PL

◆ EMAC_RDES3_RE

◆ EMAC_RDES3_RS0V

◆ EMAC_RDES3_RS1V

◆ EMAC_RDES3_RS2V

◆ EMAC_RDES3_RWT

◆ EMAC_TDES0_BUF1AP

◆ EMAC_TDES0_TTSL [1/2]

◆ EMAC_TDES0_TTSL [2/2]

◆ EMAC_TDES1_BUF2AP

◆ EMAC_TDES1_TTSH [1/2]

◆ EMAC_TDES1_TTSH [2/2]

◆ EMAC_TDES2_B1L

◆ EMAC_TDES2_B2L

◆ EMAC_TDES2_IOC

◆ EMAC_TDES2_IVT

◆ EMAC_TDES2_MSS

◆ EMAC_TDES2_TTSE

◆ EMAC_TDES2_VTIR

◆ EMAC_TDES3_CC

◆ EMAC_TDES3_CDE

◆ EMAC_TDES3_CIC

◆ EMAC_TDES3_CPC

◆ EMAC_TDES3_CTXT [1/3]

◆ EMAC_TDES3_CTXT [2/3]

◆ EMAC_TDES3_CTXT [3/3]

◆ EMAC_TDES3_DB

◆ EMAC_TDES3_EC